[llvm] [AMDGPU] Move InferAddressSpacesPass to middle end optimization pipeline (PR #138604)

[Shilei Tian via llvm-commits]

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@@ -31,28 +31,21 @@ entry:
 define protected amdgpu_kernel void @InferFadd(i32 %a, ptr addrspace(1) %b, double %c) {
 ; CHECK-LABEL: InferFadd:
 ; CHECK:       ; %bb.0: ; %entry
-; CHECK-NEXT:    s_mov_b64 s[0:1], exec
-; CHECK-NEXT:    v_mbcnt_lo_u32_b32 v0, s0, 0
-; CHECK-NEXT:    v_mbcnt_hi_u32_b32 v0, s1, v0
-; CHECK-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0
-; CHECK-NEXT:    s_and_saveexec_b64 s[2:3], vcc
-; CHECK-NEXT:    s_cbranch_execz .LBB1_2
-; CHECK-NEXT:  ; %bb.1:
-; CHECK-NEXT:    s_load_dword s2, s[4:5], 0x24
-; CHECK-NEXT:    s_load_dwordx4 s[8:11], s[4:5], 0x2c
-; CHECK-NEXT:    v_mov_b32_e32 v2, 0
+; CHECK-NEXT:    s_load_dword s6, s[4:5], 0x24
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shiltian wrote:

https://github.com/llvm/llvm-project/pull/141126

https://github.com/llvm/llvm-project/pull/138604