[llvm] [RISCV] Add LD_RV32/SD_RV32 to a few more functions in RISCVInstrInfo. (PR #140640)

[Craig Topper via llvm-commits]

topperc wrote:

> LGTM
> 
> Mildly not a fan of adding code which isn't yet exercised, but a) the change is obvious, and b) I trust you to follow through on the spill/fill bits in a reasonable timeline.

The spill slots for Zdinx are only 4 byte aligned so I think we can only use them for spill for unaligned-scalar-mem.

https://github.com/llvm/llvm-project/pull/140640