[llvm] [RISCV] Add scheduling model for SiFive P800 processors (PR #139316)

[LLVM Continuous Integration via llvm-commits]

llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `lld-x86_64-ubuntu-fast` running on `as-builder-4` while building `llvm` at step 5 "build-unified-tree".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/33/builds/16808

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 5 (build-unified-tree) failure: build (failure)
...
14.123 [879/38/3060] Linking CXX static library lib/libLLVMSystemZDesc.a
14.143 [878/38/3061] Linking CXX static library lib/libLLVMSystemZDisassembler.a
14.285 [878/37/3062] Building RISCVGenSearchableTables.inc...
14.613 [878/36/3063] Building X86GenMnemonicTables.inc...
14.744 [878/35/3064] Building X86GenAsmWriter.inc...
14.807 [878/34/3065] Building X86GenAsmWriter1.inc...
14.951 [878/33/3066] Building X86GenInstrMapping.inc...
15.010 [878/32/3067] Building X86GenRegisterBank.inc...
15.018 [878/31/3068] Building X86GenGlobalISel.inc...
15.059 [878/30/3069] Building RISCVGenSubtargetInfo.inc...
FAILED: lib/Target/RISCV/RISCVGenSubtargetInfo.inc /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/build/lib/Target/RISCV/RISCVGenSubtargetInfo.inc 
cd /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/build/lib/Target/RISCV && /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/build/bin/llvm-tblgen -gen-subtarget -I /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/lib/Target/RISCV -I/home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/build/include -I/home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/include -I /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/lib/Target /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/lib/Target/RISCV/RISCV.td --write-if-changed -o /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/build/lib/Target/RISCV/RISCVGenSubtargetInfo.inc
Included from /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/lib/Target/RISCV/RISCV.td:61:
/home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/lib/Target/RISCV/RISCVSchedSiFiveP800.td:61:5: error: Processor does not define resources for WriteFAdd128
def SiFiveP800Model : SchedMachineModel {
    ^
15.231 [878/29/3070] Building X86GenAsmMatcher.inc...
15.744 [878/28/3071] Building X86GenDisassemblerTables.inc...
15.921 [878/27/3072] Building X86GenDAGISel.inc...
17.223 [878/26/3073] Building CXX object lib/MC/MCParser/CMakeFiles/LLVMMCParser.dir/AsmParser.cpp.o
19.056 [878/25/3074] Building AArch64GenSubtargetInfo.inc...
19.096 [878/24/3075] Building X86GenSubtargetInfo.inc...
19.733 [878/23/3076] Building AArch64GenInstrInfo.inc...
21.270 [878/22/3077] Building RISCVGenInstrInfo.inc...
21.522 [878/21/3078] Building X86GenInstrInfo.inc...
21.795 [878/20/3079] Building AMDGPUGenMCPseudoLowering.inc...
22.771 [878/19/3080] Building AMDGPUGenPreLegalizeGICombiner.inc...
22.992 [878/18/3081] Building AMDGPUGenPostLegalizeGICombiner.inc...
23.027 [878/17/3082] Building AMDGPUGenRegBankGICombiner.inc...
23.812 [878/16/3083] Building AMDGPUGenDisassemblerTables.inc...
23.852 [878/15/3084] Building RISCVGenGlobalISel.inc...
24.218 [878/14/3085] Building AMDGPUGenSubtargetInfo.inc...
24.267 [878/13/3086] Building AMDGPUGenMCCodeEmitter.inc...
24.374 [878/12/3087] Building AMDGPUGenSearchableTables.inc...
24.626 [878/11/3088] Building CXX object lib/CodeGen/AsmPrinter/CMakeFiles/LLVMAsmPrinter.dir/AsmPrinter.cpp.o
25.476 [878/10/3089] Building CXX object lib/LTO/CMakeFiles/LLVMLTO.dir/LTO.cpp.o
25.574 [878/9/3090] Building AMDGPUGenCallingConv.inc...
27.974 [878/8/3091] Building RISCVGenDAGISel.inc...
28.181 [878/7/3092] Building AMDGPUGenAsmWriter.inc...
28.975 [878/6/3093] Building AMDGPUGenGlobalISel.inc...
29.054 [878/5/3094] Building AMDGPUGenAsmMatcher.inc...
29.587 [878/4/3095] Building AMDGPUGenDAGISel.inc...
31.055 [878/3/3096] Building AMDGPUGenInstrInfo.inc...
32.923 [878/2/3097] Building AMDGPUGenRegisterBank.inc...
33.788 [878/1/3098] Building AMDGPUGenRegisterInfo.inc...
ninja: build stopped: subcommand failed.

```

</details>

https://github.com/llvm/llvm-project/pull/139316