[llvm] [RISCV] Add scheduling model for SiFive P800 processors (PR #139316)

[LLVM Continuous Integration via llvm-commits]

llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `bolt-x86_64-ubuntu-nfc` running on `bolt-worker` while building `llvm` at step 7 "build-bolt".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/92/builds/19111

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 7 (build-bolt) failure: build (failure)
...
5.967 [149/14/33] Building RISCVGenCompressInstEmitter.inc...
6.132 [149/13/34] Building RISCVGenAsmWriter.inc...
6.356 [149/12/35] Building RISCVGenSearchableTables.inc...
6.498 [149/11/36] Building RISCVGenMCCodeEmitter.inc...
6.710 [149/10/37] Building RISCVGenPostLegalizeGICombiner.inc...
6.788 [149/9/38] Building CXX object tools/bolt/lib/Utils/CMakeFiles/LLVMBOLTUtils.dir/CommandLineOpts.cpp.o
6.827 [148/9/39] Linking CXX static library lib/libLLVMBOLTUtils.a
7.038 [148/8/40] Building RISCVGenPreLegalizeGICombiner.inc...
7.199 [148/7/41] Building RISCVGenRegisterInfo.inc...
8.038 [148/6/42] Building RISCVGenSubtargetInfo.inc...
FAILED: lib/Target/RISCV/RISCVGenSubtargetInfo.inc /home/worker/bolt-worker2/bolt-x86_64-ubuntu-nfc/build/lib/Target/RISCV/RISCVGenSubtargetInfo.inc 
cd /home/worker/bolt-worker2/bolt-x86_64-ubuntu-nfc/build/lib/Target/RISCV && /home/worker/bolt-worker2/bolt-x86_64-ubuntu-nfc/build/bin/llvm-tblgen -gen-subtarget -I /home/worker/bolt-worker2/bolt-x86_64-ubuntu-nfc/llvm-project/llvm/lib/Target/RISCV -I/home/worker/bolt-worker2/bolt-x86_64-ubuntu-nfc/build/include -I/home/worker/bolt-worker2/bolt-x86_64-ubuntu-nfc/llvm-project/llvm/include -I /home/worker/bolt-worker2/bolt-x86_64-ubuntu-nfc/llvm-project/llvm/lib/Target /home/worker/bolt-worker2/bolt-x86_64-ubuntu-nfc/llvm-project/llvm/lib/Target/RISCV/RISCV.td --write-if-changed -o /home/worker/bolt-worker2/bolt-x86_64-ubuntu-nfc/build/lib/Target/RISCV/RISCVGenSubtargetInfo.inc
Included from /home/worker/bolt-worker2/bolt-x86_64-ubuntu-nfc/llvm-project/llvm/lib/Target/RISCV/RISCV.td:61:
/home/worker/bolt-worker2/bolt-x86_64-ubuntu-nfc/llvm-project/llvm/lib/Target/RISCV/RISCVSchedSiFiveP800.td:61:5: error: Processor does not define resources for WriteFAdd128
def SiFiveP800Model : SchedMachineModel {
    ^
9.159 [148/5/43] Building AArch64GenSubtargetInfo.inc...
9.892 [148/4/44] Building AArch64GenInstrInfo.inc...
10.874 [68/3/45] Building RISCVGenInstrInfo.inc...
12.941 [68/2/46] Building RISCVGenGlobalISel.inc...
14.816 [68/1/47] Building RISCVGenDAGISel.inc...
ninja: build stopped: subcommand failed.

```

</details>

https://github.com/llvm/llvm-project/pull/139316