[llvm] [GlobalISel] Add computeNumSignBits for ASHR (PR #139503)

David Green via llvm-commits llvm-commits at lists.llvm.org
Wed May 21 12:46:00 PDT 2025


================
@@ -864,6 +864,16 @@ unsigned GISelValueTracking::computeNumSignBits(Register R,
       return TyBits - 1; // Every always-zero bit is a sign bit.
     break;
   }
+  case TargetOpcode::G_ASHR: {
+    Register Src1 = MI.getOperand(1).getReg();
+    Register Src2 = MI.getOperand(2).getReg();
+    LLT SrcTy = MRI.getType(Src1);
+    FirstAnswer = computeNumSignBits(Src1, DemandedElts, Depth + 1);
+    if (auto C = getIConstantSplatVal(Src2, MRI))
+      FirstAnswer = std::max<uint64_t>(FirstAnswer + C->getZExtValue(),
----------------
davemgreen wrote:

I'm not sure where this came from. I've had this patch on my machine for a long time and must have messed it up when I was first creating it. I've tried to have another go, add some better tests and do it properly like the SDAG version by adding a getValidMinimumShiftAmount method.

https://github.com/llvm/llvm-project/pull/139503


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