[llvm] [PowerPC] Add load/store support for v2048i1 and DMF cryptography instructions (PR #136145)
Lei Huang via llvm-commits
llvm-commits at lists.llvm.org
Tue May 20 14:00:29 PDT 2025
================
@@ -11824,10 +11831,37 @@ SDValue PPCTargetLowering::LowerDMFVectorLoad(SDValue Op,
SDValue HiSub = DAG.getTargetConstant(PPC::sub_wacc_hi, dl, MVT::i32);
SDValue RC = DAG.getTargetConstant(PPC::DMRRCRegClassID, dl, MVT::i32);
const SDValue Ops[] = {RC, Lo, LoSub, Hi, HiSub};
+
SDValue Value =
SDValue(DAG.getMachineNode(PPC::REG_SEQUENCE, dl, MVT::v1024i1, Ops), 0);
- SDValue RetOps[] = {Value, TF};
+ if (IsV1024i1) {
+ SDValue RetOps[] = {Value, TF};
+ return DAG.getMergeValues(RetOps, dl);
+ }
----------------
lei137 wrote:
nit: can we get rid of tmp variables when possible?
```suggestion
if (IsV1024i1)
return DAG.getMergeValues(SDValue(Value, TF), dl);
```
https://github.com/llvm/llvm-project/pull/136145
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