[llvm] 581d175 - [LoongArch] Document the inline asm `q` constraint

[Weining Lu via llvm-commits]

Author: Weining Lu
Date: 2025-05-26T09:14:27+08:00
New Revision: 581d175a86dbaa6bfabc19a7be553ece684f520c

URL: https://github.com/llvm/llvm-project/commit/581d175a86dbaa6bfabc19a7be553ece684f520c
DIFF: https://github.com/llvm/llvm-project/commit/581d175a86dbaa6bfabc19a7be553ece684f520c.diff

LOG: [LoongArch] Document the inline asm `q` constraint

See #141037.

Added: 
    

Modified: 
    llvm/docs/LangRef.rst
    llvm/docs/ReleaseNotes.md

Removed: 
    


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diff  --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index ad0755e1531df..7fbac14112af3 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -5614,6 +5614,8 @@ LoongArch:
 - ``m``: A memory operand whose address is formed by a base register and
   offset that is suitable for use in instructions with the same addressing
   mode as st.w and ld.w.
+- ``q``: A general-purpose register except for $r0 and $r1 (for the csrxchg
+  instruction).
 - ``I``: A signed 12-bit constant (for arithmetic instructions).
 - ``J``: An immediate integer zero.
 - ``K``: An unsigned 12-bit constant (for logic instructions).

diff  --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md
index 7135b24345c7e..e590e54f2ccbf 100644
--- a/llvm/docs/ReleaseNotes.md
+++ b/llvm/docs/ReleaseNotes.md
@@ -138,6 +138,7 @@ Changes to the LoongArch Backend
 --------------------------------
 
 * Changing the default code model from `small` to `medium` for 64-bit.
+* Added inline asm support for the `q` constraint.
 
 Changes to the MIPS Backend
 ---------------------------