[llvm] [RISCV] Use RISCVTargetInstrInfo::copyPhysReg in RISCVMakeCompressible. NFC (PR #141296)

via llvm-commits llvm-commits at lists.llvm.org
Fri May 23 15:01:50 PDT 2025


github-actions[bot] wrote:

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git-clang-format --diff HEAD~1 HEAD --extensions cpp -- llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp b/llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
index 65b426347..2c409b98e 100644
--- a/llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
+++ b/llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
@@ -443,7 +443,8 @@ bool RISCVMakeCompressibleOpt::runOnMachineFunction(MachineFunction &Fn) {
             .addImm(RegImm.Imm);
       } else {
         assert(RegImm.Imm == 0);
-        TII.copyPhysReg(MBB, MI, MI.getDebugLoc(), NewReg, RegImm.Reg, /*KillSrc*/false);
+        TII.copyPhysReg(MBB, MI, MI.getDebugLoc(), NewReg, RegImm.Reg,
+                        /*KillSrc*/ false);
       }
 
       // Update the set of instructions to use the compressed register and

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https://github.com/llvm/llvm-project/pull/141296


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