[llvm] [SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (PR #140075)

[Nicholas Guy via llvm-commits]

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@@ -174,10 +175,17 @@ define <4 x i32> @usdot(<4 x i32> %acc, <16 x i8> %u, <16 x i8> %s) {
 ; CHECK-NOI8MM-NEXT:    smlal2 v0.4s, v2.8h, v1.8h
 ; CHECK-NOI8MM-NEXT:    ret
 ;
-; CHECK-I8MM-LABEL: usdot:
-; CHECK-I8MM:       // %bb.0:
-; CHECK-I8MM-NEXT:    usdot v0.4s, v1.16b, v2.16b
-; CHECK-I8MM-NEXT:    ret
+; CHECK-NEWLOWERING-I8MM-LABEL: usdot:
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NickGuy-Arm wrote:

Done, though due to potential masking I've renamed it to `CHECK-DOT-I8MM`. See later comment for context.

https://github.com/llvm/llvm-project/pull/140075