[llvm] [InferAddressSpaces] Handle llvm.lifetime (PR #141045)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Thu May 22 05:42:21 PDT 2025


https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/141045

>From 4175c7d0aecfe82fd0cc716a031f15924900dcf6 Mon Sep 17 00:00:00 2001
From: Zhenhao Yang <zhenhao.yang at nio.com>
Date: Thu, 22 May 2025 19:06:00 +0800
Subject: [PATCH 1/3] [InferAddressSpaces] Handle llvm.lifetime

---
 .../Transforms/Scalar/InferAddressSpaces.cpp  | 14 +++++++++++
 .../InferAddressSpaces/AMDGPU/lifetime.ll     | 23 ++++++++++++++++++
 .../InferAddressSpaces/NVPTX/lifetime.ll      | 24 +++++++++++++++++++
 3 files changed, 61 insertions(+)
 create mode 100644 llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll
 create mode 100644 llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll

diff --git a/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp b/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
index 1b7cecc7ceb6a..66836ef05d5db 100644
--- a/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
+++ b/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
@@ -428,6 +428,14 @@ bool InferAddressSpacesImpl::rewriteIntrinsicOperands(IntrinsicInst *II,
     II->replaceUsesOfWith(OldV, NewV);
     return true;
   }
+  case Intrinsic::lifetime_start:
+  case Intrinsic::lifetime_end: {
+    Function *NewDecl = Intrinsic::getOrInsertDeclaration(
+        M, II->getIntrinsicID(), {NewV->getType()});
+    II->setArgOperand(1, NewV);
+    II->setCalledFunction(NewDecl);
+    return true;
+  }
   default: {
     Value *Rewrite = TTI->rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
     if (!Rewrite)
@@ -479,6 +487,12 @@ void InferAddressSpacesImpl::collectRewritableIntrinsicOperands(
 
     break;
   }
+  case Intrinsic::lifetime_start:
+  case Intrinsic::lifetime_end: {
+    appendsFlatAddressExpressionToPostorderStack(II->getArgOperand(1),
+                                                 PostorderStack, Visited);
+    break;
+  }
   default:
     SmallVector<int, 2> OpIndexes;
     if (TTI->collectFlatAddressOperands(OpIndexes, IID)) {
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll
new file mode 100644
index 0000000000000..291faa7ea9ef4
--- /dev/null
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll
@@ -0,0 +1,23 @@
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=infer-address-spaces %s | FileCheck %s
+
+
+define i32 @lifetime_flat_pointer() {
+; CHECK-LABEL: define i32 @lifetime_flat_pointer() {
+; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
+; CHECK-NEXT:    call void @llvm.lifetime.start.p5(i64 4, ptr addrspace(5) [[ALLOCA]])
+; CHECK-NEXT:    store i32 1, ptr addrspace(5) [[ALLOCA]], align 4
+; CHECK-NEXT:    %ret = load i32, ptr addrspace(5) [[ALLOCA]], align 4
+; CHECK-NEXT:    call void @llvm.lifetime.end.p5(i64 4, ptr addrspace(5) [[ALLOCA]])
+; CHECK-NEXT:    ret i32 %ret
+;
+  %alloca = alloca i32, align 4, addrspace(5)
+  %flat = addrspacecast ptr addrspace(5) %alloca to ptr
+  call void @llvm.lifetime.start.p0(i64 4 , ptr %flat)
+  store i32 1, ptr %flat, align 4
+  %ret = load i32, ptr %flat, align 4
+  call void @llvm.lifetime.end.p0(i64 4 , ptr %flat)
+  ret i32 %ret
+}
+
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
\ No newline at end of file
diff --git a/llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll b/llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll
new file mode 100644
index 0000000000000..05e46456c8bf9
--- /dev/null
+++ b/llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll
@@ -0,0 +1,24 @@
+; RUN: opt -S -passes=infer-address-spaces %s | FileCheck %s
+
+target triple = "nvptx64-nvidia-cuda"
+
+define i32 @lifetime_flat_pointer() {
+; CHECK-LABEL: define i32 @lifetime_flat_pointer() {
+; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
+; CHECK-NEXT:    call void @llvm.lifetime.start.p5(i64 4, ptr addrspace(5) [[ALLOCA]])
+; CHECK-NEXT:    store i32 1, ptr addrspace(5) [[ALLOCA]], align 4
+; CHECK-NEXT:    %ret = load i32, ptr addrspace(5) [[ALLOCA]], align 4
+; CHECK-NEXT:    call void @llvm.lifetime.end.p5(i64 4, ptr addrspace(5) [[ALLOCA]])
+; CHECK-NEXT:    ret i32 %ret
+;
+  %alloca = alloca i32, align 4, addrspace(5)
+  %flat = addrspacecast ptr addrspace(5) %alloca to ptr
+  call void @llvm.lifetime.start.p0(i64 4 , ptr %flat)
+  store i32 1, ptr %flat, align 4
+  %ret = load i32, ptr %flat, align 4
+  call void @llvm.lifetime.end.p0(i64 4 , ptr %flat)
+  ret i32 %ret
+}
+
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)

>From 3c4e6288d0e47c3a4ddb8100d0809ea585cfafeb Mon Sep 17 00:00:00 2001
From: Zhenhao Yang <zhenhao.yang at nio.com>
Date: Thu, 22 May 2025 20:38:35 +0800
Subject: [PATCH 2/3] fixup! [InferAddressSpaces] Handle llvm.lifetime

---
 .../InferAddressSpaces/AMDGPU/lifetime.ll      |  2 +-
 .../InferAddressSpaces/NVPTX/lifetime.ll       | 18 ++++++++++++++++++
 2 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll
index 291faa7ea9ef4..e5ab7383995a3 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll
@@ -20,4 +20,4 @@ define i32 @lifetime_flat_pointer() {
 }
 
 declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
-declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
\ No newline at end of file
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
diff --git a/llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll b/llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll
index 05e46456c8bf9..c00f0e5dd06a9 100644
--- a/llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll
@@ -20,5 +20,23 @@ define i32 @lifetime_flat_pointer() {
   ret i32 %ret
 }
 
+define i32 @lifetime_flat_pointer2() {
+; CHECK-LABEL: define i32 @lifetime_flat_pointer2() {
+; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca i32, align 4
+; CHECK-NEXT:    [[TMP1:%.*]] = addrspacecast ptr [[ALLOCA]] to ptr addrspace(5)
+; CHECK-NEXT:    call void @llvm.lifetime.start.p5(i64 4, ptr addrspace(5) [[TMP1]])
+; CHECK-NEXT:    store i32 1, ptr addrspace(5) [[TMP1]], align 4
+; CHECK-NEXT:    %ret = load i32, ptr addrspace(5) [[TMP1]], align 4
+; CHECK-NEXT:    call void @llvm.lifetime.end.p5(i64 4, ptr addrspace(5) [[TMP1]])
+; CHECK-NEXT:    ret i32 %ret
+;
+  %alloca = alloca i32, align 4
+  call void @llvm.lifetime.start.p5(i64 4 , ptr %alloca)
+  store i32 1, ptr %alloca, align 4
+  %ret = load i32, ptr %alloca, align 4
+  call void @llvm.lifetime.end.p5(i64 4 , ptr %alloca)
+  ret i32 %ret
+}
+
 declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
 declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)

>From 0e3775476855d10854868b054bec553c5142fa9a Mon Sep 17 00:00:00 2001
From: Matt Arsenault <arsenm2 at gmail.com>
Date: Thu, 22 May 2025 14:42:13 +0200
Subject: [PATCH 3/3] Remove empty line

---
 llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll | 1 -
 1 file changed, 1 deletion(-)

diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll
index e5ab7383995a3..d39a0b35ce811 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll
@@ -1,6 +1,5 @@
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=infer-address-spaces %s | FileCheck %s
 
-
 define i32 @lifetime_flat_pointer() {
 ; CHECK-LABEL: define i32 @lifetime_flat_pointer() {
 ; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)



More information about the llvm-commits mailing list