[llvm] [InstCombine, AArch64] Avoid vector Ext in case by-element operation variant apply for all elements (PR #140733)
Ahmad Yasin via llvm-commits
llvm-commits at lists.llvm.org
Tue May 20 13:51:04 PDT 2025
================
@@ -18602,6 +18602,33 @@ static SDValue performBuildShuffleExtendCombine(SDValue BV, SelectionDAG &DAG) {
SeenZExtOrSExt = true;
}
+ // Avoid the said use of vector SExt/ZExt in case all vector elements are
+ // consumed and each shuffle's mask uses same index, in order to permit use of
+ // indexed OP (e.g. MLA, MUL) variants
+ EVT ExtendType = Extend->getValueType(0);
+ if (ExtendType.isVector() && !ExtendType.isScalableVT()) {
+ const int NumElements = ExtendType.getVectorNumElements();
+ SmallBitVector UsedElements(NumElements, false);
+ for (auto UI = Extend.getNode()->use_begin(),
+ UE = Extend.getNode()->use_end();
+ UI != UE; ++UI) {
----------------
ayasin-a wrote:
will replace it with
`for (SDNode *User : UI = Extend.getNode()->users()) {`
https://github.com/llvm/llvm-project/pull/140733
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