[llvm] [LoongArch] Prevent R0/R1 allocation for rj operand of [G]CSRXCHG (PR #140862)

via llvm-commits llvm-commits at lists.llvm.org
Thu May 22 21:12:21 PDT 2025


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@@ -1633,6 +1633,9 @@ LoongArchAsmParser::validateTargetOperandClass(MCParsedAsmOperand &AsmOp,
     return Match_Success;
   }
 
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heiher wrote:

Thanks! These are already covered:

https://github.com/llvm/llvm-project/blob/8d30c73505d3e3f87a4ace7d81ebaa96f5689e7f/llvm/test/MC/LoongArch/Basic/Privilege/valid.s#L24-L26

https://github.com/llvm/llvm-project/blob/8d30c73505d3e3f87a4ace7d81ebaa96f5689e7f/llvm/test/MC/LoongArch/Basic/Privilege/invalid.s#L4-L8

https://github.com/llvm/llvm-project/pull/140862


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