[llvm] [DirectX] scalarize the dx.isinf intrinsic (PR #140638)

[Sarah Spall via llvm-commits]

https://github.com/spall created https://github.com/llvm/llvm-project/pull/140638

The DXIL IsInf op only takes scalars.
Closes #140577

>From c442c46bb4a195647c52b8c0e4c2a50e0e709fb5 Mon Sep 17 00:00:00 2001
From: Sarah Spall <sarahspall at microsoft.com>
Date: Mon, 19 May 2025 15:31:44 -0700
Subject: [PATCH] scalarize isinf + test

---
 .../DirectX/DirectXTargetTransformInfo.cpp    |  2 ++
 llvm/test/CodeGen/DirectX/isinf.ll            | 24 +++++++++++++++----
 2 files changed, 22 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp b/llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
index 94ebe07d3783b..e426c5249f930 100644
--- a/llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
+++ b/llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
@@ -29,6 +29,7 @@ bool DirectXTTIImpl::isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID,
                                                             int OpdIdx) const {
   switch (ID) {
   case Intrinsic::dx_asdouble:
+  case Intrinsic::dx_isinf:
     return OpdIdx == 0;
   default:
     return OpdIdx == -1;
@@ -43,6 +44,7 @@ bool DirectXTTIImpl::isTargetIntrinsicTriviallyScalarizable(
   case Intrinsic::dx_firstbitshigh:
   case Intrinsic::dx_firstbituhigh:
   case Intrinsic::dx_frac:
+  case Intrinsic::dx_isinf:
   case Intrinsic::dx_rsqrt:
   case Intrinsic::dx_saturate:
   case Intrinsic::dx_splitdouble:
diff --git a/llvm/test/CodeGen/DirectX/isinf.ll b/llvm/test/CodeGen/DirectX/isinf.ll
index 2bd83e94b9708..461553b533ae1 100644
--- a/llvm/test/CodeGen/DirectX/isinf.ll
+++ b/llvm/test/CodeGen/DirectX/isinf.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s
+; RUN: opt -S -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s
 
 ; Make sure dxil operation function calls for isinf are generated for float and half.
 
@@ -16,7 +16,23 @@ entry:
   ret i1 %dx.isinf
 }
 
-; CHECK: attributes #[[#ATTR]] = {{{.*}} memory(none) {{.*}}}
+define noundef <4 x i1> @isinf_half4(<4 x half> noundef %p0) {
+entry:
+  ; CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half
+  ; CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half
+  ; CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half
+  ; CHECK: call i1 @dx.op.isSpecialFloat.f16(i32 9, half
+  %hlsl.isinf = call <4 x i1> @llvm.dx.isinf.v4f16(<4 x half> %p0)
+  ret <4 x i1> %hlsl.isinf
+}
 
-declare i1 @llvm.dx.isinf.f16(half)
-declare i1 @llvm.dx.isinf.f32(float)
+define noundef <3 x i1> @isinf_float3(<3 x float> noundef %p0) {
+entry:
+  ; CHECK: call i1 @dx.op.isSpecialFloat.f32(i32 9, float
+  ; CHECK: call i1 @dx.op.isSpecialFloat.f32(i32 9, float
+  ; CHECK: call i1 @dx.op.isSpecialFloat.f32(i32 9, float
+  %hlsl.isinf = call <3 x i1> @llvm.dx.isinf.v3f32(<3 x float> %p0)
+  ret <3 x i1> %hlsl.isinf
+}
+
+; CHECK: attributes #[[#ATTR]] = {{{.*}} memory(none) {{.*}}}