[llvm] [AMDGPU] Move InferAddressSpacesPass to middle end optimization pipeline (PR #138604)

[Shilei Tian via llvm-commits]

shiltian wrote:

> Can we get some tests in test/Transforms/PhaseOrdering/ for this

I'm not really sure how to make a test that can meet the requirements of  inline, SROA, and InferAddrSpace at the same time.

https://github.com/llvm/llvm-project/pull/138604