[llvm] [RISCV] Add a pass to eliminate special copies in order to facilitate shrink-wrap optimization (PR #140716)

[Craig Topper via llvm-commits]

topperc wrote:

> This work was originally motivated by spec cpu 473, which revealed that LLVM's shrink wrapping implementation performs poorly in certain cases.
> 
> ```
> t4: i64,ch = CopyFromReg t0, Register:i64 %1
> t8: i64 = AssertZext t4, ValueType:ch:i32
> t11: ch = CopyToReg t0, Register:i64 %2, t8
> ```
> 
> This pass only works because there is a type promotion involved; without the type promotion, it wouldn't be effective.
> 
> The reason for adding this pass is that it operates on the full register, which makes it safer.

How much performance does this give for 473? As Philip said, this pass seems somewhat unprincipled and relies on SelectionDAG creating extra copies due to a quirk of its implementation. If that quirk changes (or if we switch to GISel) this pass will stop working.

https://github.com/llvm/llvm-project/pull/140716