[llvm] [LoongArch] Allow delayed decision for ADD/SUB relocations (PR #72960)
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Sat May 24 17:44:43 PDT 2025
================
@@ -190,6 +218,56 @@ bool LoongArchAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
return true;
}
+bool LoongArchAsmBackend::handleAddSubRelocations(const MCAsmLayout &Layout,
+ const MCFragment &F,
+ const MCFixup &Fixup,
+ const MCValue &Target,
+ uint64_t &FixedValue) const {
+ std::pair<MCFixupKind, MCFixupKind> FK;
+ uint64_t FixedValueA, FixedValueB;
+ const MCSection &SecA = Target.getSymA()->getSymbol().getSection();
+ const MCSection &SecB = Target.getSymB()->getSymbol().getSection();
+
+ // We need record relocation if SecA != SecB. Usually SecB is same as the
+ // section of Fixup, which will be record the relocation as PCRel. If SecB
+ // is not same as the section of Fixup, it will report error. Just return
+ // false and then this work can be finished by handleFixup.
+ if (&SecA != &SecB)
----------------
MaskRay wrote:
I've streamlined the relocation generation framework, eliminating numerous redundant relocations for RISC-V. The code is now housed in LoongArchAsmBackend::addReloc. I'm curious if this needs any follow-up.
https://github.com/llvm/llvm-project/pull/72960
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