[llvm] [LV] Support strided load with a stride of -1 (PR #128718)

[Mel Chen via llvm-commits]

Mel-Chen wrote:

I’ve removed CM_Strided and moved the generation of strided access recipes entirely into the VPlan transformation phase. Please take a look, thanks.

Here are some potential issues that are currently masked because we only convert reverse accesses at the moment, but they may need to be addressed in the future:
1. Uniform and scalar analysis:
If the original memory recipe is not consecutive, the address for strided accesses is still treated as a vector address instead of a scalar one. This will result in suboptimal performance.

2. Interleaved accesses:
At the moment, interleave groups are determined by the legacy cost model, and they are created after the conversion to strided accesses. However, some interleaved accesses could be converted into multiple strided accesses instead. To support this, we’ll need to revisit the order and interaction between generating interleave groups and strided recipes.

https://github.com/llvm/llvm-project/pull/128718