[llvm] [AMDGPU] Handle CreateBinOp not returning BinaryOperator (PR #137791)

[via llvm-commits]

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@@ -0,0 +1,11 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -O1 < %s | FileCheck -check-prefix=GCN %s
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anjenner wrote:

I can't, because this test only works at -O1 and none of the existing div-rem IR expansion tests use that optimisation level. I've renamed the test to srem_zero_zero.ll.

https://github.com/llvm/llvm-project/pull/137791