The Week Of Monday 19 February 2024 Archives by author
Starting: Mon Feb 19 00:02:38 PST 2024
Ending: Sun Feb 25 23:56:02 PST 2024
Messages: 4741
- [clang] [flang] [llvm] [Documentation] Replace recommonmark by myst-parser (PR #65664)
Aaron Ballman via llvm-commits
- [clang] [flang] [llvm] [Documentation] Replace recommonmark by myst-parser (PR #65664)
Aaron Ballman via llvm-commits
- [clang] [flang] [llvm] [Documentation] Replace recommonmark by myst-parser (PR #65664)
Aaron Ballman via llvm-commits
- [clang] [flang] [llvm] [Docs] Allow building man pages without myst_parser (PR #82402)
Aaron Ballman via llvm-commits
- [clang] [flang] [llvm] [Docs] Allow building man pages without myst_parser (PR #82402)
Aaron Ballman via llvm-commits
- [llvm] repair and re-enable Windows buildkite presubmit (PR #82393)
Aaron Ballman via llvm-commits
- [llvm] repair and re-enable Windows buildkite presubmit (PR #82393)
Aaron Ballman via llvm-commits
- [llvm] repair and re-enable Windows buildkite presubmit (PR #82393)
Aaron Ballman via llvm-commits
- [llvm] [mlir] Add missing dialects to C API (PR #82190)
Aart Bik via llvm-commits
- [llvm] [mlir] [mlir][sparse] remove very thin header file from sparse runtime support (PR #82820)
Aart Bik via llvm-commits
- [llvm] [mlir] [mlir][sparse] remove very thin header file from sparse runtime support (PR #82820)
Aart Bik via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Abhina Sree via llvm-commits
- [llvm] [mlir] [mlir][python] Fix generation of Python bindings for `async` dialect (PR #75960)
Abhishek Kulkarni via llvm-commits
- [llvm] [mlir] [mlir][python] Fix generation of Python bindings for `async` dialect (PR #75960)
Abhishek Kulkarni via llvm-commits
- [llvm] Imprecise switch case (PR #82795)
Acim Maravic via llvm-commits
- [llvm] Imprecise switch case (PR #82795)
Acim Maravic via llvm-commits
- [llvm] [mlir] Users/tsitdikov (PR #82757)
Adrian Kuegel via llvm-commits
- [llvm] [mlir] Users/tsitdikov (PR #82757)
Adrian Kuegel via llvm-commits
- [llvm] [LLVM][DebugInfo] Refactor some code for easier sharing. (PR #82153)
Adrian Prantl via llvm-commits
- [llvm] [LLVM][DebugInfo] Refactor some code for easier sharing. (PR #82153)
Adrian Prantl via llvm-commits
- [lldb] [llvm] [ptrauth] Teach LLVM & LLDB about LLVM_ptrauth_authentication_mode (PR #82272)
Adrian Prantl via llvm-commits
- [llvm] lldbDataFormatters: fix type error in StringRef printer (PR #82554)
Adrian Prantl via llvm-commits
- [llvm] lldbDataFormatters: fix type error in StringRef printer (PR #82554)
Adrian Prantl via llvm-commits
- [llvm] [DebugInfo][LoopIdiomRecognize] Fix #82582: Wrong debug location update in processLoopStoreOfLoopLoad (PR #82608)
Adrian Prantl via llvm-commits
- [llvm] [DebugInfo][LoopIdiomRecognize] Fix #82582: Wrong debug location update in processLoopStoreOfLoopLoad (PR #82608)
Adrian Prantl via llvm-commits
- [llvm] [DebugInfo][LoopIdiomRecognize] Fix #82582: Wrong debug location update in processLoopStoreOfLoopLoad (PR #82608)
Adrian Prantl via llvm-commits
- [llvm] [llvm-exegesis] Add branch miss validation counter (PR #81094)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Add debug option to print per-measurement values (PR #81219)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Add debug option to print per-measurement values (PR #81219)
Aiden Grossman via llvm-commits
- [llvm] [Docs][llvm-exegesis] Add documentation on validation counters option (PR #82132)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Add debug option to print per-measurement values (PR #81219)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Simplify validation event string conversion functions (PR #82092)
Aiden Grossman via llvm-commits
- [llvm] [python] Bump Python minimum version to 3.8 (PR #78828)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis][NFC] Refactor all `ValidationEvent` info in a single … (PR #82256)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis][NFC] Refactor all `ValidationEvent` info in a single … (PR #82256)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis][NFC] Refactor all `ValidationEvent` info in a single … (PR #82256)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Simplify validation event string conversion functions (PR #82092)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Simplify validation event string conversion functions (PR #82092)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add ability to filter jobs in job counting script (PR #82136)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add ability to record jobs over time to job counting script (PR #82137)
Aiden Grossman via llvm-commits
- [llvm] [Github] Add ability to record jobs over time to job counting script (PR #82137)
Aiden Grossman via llvm-commits
- [llvm] [python] Bump Python minimum version to 3.8 (PR #78828)
Aiden Grossman via llvm-commits
- [llvm] 2dfa30d - Revert "[python] Bump Python minimum version to 3.8 (#78828)"
Aiden Grossman via llvm-commits
- [llvm] [python] Bump Python minimum version to 3.8 (PR #78828)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis][NFC] Refactor all `ValidationEvent` info in a single … (PR #82256)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis][NFC] Refactor all `ValidationEvent` info in a single … (PR #82256)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis][NFC] Refactor all `ValidationEvent` info in a single … (PR #82256)
Aiden Grossman via llvm-commits
- [llvm] [infra] Add git to Linux container (PR #82687)
Aiden Grossman via llvm-commits
- [llvm] [infra] Add git to Linux container (PR #82687)
Aiden Grossman via llvm-commits
- [llvm] [infra] Add git to Linux container (PR #82687)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Remove exegesis prefix in exegesis namespace (PR #82871)
Aiden Grossman via llvm-commits
- [llvm] 60a904b - [llvm-exegesis] Fix typos in README
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Add loop-register snippet annotation (PR #82873)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Remove exegesis prefix in exegesis namespace (PR #82871)
Aiden Grossman via llvm-commits
- [clang] [llvm] [mlir] [OpenMP] Migrate GPU Reductions CodeGen from Clang to OMPIRBuilder (PR #80343)
Akash Banerjee via llvm-commits
- [clang] [llvm] [CodeGen][arm64e] Add methods and data members to Address, which are needed to authenticate signed pointers (PR #67454)
Akira Hatanaka via llvm-commits
- [clang] [llvm] [CodeGen][arm64e] Add methods and data members to Address, which are needed to authenticate signed pointers (PR #67454)
Akira Hatanaka via llvm-commits
- [llvm] Implement MCDCTVIdxBuilder (LLVM side) (PR #80676)
Alan Phipps via llvm-commits
- [llvm] [NFC] Precommit a coroutine test for LoopRotate (PR #82031)
Alan Zhao via llvm-commits
- [llvm] [NFC] Precommit a coroutine test for LoopRotate (PR #82031)
Alan Zhao via llvm-commits
- [llvm] [LoopRotate][coroutines] Avoid hoisting addresses of thread-local variables outside loops in coroutines (PR #81937)
Alan Zhao via llvm-commits
- [llvm] [LoopRotate][coroutines] Avoid hoisting addresses of thread-local variables outside loops in coroutines (PR #81937)
Alan Zhao via llvm-commits
- [llvm] [LoopRotate][coroutines] Avoid hoisting addresses of thread-local variables outside loops in coroutines (PR #81937)
Alan Zhao via llvm-commits
- [llvm] [LoopRotate][coroutines] Avoid hoisting addresses of thread-local variables outside loops in coroutines (PR #81937)
Alan Zhao via llvm-commits
- [llvm] [LoopRotate][coroutines] Avoid hoisting addresses of thread-local variables outside loops in coroutines (PR #81937)
Alan Zhao via llvm-commits
- [llvm] [LoopRotate][coroutines] Avoid hoisting addresses of thread-local variables outside loops in coroutines (PR #81937)
Alan Zhao via llvm-commits
- [llvm] Make lldbDataFormatters.py compatible with Python 3.8 (PR #82518)
Alex Langford via llvm-commits
- [llvm] [NVPTX] fixup support for unaligned parameters and returns (PR #82562)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] fixup support for unaligned parameters and returns (PR #82562)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] fixup support for unaligned parameters and returns (PR #82562)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] fixup support for unaligned parameters and returns (PR #82562)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] fixup support for unaligned parameters and returns (PR #82562)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] fixup support for unaligned parameters and returns (PR #82562)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] fixup support for unaligned parameters and returns (PR #82562)
Alex MacLean via llvm-commits
- [llvm] Make lldbDataFormatters.py compatible with Python 3.8 (PR #82518)
Alexander Richardson via llvm-commits
- [llvm] Make lldbDataFormatters.py compatible with Python 3.8 (PR #82518)
Alexander Richardson via llvm-commits
- [llvm] [ADT] Add standalone_debug attribute to SmallVectorBase (PR #82527)
Alexander Richardson via llvm-commits
- [compiler-rt] Unbreak *tf builtins for hexfloat (PR #82208)
Alexander Richardson via llvm-commits
- [llvm] [ADT] Add standalone_debug attribute to SmallVectorBase (PR #82527)
Alexander Richardson via llvm-commits
- [llvm] [ADT] Add standalone_debug attribute to SmallVectorBase (PR #82527)
Alexander Richardson via llvm-commits
- [llvm] [ADT] Add standalone_debug attribute to SmallVectorBase (PR #82527)
Alexander Richardson via llvm-commits
- [llvm] [ADT] Add standalone_debug attribute to SmallVectorBase (PR #82527)
Alexander Richardson via llvm-commits
- [llvm] lldbDataFormatters: fix type error in StringRef printer (PR #82554)
Alexander Richardson via llvm-commits
- [llvm] [UTC] Don't leave dangling CHECK-SAME when removing CHECK lines (PR #82569)
Alexander Richardson via llvm-commits
- [llvm] [UTC] Don't leave dangling CHECK-SAME when removing CHECK lines (PR #82569)
Alexander Richardson via llvm-commits
- [compiler-rt] Found one more delta to unbreak build for z/os (PR #82789)
Alexander Richardson via llvm-commits
- [llvm] lldbDataFormatters: fix type error in StringRef printer (PR #82554)
Alexander Richardson via llvm-commits
- [llvm] lldbDataFormatters: fix type error in StringRef printer (PR #82554)
Alexander Richardson via llvm-commits
- [llvm] lldbDataFormatters: fix type error in StringRef printer (PR #82554)
Alexander Richardson via llvm-commits
- [llvm] [UTC] Don't leave dangling CHECK-SAME when removing CHECK lines (PR #82569)
Alexander Richardson via llvm-commits
- [clang] [clang-tools-extra] [compiler-rt] [flang] [libclc] [libcxx] [lld] [lldb] [llvm] [NFC] Remove trailing whitespace across all non-test related files (PR #82838)
Alexander Richardson via llvm-commits
- [llvm] Enable JumpTableToSwitch pass by default (PR #82546)
Alexander Shaposhnikov via llvm-commits
- [llvm] Enable JumpTableToSwitch pass by default (PR #82546)
Alexander Shaposhnikov via llvm-commits
- [llvm] Enable JumpTableToSwitch pass by default (PR #82546)
Alexander Shaposhnikov via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] CHange isDWO (PR #82540)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] CHange isDWO (PR #82540)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Change isDWO (PR #82540)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Refactor DebugStrOffsetsWriter (PR #82548)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF][NFC] Use SkeletonCU in place of IsDWO check (PR #82540)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF][NFC] Use SkeletonCU in place of IsDWO check (PR #82540)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF][NFC] Expose DebugStrOffsetsWriter::clear (PR #82548)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF][NFC] Expose DebugStrOffsetsWriter::clear (PR #82548)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF][NFC] Expose DebugStrOffsetsWriter::clear (PR #82548)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF][NFC] Expose DebugStrOffsetsWriter::clear (PR #82548)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF][NFC] Expose DebugStrOffsetsWriter::clear (PR #82548)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT] Fix runtime/instrument-wrong-target.s test (PR #82858)
Alexander Yermolovich via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an impleme… (PR #82094)
Alexandre Ganea via llvm-commits
- [clang] [llvm] [mlir] Rename `ThreadPool::getThreadCount()` to `getMaxConcurrency()` (NFC) (PR #82296)
Alexandre Ganea via llvm-commits
- [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)
Alexandre Ganea via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an impleme… (PR #82094)
Alexandre Ganea via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an impleme… (PR #82094)
Alexandre Ganea via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an impleme… (PR #82094)
Alexandre Ganea via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an impleme… (PR #82094)
Alexandre Ganea via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an impleme… (PR #82094)
Alexandre Ganea via llvm-commits
- [llvm] [LV][NFC]Preselect folding style before choosing maxing VF, NFC. (PR #81885)
Alexey Bataev via llvm-commits
- [llvm] [LV][NFC]Preselect folding style before choosing maxing VF, NFC. (PR #81885)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Add runtime stride support for strided loads. (PR #81517)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improve minbitwidth analysis. (PR #78976)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improve minbitwidth analysis. (PR #78976)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improve findReusedOrderedScalars and graph rotation. (PR #77529)
Alexey Bataev via llvm-commits
- [llvm] 35f4592 - [SLP][NFC]Add asserts for undef handling in PHIComparator, NFC.
Alexey Bataev via llvm-commits
- [llvm] [TTI][RISCV]Improve costs for whole vector reg extract/insert. (PR #80164)
Alexey Bataev via llvm-commits
- [llvm] [TTI][RISCV]Improve costs for whole vector reg extract/insert. (PR #80164)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improve minbitwidth analysis. (PR #78976)
Alexey Bataev via llvm-commits
- [llvm] [LV][NFC]Preselect folding style before choosing maxing VF, NFC. (PR #81885)
Alexey Bataev via llvm-commits
- [llvm] [SLP] Initial vectorization of non-power-of-2 ops. (PR #77790)
Alexey Bataev via llvm-commits
- [llvm] [SLP] Initial vectorization of non-power-of-2 ops. (PR #77790)
Alexey Bataev via llvm-commits
- [llvm] [SLP] Initial vectorization of non-power-of-2 ops. (PR #77790)
Alexey Bataev via llvm-commits
- [llvm] [LV][NFC]Preselect folding style before choosing maxing VF, NFC. (PR #81885)
Alexey Bataev via llvm-commits
- [llvm] [LV][NFC]Preselect folding style before choosing maxing VF, NFC. (PR #81885)
Alexey Bataev via llvm-commits
- [llvm] [TTI][RISCV]Improve costs for whole vector reg extract/insert. (PR #80164)
Alexey Bataev via llvm-commits
- [llvm] [TTI][RISCV]Improve costs for whole vector reg extract/insert. (PR #80164)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Add runtime stride support for strided loads. (PR #81517)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Add runtime stride support for strided loads. (PR #81517)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Add runtime stride support for strided loads. (PR #81517)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Add runtime stride support for strided loads. (PR #81517)
Alexey Bataev via llvm-commits
- [llvm] [TTI][RISCV]Improve costs for whole vector reg extract/insert. (PR #80164)
Alexey Bataev via llvm-commits
- [llvm] [AArch64] SLP can vectorize frem (PR #82488)
Alexey Bataev via llvm-commits
- [llvm] [AArch64] SLP can vectorize frem (PR #82488)
Alexey Bataev via llvm-commits
- [llvm] [AArch64] SLP can vectorize frem (PR #82488)
Alexey Bataev via llvm-commits
- [llvm] [AArch64] SLP can vectorize frem (PR #82488)
Alexey Bataev via llvm-commits
- [llvm] [TTI][RISCV]Improve costs for whole vector reg extract/insert. (PR #80164)
Alexey Bataev via llvm-commits
- [llvm] [LV][NFC]Preselect folding style before choosing maxing VF, NFC. (PR #81885)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improve minbitwidth analysis. (PR #78976)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improve minbitwidth analysis. (PR #78976)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improve findReusedOrderedScalars and graph rotation. (PR #77529)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Improve minbitwidth analysis. (PR #78976)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Add runtime stride support for strided loads. (PR #81517)
Alexey Bataev via llvm-commits
- [llvm] [TTI][RISCV]Improve costs for whole vector reg extract/insert. (PR #80164)
Alexey Bataev via llvm-commits
- [llvm] [LV][NFC]Preselect folding style before choosing maxing VF, NFC. (PR #81885)
Alexey Bataev via llvm-commits
- [llvm] [dsymutil][DWARFLinker] Refactor handling mergeable libraries. (PR #80615)
Alexey Lapshin via llvm-commits
- [llvm] [NewPM/CodeGen] Rewrite pass manager nesting (PR #81068)
Alina Sbirlea via llvm-commits
- [llvm] [AArch64][AMDGPU][GlobalISel] Remove vector handling from unmerge_dead_to_trunc (PR #82224)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Combine logic of floating point compares (PR #81886)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Combine logic of floating point compares (PR #81886)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Combine logic of floating point compares (PR #81886)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Combine logic of floating point compares (PR #81886)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Combine logic of floating point compares (PR #81886)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Combine logic of floating point compares (PR #81886)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Legalize Insert vector element (PR #81453)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] Fix a check that aligned tail call is lowered (PR #82016)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Combine logic of floating point compares (PR #81886)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Combine ADDE (PR #82413)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Combine ADDE (PR #82413)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Combine ADDE (PR #82413)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Combine ADDE (PR #82413)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Combine ADDE (PR #82413)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Combine ADDE (PR #82413)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Combine ADDE (PR #82413)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Combine ADDE (PR #82413)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Combine ADDE (PR #82413)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Legalize G_STORE for v4s8 vector (PR #82498)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Legalize G_STORE for v4s8 vector (PR #82498)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Legalize G_STORE for v4s8 vector (PR #82498)
Amara Emerson via llvm-commits
- [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)
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- [llvm] [PowerPC] Do not generate `isel` instruction if target doesn't have this instruction (PR #72845)
Chen Zheng via llvm-commits
- [llvm] [PPC] adjust cost for extract i64 from vector on P9 and above (PR #82963)
Chen Zheng via llvm-commits
- [llvm] [PowerPC] adjust cost for extract i64 from vector on P9 and above (PR #82963)
Chen Zheng via llvm-commits
- [llvm] [WebAssembly] Disable multivalue emission temporarily (PR #82714)
Cheng Shao via llvm-commits
- [llvm] [WebAssembly] Disable multivalue emission temporarily (PR #82714)
Cheng Shao via llvm-commits
- [llvm] [DirectX][NFC] Use LLVM Types in DXIL Operation specifications in DXIL.td (PR #81692)
Chris B via llvm-commits
- [llvm] [DirectX][NFC] Use LLVM Types in DXIL Operation specifications in DXIL.td (PR #81692)
Chris B via llvm-commits
- [llvm] [DirectX][NFC] Use LLVM Types in DXIL Operation specifications in DXIL.td (PR #81692)
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- [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)
Chris B via llvm-commits
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Chris B via llvm-commits
- [llvm] [DirectX][NFC] Rename ShaderFlag to Shader_FEATURE_INFO. (PR #82700)
Chris B via llvm-commits
- [llvm] [DirectX][NFC] Rename ShaderFlag to Shader_FEATURE_INFO. (PR #82700)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)
Chris B via llvm-commits
- [clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)
Chris B via llvm-commits
- [compiler-rt] [scudo] Store more blocks in each TransferBatch (PR #70390)
Christopher Ferris via llvm-commits
- [llvm] [llvm-exegesis] Simplify validation event string conversion functions (PR #82092)
Clement Courbet via llvm-commits
- [llvm] [Docs][llvm-exegesis] Add documentation on validation counters option (PR #82132)
Clement Courbet via llvm-commits
- [llvm] [llvm-exegesis] Add debug option to print per-measurement values (PR #81219)
Clement Courbet via llvm-commits
- [llvm] [llvm-exegesis] Add branch miss validation counter (PR #81094)
Clement Courbet via llvm-commits
- [llvm] [llvm-exegesis] Simplify validation event string conversion functions (PR #82092)
Clement Courbet via llvm-commits
- [llvm] [llvm-exegesis][NFC] Refactor all `ValidationEvent` info in a single … (PR #82256)
Clement Courbet via llvm-commits
- [llvm] [llvm-exegesis] Simplify validation event string conversion functions (PR #82092)
Clement Courbet via llvm-commits
- [llvm] [llvm-exegesis][NFC] Refactor all `ValidationEvent` info in a single … (PR #82256)
Clement Courbet via llvm-commits
- [llvm] [llvm-exegesis][NFC] Refactor all `ValidationEvent` info in a single … (PR #82256)
Clement Courbet via llvm-commits
- [llvm] [llvm][SimplifyLibCalls] Add option 'AllowMemcmpToBcmpTransform' (PR #82304)
Clement Courbet via llvm-commits
- [llvm] [llvm-exegesis][NFC] Refactor all `ValidationEvent` info in a single … (PR #82256)
Clement Courbet via llvm-commits
- [llvm] [llvm-exegesis] Remove exegesis prefix in exegesis namespace (PR #82871)
Clement Courbet via llvm-commits
- [llvm] [llvm-exegesis] Add loop-register snippet annotation (PR #82873)
Clement Courbet via llvm-commits
- [llvm] [llvm-exegesis] Add loop-register snippet annotation (PR #82873)
Clement Courbet via llvm-commits
- [llvm] [llvm-exegesis] Add loop-register snippet annotation (PR #82873)
Clement Courbet via llvm-commits
- [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)
Connor Sughrue via llvm-commits
- [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)
Connor Sughrue via llvm-commits
- [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)
Connor Sughrue via llvm-commits
- [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)
Connor Sughrue via llvm-commits
- [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)
Connor Sughrue via llvm-commits
- [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)
Connor Sughrue via llvm-commits
- [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)
Connor Sughrue via llvm-commits
- [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)
Connor Sughrue via llvm-commits
- [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function to free up a bit slot (PR #82787)
Corbin Robeck via llvm-commits
- [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function to free up a bit slot (PR #82787)
Corbin Robeck via llvm-commits
- [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function to free up a bit slot (PR #82787)
Corbin Robeck via llvm-commits
- [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function to free up a bit slot (PR #82787)
Corbin Robeck via llvm-commits
- [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function to free up a bit slot (PR #82787)
Corbin Robeck via llvm-commits
- [llvm] [DAGCombiner][RISCV] Optimize (zext nneg (truncate X)) if X has known sign bits. (PR #82227)
Craig Topper via llvm-commits
- [llvm] b1849a2 - [RISCV] Add test cases for missed opportunites to treat a zext nneg as sext. NFC
Craig Topper via llvm-commits
- [llvm] [DAGCombiner][RISCV] Optimize (zext nneg (truncate X)) if X has known sign bits. (PR #82227)
Craig Topper via llvm-commits
- [llvm] [DAGCombiner][RISCV] Optimize (zext nneg (truncate X)) if X has known sign bits. (PR #82227)
Craig Topper via llvm-commits
- [llvm] [DAGCombiner] Preserve nneg flag from inner zext when we combine (z/s/aext (zext X)) (PR #82199)
Craig Topper via llvm-commits
- [llvm] [DAGCombiner] Preserve nneg flag from inner zext when we combine (z/s/aext (zext X)) (PR #82199)
Craig Topper via llvm-commits
- [llvm] 2426055 - [RISCV] Add more zext nneg tests. NFC
Craig Topper via llvm-commits
- [llvm] [DAGCombiner] Preserve nneg flag from inner zext when we combine (z/s/aext (zext X)) (PR #82199)
Craig Topper via llvm-commits
- [llvm] [DAGCombiner] Preserve nneg flag from inner zext when we combine (z/s/aext (zext X)) (PR #82199)
Craig Topper via llvm-commits
- [llvm] [DAGCombiner] Preserve nneg flag from inner zext when we combine (z/s/aext (zext X)) (PR #82199)
Craig Topper via llvm-commits
- [llvm] [X86][GlobalISel] Enable G_SDIV/G_UDIV/G_SREM/G_UREM (PR #81615)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Support RISC-V Profiles in -march option (PR #76357)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Support RISC-V Profiles in -march option (PR #76357)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Support RISC-V Profiles in -march option (PR #76357)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Support RISC-V Profiles in -march option (PR #76357)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Support RISC-V Profiles in -march option (PR #76357)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Support RISC-V Profiles in -march option (PR #76357)
Craig Topper via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/substraction and RISC-V support. (PR #82370)
Craig Topper via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/substraction and RISC-V support. (PR #82370)
Craig Topper via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/substraction and RISC-V support. (PR #82370)
Craig Topper via llvm-commits
- [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)
Craig Topper via llvm-commits
- [llvm] Resolve fixme: create cld only when needed (PR #82415)
Craig Topper via llvm-commits
- [llvm] select m, sub/add(X, C), X --> sub/add (X, and(C, m)) (PR #82441)
Craig Topper via llvm-commits
- [llvm] select m, sub/add(X, C), X --> sub/add (X, and(C, m)) (PR #82441)
Craig Topper via llvm-commits
- [llvm] [X86] Add missing pass initialization calls. (PR #82447)
Craig Topper via llvm-commits
- [llvm] [CGP] Permit tail call optimization on undefined return value (PR #82419)
Craig Topper via llvm-commits
- [llvm] [RISCV] Vector sub (zext, zext) -> sext (sub (zext, zext)) (PR #82455)
Craig Topper via llvm-commits
- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
Craig Topper via llvm-commits
- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
Craig Topper via llvm-commits
- [llvm] [RISCV][SDAG] Improve codegen of select with constants if zicond is available (PR #82456)
Craig Topper via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/substraction and RISC-V support. (PR #82370)
Craig Topper via llvm-commits
- [llvm] [X86] Add missing pass initialization calls. (PR #82447)
Craig Topper via llvm-commits
- [llvm] [CodeGen][MISched] Add misched post-regalloc bottom-up scheduling (PR #76186)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use TImmLeaf for csr_sysreg (PR #82463)
Craig Topper via llvm-commits
- [llvm] [RISCV][SDAG] Fold `select c, ~x, x` into `xor -c, x` (PR #82462)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use TImmLeaf for csr_sysreg (PR #82463)
Craig Topper via llvm-commits
- [llvm] [RISCV] Fix scheduling info for C_FSW and C_FSWSP. (PR #82339)
Craig Topper via llvm-commits
- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
Craig Topper via llvm-commits
- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
Craig Topper via llvm-commits
- [llvm] [RISCV] Vector sub (zext, zext) -> sext (sub (zext, zext)) (PR #82455)
Craig Topper via llvm-commits
- [llvm] [RISCV] Vector sub (zext, zext) -> sext (sub (zext, zext)) (PR #82455)
Craig Topper via llvm-commits
- [llvm] [RISCV] Fix mgather -> riscv.masked.strided.load combine not extending indices (PR #82506)
Craig Topper via llvm-commits
- [llvm] [InstCombine] Canonicalize `(uitofp x)` -> `(sitofp x)` if `x >= 0` (PR #82404)
Craig Topper via llvm-commits
- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
Craig Topper via llvm-commits
- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
Craig Topper via llvm-commits
- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
Craig Topper via llvm-commits
- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
Craig Topper via llvm-commits
- [llvm] [TableGen] Suppress per-HwMode duplicate instructions/tables. (PR #82567)
Craig Topper via llvm-commits
- [llvm] [RISCV] Fix mgather -> riscv.masked.strided.load combine not extending indices (PR #82506)
Craig Topper via llvm-commits
- [llvm] [LoopIdiomRecognizer] Implement CRC recognition (PR #79295)
Craig Topper via llvm-commits
- [llvm] [LoopIdiomRecognizer] Implement CRC recognition (PR #79295)
Craig Topper via llvm-commits
- [llvm] [LoopIdiomRecognizer] Implement CRC recognition (PR #79295)
Craig Topper via llvm-commits
- [llvm] [LoopIdiomRecognizer] Implement CRC recognition (PR #79295)
Craig Topper via llvm-commits
- [llvm] [LoopIdiomRecognizer] Implement CRC recognition (PR #79295)
Craig Topper via llvm-commits
- [llvm] [LoopIdiomRecognizer] Implement CRC recognition (PR #79295)
Craig Topper via llvm-commits
- [llvm] [LoopIdiomRecognizer] Implement CRC recognition (PR #79295)
Craig Topper via llvm-commits
- [llvm] [RISCV] Teach RISCVMakeCompressible handle Zca/Zcf/Zce/Zcd. (PR #81844)
Craig Topper via llvm-commits
- [llvm] [InjectTLIMappings] Remove signext/zeroext attributes from vector functions. (PR #80546)
Craig Topper via llvm-commits
- [llvm] [RISCV] Teach RISCVMakeCompressible handle Zca/Zcf/Zce/Zcd. (PR #81844)
Craig Topper via llvm-commits
- [llvm] [DAGCombiner][RISCV] CSE zext nneg and sext. (PR #82597)
Craig Topper via llvm-commits
- [llvm] [RISCV][SDAG] Improve codegen of select with constants if zicond is available (PR #82456)
Craig Topper via llvm-commits
- [llvm] c9afd1a - [RISCV] Add test case showing missed opportunity to form sextload when sext and zext nneg are both present. NFC
Craig Topper via llvm-commits
- [llvm] [DAGCombiner][RISCV] CSE zext nneg and sext. (PR #82597)
Craig Topper via llvm-commits
- [llvm] Try to derive registerinfo if registerinfo is null (PR #82651)
Craig Topper via llvm-commits
- [llvm] [DAGCombiner][RISCV] CSE zext nneg and sext. (PR #82597)
Craig Topper via llvm-commits
- [llvm] [RISCV] Enable -riscv-enable-sink-fold by default. (PR #82026)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG] Remove pointer from MMO for VP strided load/store. (PR #82667)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG] Remove pointer from MMO for VP strided load/store. (PR #82667)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG] Remove unused VP strided load/store creation functions that build an MMO. (PR #82676)
Craig Topper via llvm-commits
- [llvm] [RISCV] Vector sub (zext, zext) -> sext (sub (zext, zext)) (PR #82455)
Craig Topper via llvm-commits
- [llvm] [RISCV] Vector sub (zext, zext) -> sext (sub (zext, zext)) (PR #82455)
Craig Topper via llvm-commits
- [llvm] [RISCV] Vector sub (zext, zext) -> sext (sub (zext, zext)) (PR #82455)
Craig Topper via llvm-commits
- [llvm] [RISCV][NFC] Allow SchedVar to be a def inside our scheduler model files. (PR #82634)
Craig Topper via llvm-commits
- [llvm] [RISCV][NFC] Allow SchedVar to be a def inside our scheduler model files. (PR #82634)
Craig Topper via llvm-commits
- [llvm] [RISCV][NFC] Allow SchedVar to be a def inside our scheduler model files. (PR #82634)
Craig Topper via llvm-commits
- [llvm] [RISCV][NFC] Allow SchedVar to be a def inside our scheduler model files. (PR #82634)
Craig Topper via llvm-commits
- [llvm] [RISCV] Vector sub (zext, zext) -> sext (sub (zext, zext)) (PR #82455)
Craig Topper via llvm-commits
- [llvm] [RISCV] Vector sub (zext, zext) -> sext (sub (zext, zext)) (PR #82455)
Craig Topper via llvm-commits
- [llvm] [RISCV] Vector sub (zext, zext) -> sext (sub (zext, zext)) (PR #82455)
Craig Topper via llvm-commits
- [llvm] Fix non-splat vector SREM expansion when one of the divisors is a power of two. (PR #82706)
Craig Topper via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/substraction and RISC-V support. (PR #82370)
Craig Topper via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/substraction and RISC-V support. (PR #82370)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use PromoteSetCCOperands to promote operands for UMAX/UMIN during type legalization. (PR #82716)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add scheduling info for Zcmp (PR #82719)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add scheduling info for Zcmp (PR #82719)
Craig Topper via llvm-commits
- [llvm] [RISCV][WIP] Optimize sum of absolute differences pattern. (PR #82722)
Craig Topper via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Craig Topper via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Craig Topper via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Craig Topper via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG][RISCV] Use FP type for legality query for LRINT/LLRINT in LegalizeVectorOps. (PR #82728)
Craig Topper via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/substraction and RISC-V support. (PR #82370)
Craig Topper via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/subtraction and RISC-V support. (PR #82370)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add scheduling info for Zcmp (PR #82719)
Craig Topper via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG][RISCV] Use FP type for legality query for LRINT/LLRINT in LegalizeVectorOps. (PR #82728)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use PromoteSetCCOperands to promote operands for UMAX/UMIN during type legalization. (PR #82716)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG] Improve isOrEquivalentToAdd (PR #82767)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG] Improve isOrEquivalentToAdd (PR #82767)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add scheduling info for Zcmp (PR #82719)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add scheduling info for Zcmp (PR #82719)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG] Remove unused VP strided load/store creation functions that build an MMO. (PR #82676)
Craig Topper via llvm-commits
- [llvm] [RISCV][WIP] Optimize sum of absolute differences pattern. (PR #82722)
Craig Topper via llvm-commits
- [llvm] [RISCV][WIP] Optimize sum of absolute differences pattern. (PR #82722)
Craig Topper via llvm-commits
- [llvm] [RISCV][WIP] Optimize sum of absolute differences pattern. (PR #82722)
Craig Topper via llvm-commits
- [llvm] [ValueTracking] Compute knownbits for `(and/or cond0, cond1)` on both sides of branch (PR #82818)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG] Remove unused getIndexedStridedLoadVP/getIndexedStridedStoreVP functions. NFC (PR #82847)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use PromoteSetCCOperands to promote operands for UMAX/UMIN during type legalization. (PR #82716)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use PromoteSetCCOperands to promote operands for UMAX/UMIN during type legalization. (PR #82716)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use PromoteSetCCOperands to promote operands for UMAX/UMIN during type legalization. (PR #82716)
Craig Topper via llvm-commits
- [llvm] [LoongArch] Improve pattern matching for AddLike predicate (PR #82767)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG] Remove pointer from MMO for VP strided load/store. (PR #82667)
Craig Topper via llvm-commits
- [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)
Craig Topper via llvm-commits
- [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)
Craig Topper via llvm-commits
- [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)
Craig Topper via llvm-commits
- [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)
Craig Topper via llvm-commits
- [llvm] [RISCV][MC] Implement ISA mapping symbols (PR #67541)
Craig Topper via llvm-commits
- [llvm] [RISCV][MC] Implement ISA mapping symbols (PR #67541)
Craig Topper via llvm-commits
- [llvm] 163eaf3 - [CodeGen] Clean up MachineFunctionSplitter MBB safety checking (NFC)
Daniel Hoekwater via llvm-commits
- [llvm] b13c8e5 - Revert "[llvm][AArch64] Autoupgrade function attributes from Module attributes. (#80640)"
Daniel Kiss via llvm-commits
- [llvm] [AArch64] Skip over shadow space for ARM64EC entry thunk variadic calls (PR #80994)
Daniel Paoliello via llvm-commits
- [llvm] [AArch64] Skip over shadow space for ARM64EC entry thunk variadic calls (PR #80994)
Daniel Paoliello via llvm-commits
- [lld] [lld] enable fixup chains by default (PR #79894)
Daniel Rodríguez Troitiño via llvm-commits
- [lld] [lld] enable fixup chains by default (PR #79894)
Daniel Rodríguez Troitiño via llvm-commits
- [llvm] [Dwarf] Support `__ptrauth` qualifier (PR #82363)
Daniil Kovalev via llvm-commits
- [llvm] [Dwarf] Support `__ptrauth` qualifier (PR #82363)
Daniil Kovalev via llvm-commits
- [llvm] [Dwarf] Support `__ptrauth` qualifier (PR #82363)
Daniil Kovalev via llvm-commits
- [llvm] [Dwarf] Support `__ptrauth` qualifier in metadata nodes (PR #82363)
Daniil Kovalev via llvm-commits
- [llvm] [Dwarf] Support `__ptrauth` qualifier in metadata nodes (PR #82363)
Daniil Kovalev via llvm-commits
- [llvm] [Dwarf] Support `__ptrauth` qualifier in metadata nodes (PR #82363)
Daniil Kovalev via llvm-commits
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Florian Hahn via llvm-commits
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Florian Hahn via llvm-commits
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Florian Hahn via llvm-commits
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- [llvm] [ARM] Update IsRestored for LR based on all returns (PR #82745)
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- [llvm] 0b01320 - [VPlan] Remove unused VPTransformState::CanonicalIV (NFCI).
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Florian Hahn via llvm-commits
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Florian Hahn via llvm-commits
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- [llvm] 85da9f8 - [VPlan] Remove unused VPTransformState::VPValue2Value (NFCI).
Florian Hahn via llvm-commits
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Florian Hahn via llvm-commits
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Florian Hahn via llvm-commits
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Florian Hahn via llvm-commits
- [compiler-rt] [scudo] increase frames per stack to 16 for stack depot (PR #82427)
Florian Mayer via llvm-commits
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Florian Mayer via llvm-commits
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Florian Mayer via llvm-commits
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Florian Mayer via llvm-commits
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Florian Mayer via llvm-commits
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Florian Mayer via llvm-commits
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Florian Mayer via llvm-commits
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Florian Mayer via llvm-commits
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Florian Mayer via llvm-commits
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Francesco Petrogalli via llvm-commits
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Harald van Dijk via llvm-commits
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Harald van Dijk via llvm-commits
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Harald van Dijk via llvm-commits
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Igor Kudrin via llvm-commits
- [llvm] [LTO] Add an option to select a pre-link pipeline (PR #82585)
Igor Kudrin via llvm-commits
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Ikhlas Ajbar via llvm-commits
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Ivan Kosarev via llvm-commits
- [llvm] AMDGPU: Use HasFP8ConversionInsts appropriately, NFC (PR #82024)
Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
- [llvm] AMDGPU: Use HasFP8ConversionInsts appropriately, NFC (PR #82024)
Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
- [llvm] [AMDGPU] Remove DPP DecoderNamespaces. NFC. (PR #82491)
Ivan Kosarev via llvm-commits
- [llvm] [AMDGPU] Remove DPP DecoderNamespaces. NFC. (PR #82491)
Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
- [llvm] [AMDGPU] Simplify AMDGPUDisassembler::getInstruction by removing Res. (PR #82775)
Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
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Jacek Caban via llvm-commits
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Jacek Caban via llvm-commits
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Jacek Caban via llvm-commits
- [llvm] [AArch64] Mangle names of all ARM64EC functions with entry thunks (PR #80996)
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Jacek Caban via llvm-commits
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- [llvm] [llvm-ar] Use COFF archive format for COFF targets. (PR #82642)
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- [llvm] Revert "[llvm-ar] Use COFF archive format for COFF targets." (PR #82889)
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- [llvm] [llvm-ar][Object] Use K_GNU instead of K_COFF for archives with no symtab. (PR #82898)
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- [llvm] [CodeGen] [ARM] Make RISC-V Init Undef Pass Target Independent and add support for the ARM Architecture. (PR #77770)
Jack Styles via llvm-commits
- [llvm] [CodeGen] [ARM] Make RISC-V Init Undef Pass Target Independent and add support for the ARM Architecture. (PR #77770)
Jack Styles via llvm-commits
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Jack Styles via llvm-commits
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Jack Styles via llvm-commits
- [llvm] [CodeGen] [ARM] Make RISC-V Init Undef Pass Target Independent and add support for the ARM Architecture. (PR #77770)
Jack Styles via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
- [lld] [llvm] Support for Missing Line Numbers. (PR #82240)
James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
James Henderson via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
James Henderson via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
James Henderson via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
James Henderson via llvm-commits
- [llvm] [llvm-objcopy] Add llvm-objcopy option --set-symbol-visibility (PR #80872)
James Henderson via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
James Henderson via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
James Henderson via llvm-commits
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James Henderson via llvm-commits
- [llvm] [LLVM][DWARF] Refactor code for generating DWARF V5 .debug_names (PR #82394)
James Henderson via llvm-commits
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James Henderson via llvm-commits
- [llvm] [llvm-readobj,ELF] Support --decompress/-z (PR #82594)
James Henderson via llvm-commits
- [llvm] [llvm-readobj,ELF] Support --decompress/-z (PR #82594)
James Henderson via llvm-commits
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James Henderson via llvm-commits
- [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #82595)
James Henderson via llvm-commits
- [llvm] [llvm-readobj,ELF] Support --decompress/-z (PR #82594)
James Henderson via llvm-commits
- [llvm] [llvm-readobj,ELF] Support --decompress/-z (PR #82594)
James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
James Henderson via llvm-commits
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James Henderson via llvm-commits
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James Henderson via llvm-commits
- [llvm] R11 not preserved with PAC-M and AAPCS frame chain defect fix (PR #81249)
James Westwood via llvm-commits
- [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)
James Westwood via llvm-commits
- [llvm] Reapply [workflows] Split pr-code-format into two parts to make it more secure (#78215) (PR #80495)
James Y Knight via llvm-commits
- [llvm] Reapply [workflows] Split pr-code-format into two parts to make it more secure (#78215) (PR #80495)
James Y Knight via llvm-commits
- [llvm] Reapply [workflows] Split pr-code-format into two parts to make it more secure (#78215) (PR #80495)
James Y Knight via llvm-commits
- [clang] [libc] [llvm] [openmp] [libc] Rework the GPU build to be a regular target (PR #81921)
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- [clang] [libc] [llvm] [openmp] [libc] Rework the GPU build to be a regular target (PR #81921)
Jan Patrick Lehr via llvm-commits
- [clang] [libc] [llvm] [openmp] [libc] Rework the GPU build to be a regular target (PR #81921)
Jan Patrick Lehr via llvm-commits
- [llvm] [Offload][WIP] Move `/openmp/libomptarget` to `/offload` (PR #82459)
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- [libc] [llvm] [libc] Repurpose `LIBC_GPU_BUILD` option to enable the new format (PR #82848)
Jan Patrick Lehr via llvm-commits
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Jan Schultke via llvm-commits
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- [clang] [llvm] [clang][ScanDeps] Allow PCHs to have different VFS overlays (PR #82294)
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Jan Svoboda via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)
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- [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)
Janek van Oirschot via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)
Janek van Oirschot via llvm-commits
- [llvm] [Lint] Add option --lint-abort-on-error (PR #81999)
Jannik Silvanus via llvm-commits
- [llvm] [TableGen] Suppress per-HwMode duplicate instructions/tables. (PR #82567)
Jason Eckhardt via llvm-commits
- [llvm] [TableGen] Suppress per-HwMode duplicate instructions/tables. (PR #82567)
Jason Eckhardt via llvm-commits
- [llvm] [TableGen] Suppress per-HwMode duplicate instructions/tables. (PR #82567)
Jason Eckhardt via llvm-commits
- [llvm] [TableGen] Suppress per-HwMode duplicate instructions/tables. (PR #82567)
Jason Eckhardt via llvm-commits
- [llvm] [TableGen] Suppress per-HwMode duplicate instructions/tables. (PR #82567)
Jason Eckhardt via llvm-commits
- [llvm] [TableGen] Suppress per-HwMode duplicate instructions/tables. (PR #82567)
Jason Eckhardt via llvm-commits
- [llvm] [TableGen] Efficiency improvements for encoding HwMode collection. (PR #82902)
Jason Eckhardt via llvm-commits
- [llvm] [TableGen] Efficiency improvements for encoding HwMode collection. (PR #82902)
Jason Eckhardt via llvm-commits
- [llvm] [TableGen] Efficiency improvements for encoding HwMode collection. (PR #82902)
Jason Eckhardt via llvm-commits
- [llvm] AMDGPU: Use HasFP8ConversionInsts appropriately, NFC (PR #82024)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Stop using SDWA DecoderNamespaces. NFCI. (PR #82233)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Stop using SDWA DecoderNamespaces. NFCI. (PR #82233)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Prevent cyclic behaviour in SIFoldOperands (PR #82099)
Jay Foad via llvm-commits
- [llvm] [AMDGPU][NFC] Extend PredicateControl to support True16 predicates. (PR #82245)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [AMDGPU] Prevent cyclic behaviour in SIFoldOperands (PR #82099)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Prevent hang in SIFoldOperands (PR #82099)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Try decoding instructions longest first. NFCI. (PR #82014)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Try decoding instructions longest first. NFCI. (PR #82014)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Stop using SDWA DecoderNamespaces. NFCI. (PR #82233)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Stop using SDWA DecoderNamespaces. NFCI. (PR #82233)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Stop using SDWA DecoderNamespaces. NFCI. (PR #82233)
Jay Foad via llvm-commits
- [llvm] [DebugInfo][RemoveDIs] Set new-dbg-info flag from Modules correctly (PR #82373)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Split Dpp8FI and Dpp16FI operands (PR #82379)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Split Dpp8FI and Dpp16FI operands (PR #82379)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Split Dpp8FI and Dpp16FI operands (PR #82379)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Use autogenerated test checks for sdwa-preserve.mir test. NFC. (PR #82380)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Use autogenerated test checks for sdwa-preserve.mir test. NFC. (PR #82380)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Use autogenerated test checks for sdwa-preserve.mir test. NFC. (PR #82380)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Use autogenerated test checks for sdwa-preserve.mir test. NFC. (PR #82380)
Jay Foad via llvm-commits
- [llvm] [GlobalISel] replace right identity X * -1.0 with fneg(x) (PR #80526)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Add function attribute to force enable WQM (PR #82468)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [GlobalISel] Constant-fold G_PTR_ADD with different type sizes (PR #81473)
Jay Foad via llvm-commits
- [llvm] [GlobalISel] Constant-fold G_PTR_ADD with different type sizes (PR #81473)
Jay Foad via llvm-commits
- [llvm] [GlobalISel] replace right identity X * -1.0 with fneg(x) (PR #80526)
Jay Foad via llvm-commits
- [llvm] [GlobalISel] replace right identity X * -1.0 with fneg(x) (PR #80526)
Jay Foad via llvm-commits
- [llvm] [AMDGPU][TableGen][NFC] Combine predicates without using classes. (PR #82346)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Prevent SDWA 'preserve' transformation for instructions in different basic blocks. (PR #82406)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Prevent hang in SIFoldOperands (PR #82099)
Jay Foad via llvm-commits
- [llvm] convert dpp (PR #82480)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Clean up conversion of DPP instructions in AMDGPUDisassembler (PR #82480)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Clean up conversion of DPP instructions in AMDGPUDisassembler (PR #82480)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Clean up conversion of DPP instructions in AMDGPUDisassembler (PR #82480)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Clean up conversion of DPP instructions in AMDGPUDisassembler (PR #82480)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Add function attribute to force enable WQM (PR #82468)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Prevent SDWA 'preserve' transformation for instructions in different basic blocks. (PR #82406)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Remove DPP DecoderNamespaces. NFC. (PR #82491)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Remove DPP DecoderNamespaces. NFC. (PR #82491)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Prevent SDWA 'preserve' transformation for instructions in different basic blocks. (PR #82406)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Prevent hang in SIFoldOperands (PR #82099)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Prevent hang in SIFoldOperands (PR #82099)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Prevent hang in SIFoldOperands (PR #82099)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Prevent hang in SIFoldOperands (PR #82099)
Jay Foad via llvm-commits
- [llvm] [AMDGPU][NFC] Refactor SIInsertWaitcnts zero waitcnt generation (PR #82575)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Split Dpp8FI and Dpp16FI operands (PR #82379)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Split Dpp8FI and Dpp16FI operands (PR #82379)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Split Dpp8FI and Dpp16FI operands (PR #82379)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Clean up conversion of DPP instructions in AMDGPUDisassembler (PR #82480)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Clean up conversion of DPP instructions in AMDGPUDisassembler (PR #82480)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Clean up conversion of DPP instructions in AMDGPUDisassembler (PR #82480)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Remove DPP DecoderNamespaces. NFC. (PR #82491)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Remove DPP DecoderNamespaces. NFC. (PR #82491)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Remove DPP DecoderNamespaces. NFC. (PR #82491)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Remove DPP DecoderNamespaces. NFC. (PR #82491)
Jay Foad via llvm-commits
- [llvm] [InferAddrSpaces] Correctly replace identical operands of insts (PR #82610)
Jay Foad via llvm-commits
- [llvm] [InferAddrSpaces] Correctly replace identical operands of insts (PR #82610)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Fix SDWA 'preserve' transformation for instructions in different basic blocks. (PR #82406)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Fix SDWA 'preserve' transformation for instructions in different basic blocks. (PR #82406)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Fix encoding of VOP3P dpp on GFX11 and GFX12 (PR #82710)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Introduce orderign parameter to atomic intrinsics and introduce new llvm.amdgcn.image.atomic.load intrinsic. (PR #73613)
Jay Foad via llvm-commits
- [llvm] [SelectionDAG] Improve isOrEquivalentToAdd (PR #82767)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Simplify AMDGPUDisassembler::getInstruction by removing Res. (PR #82775)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Simplify AMDGPUDisassembler::getInstruction by removing Res. (PR #82775)
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- [llvm] [AMDGPU] Introduce iglp_opt(2): Generalized exp/mfma interleaving for select kernels (PR #81342)
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- [llvm] [AMDGPU] Introduce iglp_opt(2): Generalized exp/mfma interleaving for select kernels (PR #81342)
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- [llvm] [AMDGPU] Introduce iglp_opt(2): Generalized exp/mfma interleaving for select kernels (PR #81342)
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- [llvm] [AMDGPU] Introduce iglp_opt(2): Generalized exp/mfma interleaving for select kernels (PR #81342)
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- [llvm] [AMDGPU] Introduce iglp_opt(2): Generalized exp/mfma interleaving for select kernels (PR #81342)
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- [clang] [clang-tools-extra] [compiler-rt] [flang] [libclc] [libcxx] [lld] [lldb] [llvm] [NFC] Remove trailing whitespace across all non-test related files (PR #82838)
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Luke Lau via llvm-commits
- [llvm] [Loads] Fix crash in isSafeToLoadUnconditionally with scalable accessed type (PR #82650)
Luke Lau via llvm-commits
- [llvm] [Loads] Fix crash in isSafeToLoadUnconditionally with scalable accessed type (PR #82650)
Luke Lau via llvm-commits
- [llvm] [Loads] Fix crash in isSafeToLoadUnconditionally with scalable accessed type (PR #82650)
Luke Lau via llvm-commits
- [llvm] [Loads] Fix crash in isSafeToLoadUnconditionally with scalable accessed type (PR #82650)
Luke Lau via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Luke Lau via llvm-commits
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Luke Lau via llvm-commits
- [llvm] 2d50703 - [RISCV] Use RISCVSubtarget::getRealVLen() in more places. NFC
Luke Lau via llvm-commits
- [llvm] d7a28f7 - [RISCV] Add asserts for insert/extract_subvector invariants. NFC
Luke Lau via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Luke Lau via llvm-commits
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Luke Lau via llvm-commits
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Maciej Gabka via llvm-commits
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Maciej Gabka via llvm-commits
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Maciej Gabka via llvm-commits
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Maciej Gabka via llvm-commits
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Maksim Levental via llvm-commits
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Maksim Panchenko via llvm-commits
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Maksim Panchenko via llvm-commits
- [llvm] [BOLT] Fix memory leak in BinarySection (PR #82520)
Maksim Panchenko via llvm-commits
- [llvm] [BOLT] Fix memory leak in BinarySection (PR #82520)
Maksim Panchenko via llvm-commits
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Maksim Panchenko via llvm-commits
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Maksim Panchenko via llvm-commits
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Maksim Panchenko via llvm-commits
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Maksim Panchenko via llvm-commits
- [llvm] [NFC][SelectionDAG] Move function `getStackAlignedMMO` to the beginning of LegalizeDAG.cpp (PR #82171)
Manish Kausik H via llvm-commits
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Manish Kausik H via llvm-commits
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Manish Kausik H via llvm-commits
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Manish Kausik H via llvm-commits
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Martin Storsjö via llvm-commits
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Martin Storsjö via llvm-commits
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Martin Storsjö via llvm-commits
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Martin Storsjö via llvm-commits
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Martin Storsjö via llvm-commits
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Martin Wehking via llvm-commits
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Martin Wehking via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
- [llvm] Initialize unsigned integer when declared (PR #81894)
Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
- [llvm] Fix non-splat vector SREM expansion when one of the divisors is a power of two. (PR #82706)
Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
- [llvm] [CodeGenPrepare] Reverse the canonicalization of isInf/isNanOrInf (PR #81572)
Matt Arsenault via llvm-commits
- [llvm] [CodeGenPrepare] Reverse the canonicalization of isInf/isNanOrInf (PR #81572)
Matt Arsenault via llvm-commits
- [llvm] [CodeGenPrepare] Reverse the canonicalization of isInf/isNanOrInf (PR #81572)
Matt Arsenault via llvm-commits
- [llvm] [CodeGenPrepare] Reverse the canonicalization of isInf/isNanOrInf (PR #81572)
Matt Arsenault via llvm-commits
- [llvm] [FlattenCFG] Fix the miscompilation where phi nodes exist in the merge point (PR #81987)
Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matthew Devereau via llvm-commits
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Matthew Devereau via llvm-commits
- [llvm] [mlir] [mlir] Implement Mesh's ShardingInterface for Linalg ops (PR #82284)
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Mehdi Amini via llvm-commits
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Mehdi Amini via llvm-commits
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Mehdi Amini via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an impleme… (PR #82094)
Mehdi Amini via llvm-commits
- [llvm] [mlir] Test ci (PR #82134)
Mehdi Amini via llvm-commits
- [llvm] [workflows] Port buildkite Windows config to GitHub actions (PR #82093)
Mehdi Amini via llvm-commits
- [llvm] [workflows] Port buildkite Windows config to GitHub actions (PR #82093)
Mehdi Amini via llvm-commits
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Mehdi Amini via llvm-commits
- [clang] [llvm] [mlir] Rename `ThreadPool::getThreadCount()` to `getMaxConcurrency()` (NFC) (PR #82296)
Mehdi Amini via llvm-commits
- [clang] [llvm] [mlir] Rename `ThreadPool::getThreadCount()` to `getMaxConcurrency()` (NFC) (PR #82296)
Mehdi Amini via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an impleme… (PR #82094)
Mehdi Amini via llvm-commits
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Mehdi Amini via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an impleme… (PR #82094)
Mehdi Amini via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an impleme… (PR #82094)
Mehdi Amini via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an impleme… (PR #82094)
Mehdi Amini via llvm-commits
- [llvm] [mlir] Test ci (PR #82134)
Mehdi Amini via llvm-commits
- [llvm] [workflows] Port buildkite Windows config to GitHub actions (PR #82093)
Mehdi Amini via llvm-commits
- [llvm] [workflows] Port buildkite Windows config to GitHub actions (PR #82093)
Mehdi Amini via llvm-commits
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Mehdi Amini via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)
Mehdi Amini via llvm-commits
- [llvm] repair and re-enable Windows buildkite presubmit (PR #82393)
Mehdi Amini via llvm-commits
- [llvm] [mlir] [mlir] Implement Mesh's ShardingInterface for Linalg ops (PR #82284)
Mehdi Amini via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)
Mehdi Amini via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)
Mehdi Amini via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)
Mehdi Amini via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)
Mehdi Amini via llvm-commits
- [llvm] Extend GCC workaround to GCC < 8.4 for llvm::iterator_range ctor (PR #82643)
Mehdi Amini via llvm-commits
- [clang] [clang-tools-extra] [compiler-rt] [flang] [libclc] [libcxx] [lld] [lldb] [llvm] [NFC] Remove trailing whitespace across all non-test related files (PR #82838)
Mehdi Amini via llvm-commits
- [llvm] [mlir] [mlir][python] Fix generation of Python bindings for `async` dialect (PR #75960)
Mehdi Amini via llvm-commits
- [llvm] [mlir] [mlir][python] Fix generation of Python bindings for `async` dialect (PR #75960)
Mehdi Amini via llvm-commits
- [llvm] [mlir] Users/tsitdikov (PR #82757)
Mehdi Amini via llvm-commits
- [llvm] [mlir] Users/tsitdikov (PR #82757)
Mehdi Amini via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)
Mehdi Amini via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)
Mehdi Amini via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)
Mehdi Amini via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)
Mehdi Amini via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)
Mehdi Amini via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)
Mehdi Amini via llvm-commits
- [llvm] [docs] Remove the Packaging "Tips" which seems to be about pre-cmake ./configure (PR #82958)
Mehdi Amini via llvm-commits
- [llvm] [LV] Decompose WidenIntOrFPInduction into phi and update recipes (PR #82021)
Mel Chen via llvm-commits
- [llvm] [LV] Decompose WidenIntOrFPInduction into phi and update recipes (PR #82021)
Mel Chen via llvm-commits
- [llvm] [LV] Decompose WidenIntOrFPInduction into phi and update recipes (PR #82021)
Mel Chen via llvm-commits
- [llvm] [BlockFrequency] Moves block frequency printing function to Support to avoid depending on Analysis. (PR #75506)
Micah Weston via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
Micah Weston via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
Micah Weston via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
Micah Weston via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
Micah Weston via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
Micah Weston via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
Micah Weston via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
Micah Weston via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
Micah Weston via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
Micah Weston via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
Micah Weston via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
Micah Weston via llvm-commits
- [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)
Micah Weston via llvm-commits
- [llvm] [llvm-link] Improve missing file error message (PR #82514)
Michael Halkenhäuser via llvm-commits
- [llvm] [llvm-link] Improve missing file error message (PR #82514)
Michael Halkenhäuser via llvm-commits
- [llvm] [llvm-link] Improve missing file error message (PR #82514)
Michael Halkenhäuser via llvm-commits
- [llvm] [llvm-link] Improve missing file error message (PR #82514)
Michael Halkenhäuser via llvm-commits
- [llvm] [llvm-link] Improve missing file error message (PR #82514)
Michael Halkenhäuser via llvm-commits
- [llvm] [llvm-link] Improve missing file error message (PR #82514)
Michael Halkenhäuser via llvm-commits
- [llvm] [llvm-link] Improve missing file error message (PR #82514)
Michael Halkenhäuser via llvm-commits
- [llvm] [llvm-link] Improve missing file error message (PR #82514)
Michael Halkenhäuser via llvm-commits
- [libc] [llvm] [libc] Add memcmp / bcmp fuzzers (PR #77741)
Michael Jones via llvm-commits
- [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)
Michael Jones via llvm-commits
- [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)
Michael Jones via llvm-commits
- [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)
Michael Jones via llvm-commits
- [llvm] bc5aba9 - [CodeGen][MIR][UnitTests] Fix shared build. NFC
Michael Liao via llvm-commits
- [llvm] [RISCV][GISEL] Add IRTranslation for insertelement with scalable vector type (PR #80377)
Michael Maitland via llvm-commits
- [llvm] [CodeGen][MISched] Add misched post-regalloc bottom-up scheduling (PR #76186)
Michael Maitland via llvm-commits
- [llvm] [CodeGen][MISched] Add misched post-regalloc bottom-up scheduling (PR #76186)
Michael Maitland via llvm-commits
- [llvm] [RISCV][NFC] Allow SchedVar to be a def inside our scheduler model fi… (PR #82634)
Michael Maitland via llvm-commits
- [llvm] [RISCV][NFC] Allow SchedVar to be a def inside our scheduler model fi… (PR #82634)
Michael Maitland via llvm-commits
- [llvm] [RISCV][NFC] Allow SchedVar to be a def inside our scheduler model files. (PR #82634)
Michael Maitland via llvm-commits
- [llvm] [RISCV][NFC] Allow SchedVar to be a def inside our scheduler model files. (PR #82634)
Michael Maitland via llvm-commits
- [llvm] [RISCV][NFC] Allow SchedVar to be a def inside our scheduler model files. (PR #82634)
Michael Maitland via llvm-commits
- [llvm] [RISCV][NFC] Allow SchedVar to be a def inside our scheduler model files. (PR #82634)
Michael Maitland via llvm-commits
- [llvm] [RISCV][NFC] Allow SchedVar to be a def inside our scheduler model files. (PR #82634)
Michael Maitland via llvm-commits
- [llvm] [CodeGen][MISched] Add misched post-regalloc bottom-up scheduling (PR #76186)
Michael Maitland via llvm-commits
- [llvm] [CodeGen][MISched] Add misched post-regalloc bottom-up scheduling (PR #76186)
Michael Maitland via llvm-commits
- [llvm] [CodeGen][MISched] Add misched post-regalloc bottom-up scheduling (PR #76186)
Michael Maitland via llvm-commits
- [llvm] [CodeGen][MISched] Add misched post-regalloc bottom-up scheduling (PR #76186)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Add scheduling info for Zcmp (PR #82719)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Add scheduling info for Zcmp (PR #82719)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Add scheduling info for Zcmp (PR #82719)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Add scheduling info for Zcmp (PR #82719)
Michael Maitland via llvm-commits
- [llvm] [RISCV] Add scheduling info for Zcmp (PR #82719)
Michael Maitland via llvm-commits
- [clang] [llvm] [clang][ScanDeps] Allow PCHs to have different VFS overlays (PR #82294)
Michael Spencer via llvm-commits
- [clang] [llvm] [clang][ScanDeps] Allow PCHs to have different VFS overlays (PR #82294)
Michael Spencer via llvm-commits
- [clang] [llvm] [clang][ScanDeps] Allow PCHs to have different VFS overlays (PR #82294)
Michael Spencer via llvm-commits
- [clang] [llvm] [clang][ScanDeps] Allow PCHs to have different VFS overlays (PR #82294)
Michael Spencer via llvm-commits
- [clang] [llvm] [clang][ScanDeps] Allow PCHs to have different VFS overlays (PR #82294)
Michael Spencer via llvm-commits
- [clang] [llvm] [clang][ScanDeps] Allow PCHs to have different VFS overlays (PR #82294)
Michael Spencer via llvm-commits
- [clang] [llvm] [clang][ScanDeps] Allow PCHs to have different VFS overlays (PR #82294)
Michael Spencer via llvm-commits
- [llvm] [workflows] Delete user branches that are too long (PR #82845)
Michael Spencer via llvm-commits
- [llvm] [workflows] Delete user branches that are too long (PR #82845)
Michael Spencer via llvm-commits
- [llvm] fix generation of unnecessary OpExecutionMode records (PR #81839)
Michal Paszkowski via llvm-commits
- [llvm] Add support for the SPIR-V extension SPV_KHR_uniform_group_instructions (PR #82064)
Michal Paszkowski via llvm-commits
- [llvm] [SPIRV] Prevent creation of jump tables from switch (PR #82287)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Fix vloadn OpenCL builtin lowering (PR #81148)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Fix vloadn OpenCL builtin lowering (PR #81148)
Michal Paszkowski via llvm-commits
- [llvm] Add support for the SPV_INTEL_usm_storage_classes extension (PR #82247)
Michal Paszkowski via llvm-commits
- [llvm] [SPIRV] Add support for the SPV_KHR_subgroup_rotate extension (PR #82374)
Michal Paszkowski via llvm-commits
- [llvm] [SPIRV] Add support for the SPV_KHR_subgroup_rotate extension (PR #82374)
Michal Paszkowski via llvm-commits
- [llvm] [SPIR-V] Do not rely on type metadata for ptr element type resolution (PR #82678)
Michal Paszkowski via llvm-commits
- [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)
Michal Paszkowski via llvm-commits
- [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)
Michal Paszkowski via llvm-commits
- [clang] [flang] [llvm] [Documentation] Replace recommonmark by myst-parser (PR #65664)
Michał Górny via llvm-commits
- [clang] [flang] [llvm] [Documentation] Replace recommonmark by myst-parser (PR #65664)
Michał Górny via llvm-commits
- [clang] [flang] [llvm] [Docs] Allow building man pages without myst_parser (PR #82402)
Michał Górny via llvm-commits
- [clang] [flang] [llvm] [Docs] Allow building man pages without myst_parser (PR #82402)
Michał Górny via llvm-commits
- [clang] [flang] [llvm] [Docs] Allow building man pages without myst_parser (PR #82402)
Michał Górny via llvm-commits
- [llvm] [LoopIdiomRecognizer] Implement CRC recognition (PR #79295)
Mikhail Gudim via llvm-commits
- [llvm] [LoopIdiomRecognizer] Implement CRC recognition (PR #79295)
Mikhail Gudim via llvm-commits
- [llvm] [LoopIdiomRecognizer] Implement CRC recognition (PR #79295)
Mikhail Gudim via llvm-commits
- [llvm] [SelectionDAG] Introducing the SelectionDAG pattern matching framework (PR #78654)
Min-Yih Hsu via llvm-commits
- [llvm] [SelectionDAG] Introducing the SelectionDAG pattern matching framework (PR #78654)
Min-Yih Hsu via llvm-commits
- [llvm] [SelectionDAG] Introducing the SelectionDAG pattern matching framework (PR #78654)
Min-Yih Hsu via llvm-commits
- [llvm] [SelectionDAG] Introducing the SelectionDAG pattern matching framework (PR #78654)
Min-Yih Hsu via llvm-commits
- [llvm] [SelectionDAG] Introducing the SelectionDAG pattern matching framework (PR #78654)
Min-Yih Hsu via llvm-commits
- [llvm] [SelectionDAG] Introducing the SelectionDAG pattern matching framework (PR #78654)
Min-Yih Hsu via llvm-commits
- [llvm] [SelectionDAG] Introducing the SelectionDAG pattern matching framework (PR #78654)
Min-Yih Hsu via llvm-commits
- [llvm] [SelectionDAG] Introducing the SelectionDAG pattern matching framework (PR #78654)
Min-Yih Hsu via llvm-commits
- [llvm] [SelectionDAG] Introducing the SelectionDAG pattern matching framework (PR #78654)
Min-Yih Hsu via llvm-commits
- [llvm] [SelectionDAG] Introducing the SelectionDAG pattern matching framework (PR #78654)
Min-Yih Hsu via llvm-commits
- [compiler-rt] [llvm] [nfc]For InstrProfData.inc, clang-format functions and opt-out of formatting on the rest (PR #82057)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [nfc]For InstrProfData.inc, clang-format functions and opt-out of formatting on the rest (PR #82057)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [nfc]For InstrProfData.inc, clang-format functions and opt-out of formatting on the rest (PR #82057)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [nfc][compiler-rt]Replace Type::getInt8PtrTy with PointerType::getUnqual as a clean-up (PR #82434)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [nfc]For InstrProfData.inc, clang-format functions and opt-out of formatting on the rest (PR #82057)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [nfc]For InstrProfData.inc, clang-format functions and opt-out of formatting on the rest (PR #82057)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [nfc]For InstrProfData.inc, clang-format functions and opt-out of formatting on the rest (PR #82057)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [nfc]For InstrProfData.inc, clang-format functions and opt-out of formatting on the rest (PR #82057)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [nfc]For InstrProfData.inc, clang-format functions and opt-out of formatting on the rest (PR #82057)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] A copy of https://github.com/llvm/llvm-project/pull/66825. Actually this is a superset (a copy plus the thinlto-import change) (PR #80761)
Mingming Liu via llvm-commits
- [llvm] [nfc]remove unused variable after pr/81691 (PR #82578)
Mingming Liu via llvm-commits
- [llvm] [nfc]remove unused variable after pr/81691 (PR #82578)
Mingming Liu via llvm-commits
- [llvm] [nfc]remove unused variable after pr/81691 (PR #82578)
Mingming Liu via llvm-commits
- [llvm] revert type profiling change as it breaks compiler-rt test on non-Linux platforms (PR #82581)
Mingming Liu via llvm-commits
- [llvm] revert type profiling change as it breaks compiler-rt test on non-Linux platforms (PR #82581)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Revert type profiling change as compiler-rt test break on Windows. (PR #82583)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Revert type profiling change as compiler-rt test break on Windows. (PR #82583)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. " (PR #82703)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. " (PR #82703)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. " (PR #82703)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)
Mingming Liu via llvm-commits
- [clang] [llvm] [nfc]Generalize PGOFuncName helper methods for general global objects (PR #73570)
Mingming Liu via llvm-commits
- [clang] [llvm] [nfc]Generalize PGOFuncName helper methods for general global objects (PR #73570)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf]Dup of pr66825 (PR #79359)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf]Dup of pr66825 (PR #79359)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf]Instrument vtables and store the information in raw and indexed profiles (PR #79228)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [TypeProf]Instrument vtables and store the information in raw and indexed profiles (PR #79228)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [nfc][compiler-rt]Replace Type::getInt8PtrTy with PointerType::getUnqual as a clean-up (PR #82434)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [nfc][compiler-rt]Replace Type::getInt8PtrTy with PointerType::getUnqual as a clean-up (PR #82434)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] A copy of https://github.com/llvm/llvm-project/pull/66825. Actually this is a superset (a copy plus the thinlto-import change) (PR #80761)
Mingming Liu via llvm-commits
- [llvm] [AMDGPU] Try decoding instructions longest first. NFCI. (PR #82014)
Mirko Brkušanin via llvm-commits
- [llvm] [AMDGPU] Stop using SDWA DecoderNamespaces. NFCI. (PR #82233)
Mirko Brkušanin via llvm-commits
- [llvm] [BatchAA] Fix a reference to a non-exising `pointsToConstantMemory` overload (NFC) (PR #82173)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Fix wrong condition in `canUseAsPrologue` (PR #81878)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Restore Z-registers before P-registers (PR #79623)
Momchil Velikov via llvm-commits
- [llvm] [LLVM][AArch64]Use load/store with consecutive registers in SME2 or S… (PR #77665)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Fix stack probing clobbering flags (PR #81879)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Added feature dependencies for SME2p1 to TargetParser (PR #81860)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Fix stack probing clobbering flags (PR #81879)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Fix register reversing crash on MSVC with 1 pair. (PR #82392)
Momchil Velikov via llvm-commits
- [llvm] [AArch64] Fix stack probing clobbering flags (PR #81879)
Momchil Velikov via llvm-commits
- [llvm] [AArch64][SVE]Add error message in the AsmParser for SVEPattern (PR #82668)
Momchil Velikov via llvm-commits
- [llvm] [MC/DC] Introduce `class TestVector` with a pair of `BitVector` (PR #82174)
NAKAMURA Takumi via llvm-commits
- [llvm] [MC/DC] Introduce `class TestVector` with a pair of `BitVector` (PR #82174)
NAKAMURA Takumi via llvm-commits
- [llvm] [MC/DC] Introduce `class TestVector` with a pair of `BitVector` (PR #82174)
NAKAMURA Takumi via llvm-commits
- [llvm] [MC/DC] Introduce `class TestVector` with a pair of `BitVector` (PR #82174)
NAKAMURA Takumi via llvm-commits
- [llvm] [MC/DC] Introduce `class TestVector` with a pair of `BitVector` (PR #82174)
NAKAMURA Takumi via llvm-commits
- [llvm] Isolate the final result out of TestVectors (PR #82282)
NAKAMURA Takumi via llvm-commits
- [llvm] [MC/DC] Introduce `class TestVector` with a pair of `BitVector` (PR #82174)
NAKAMURA Takumi via llvm-commits
- [llvm] [MC/DC] Introduce `class TestVector` with a pair of `BitVector` (PR #82174)
NAKAMURA Takumi via llvm-commits
- [llvm] [MC/DC] Introduce `class TestVector` with a pair of `BitVector` (PR #82174)
NAKAMURA Takumi via llvm-commits
- [llvm] [MC/DC] Introduce `class TestVector` with a pair of `BitVector` (PR #82174)
NAKAMURA Takumi via llvm-commits
- [llvm] Implement MCDCTVIdxBuilder (LLVM side) (PR #80676)
NAKAMURA Takumi via llvm-commits
- [llvm] Implement MCDCTVIdxBuilder (LLVM side) (PR #80676)
NAKAMURA Takumi via llvm-commits
- [llvm] Implement MCDCTVIdxBuilder (LLVM side) (PR #80676)
NAKAMURA Takumi via llvm-commits
- [llvm] Implement MCDCTVIdxBuilder (LLVM side) (PR #80676)
NAKAMURA Takumi via llvm-commits
- [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)
NAKAMURA Takumi via llvm-commits
- [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)
NAKAMURA Takumi via llvm-commits
- [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)
NAKAMURA Takumi via llvm-commits
- [llvm] Implement MCDCTVIdxBuilder (LLVM side) (PR #80676)
NAKAMURA Takumi via llvm-commits
- [llvm] Implement MCDCTVIdxBuilder (LLVM side) (PR #80676)
NAKAMURA Takumi via llvm-commits
- [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)
NAKAMURA Takumi via llvm-commits
- [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)
NAKAMURA Takumi via llvm-commits
- [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)
NAKAMURA Takumi via llvm-commits
- [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)
NAKAMURA Takumi via llvm-commits
- [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)
NAKAMURA Takumi via llvm-commits
- [llvm] Implement MCDCTVIdxBuilder (LLVM side) (PR #80676)
NAKAMURA Takumi via llvm-commits
- [llvm] Isolate the final result out of TestVectors (PR #82282)
NAKAMURA Takumi via llvm-commits
- [llvm] [MC/DCIsolate the final result out of TestVectors (PR #82282)
NAKAMURA Takumi via llvm-commits
- [llvm] [MC/DC] Refactor: Isolate the final result out of TestVectors (PR #82282)
NAKAMURA Takumi via llvm-commits
- [llvm] [MC/DC] Refactor: Isolate the final result out of TestVectors (PR #82282)
NAKAMURA Takumi via llvm-commits
- [llvm] [MC/DC] Refactor: Isolate the final result out of TestVectors (PR #82282)
NAKAMURA Takumi via llvm-commits
- [llvm] 7b9504f - test: Refine InstrProfiling/mcdc.ll
NAKAMURA Takumi via llvm-commits
- [llvm] cc53707 - LLVMInstrumentation: Simplify mcdc.tvbitmap.update with GEP.
NAKAMURA Takumi via llvm-commits
- [llvm] 3b27cc2 - Regenerate llvm-cov tests
NAKAMURA Takumi via llvm-commits
- [llvm] 1f6a347 - Refactor: Let MCDC::State have DecisionByStmt and BranchByStmt
NAKAMURA Takumi via llvm-commits
- [llvm] Implement MCDCTVIdxBuilder (LLVM side) (PR #80676)
NAKAMURA Takumi via llvm-commits
- [llvm] Implement MCDCTVIdxBuilder (LLVM side) (PR #80676)
NAKAMURA Takumi via llvm-commits
- [llvm] Introduce mcdc::TVIdxBuilder (LLVM side, NFC) (PR #80676)
NAKAMURA Takumi via llvm-commits
- [llvm] Introduce mcdc::TVIdxBuilder (LLVM side, NFC) (PR #80676)
NAKAMURA Takumi via llvm-commits
- [llvm] [AArch64][CodeGen] Fix crash when fptrunc returns fp16 with +nofp attr (PR #81724)
Nashe Mncube via llvm-commits
- [llvm] [AArch64][CodeGen] Fix crash when fptrunc returns fp16 with +nofp attr (PR #81724)
Nashe Mncube via llvm-commits
- [llvm] [AArch64][CodeGen] Fix crash when fptrunc returns fp16 with +nofp attr (PR #81724)
Nashe Mncube via llvm-commits
- [llvm] [AArch64][CodeGen] Fix crash when fptrunc returns fp16 with +nofp attr (PR #81724)
Nashe Mncube via llvm-commits
- [llvm] [AArch64][CodeGen] Fix crash when fptrunc returns fp16 with +nofp attr (PR #81724)
Nashe Mncube via llvm-commits
- [llvm] [AArch64][CodeGen] Fix crash when fptrunc returns fp16 with +nofp attr (PR #81724)
Nashe Mncube via llvm-commits
- [llvm] [AArch64][CodeGen] Fix crash when fptrunc returns fp16 with +nofp attr (PR #81724)
Nashe Mncube via llvm-commits
- [llvm] [AArch64][CodeGen] Fix crash when fptrunc returns fp16 with +nofp attr (PR #81724)
Nashe Mncube via llvm-commits
- [llvm] [AArch64][CodeGen] Fix crash when fptrunc returns fp16 with +nofp attr (PR #81724)
Nashe Mncube via llvm-commits
- [llvm] [AArch64][CodeGen] Fix crash when fptrunc returns fp16 with +nofp attr (PR #81724)
Nashe Mncube via llvm-commits
- [llvm] [AArch64][CodeGen] Fix crash when fptrunc returns fp16 with +nofp attr (PR #81724)
Nashe Mncube via llvm-commits
- [llvm] [AArch64][CodeGen] Fix crash when fptrunc returns fp16 with +nofp attr (PR #81724)
Nashe Mncube via llvm-commits
- [llvm] [AArch64][CodeGen] Fix crash when fptrunc returns fp16 with +nofp attr (PR #81724)
Nashe Mncube via llvm-commits
- [llvm] [AArch64][CodeGen] Fix crash when fptrunc returns fp16 with +nofp attr (PR #81724)
Nashe Mncube via llvm-commits
- [llvm] [AArch64][CodeGen] Fix crash when fptrunc returns fp16 with +nofp attr (PR #81724)
Nashe Mncube via llvm-commits
- [llvm] [AArch64][CodeGen] Fix crash when fptrunc returns fp16 with +nofp attr (PR #81724)
Nashe Mncube via llvm-commits
- [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)
Natalie Chouinard via llvm-commits
- [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)
Natalie Chouinard via llvm-commits
- [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)
Natalie Chouinard via llvm-commits
- [llvm] [infra] Add git to Linux container (PR #82687)
Natalie Chouinard via llvm-commits
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Natalie Chouinard via llvm-commits
- [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)
Natalie Chouinard via llvm-commits
- [llvm] [LIR][SCEVExpander] Restore original flags when aborting transform (PR #82362)
Nathan Chancellor via llvm-commits
- [llvm] [SPIR-V] Fix vloadn OpenCL builtin lowering (PR #81148)
Nathan Gauër via llvm-commits
- [llvm] [SPIR-V] Fix vloadn OpenCL builtin lowering (PR #81148)
Nathan Gauër via llvm-commits
- [llvm] [SPIR-V] Fix vloadn OpenCL builtin lowering (PR #81148)
Nathan Gauër via llvm-commits
- [llvm] fix generation of unnecessary OpExecutionMode records (PR #81839)
Nathan Gauër via llvm-commits
- [llvm] Prevent creation of jump tables from switch (PR #82287)
Nathan Gauër via llvm-commits
- [llvm] [SPIRV] Prevent creation of jump tables from switch (PR #82287)
Nathan Gauër via llvm-commits
- [llvm] [SPIRV] Prevent creation of jump tables from switch (PR #82287)
Nathan Gauër via llvm-commits
- [llvm] [SPIRV] Prevent creation of jump tables from switch (PR #82287)
Nathan Gauër via llvm-commits
- [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)
Nathan Gauër via llvm-commits
- [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)
Nathan Gauër via llvm-commits
- [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)
Nathan Gauër via llvm-commits
- [clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)
Nathan Gauër via llvm-commits
- [clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)
Nathan Gauër via llvm-commits
- [clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)
Nathan Gauër via llvm-commits
- [llvm] [GlobalISel] replace right identity X * -1.0 with fneg(x) (PR #80526)
Nick Anderson via llvm-commits
- [llvm] GlobalISel needs fdiv 1 / sqrt(x) to rsq combine (PR #78673)
Nick Anderson via llvm-commits
- [llvm] GlobalISel needs fdiv 1 / sqrt(x) to rsq combine (PR #78673)
Nick Anderson via llvm-commits
- [llvm] [AMDGPU] fixes mistake in #82018 (PR #82223)
Nick Anderson via llvm-commits
- [llvm] GlobalISel needs fdiv 1 / sqrt(x) to rsq combine (PR #78673)
Nick Anderson via llvm-commits
- [llvm] GlobalISel needs fdiv 1 / sqrt(x) to rsq combine (PR #78673)
Nick Anderson via llvm-commits
- [llvm] [llvm][AArch64] Autoupgrade function attributes from Module attributes. (PR #80640)
Nick Desaulniers via llvm-commits
- [llvm] [llvm][AArch64] Autoupgrade function attributes from Module attributes. (PR #80640)
Nick Desaulniers via llvm-commits
- [llvm] [llvm][AArch64] Autoupgrade function attributes from Module attributes. (PR #80640)
Nick Desaulniers via llvm-commits
- [llvm] [llvm][AArch64] Do not inline a function with different signing scheme. (PR #80642)
Nick Desaulniers via llvm-commits
- [llvm] [llvm][AArch64] Do not inline a function with different signing scheme. (PR #80642)
Nick Desaulniers via llvm-commits
- [llvm] [llvm][AArch64] Do not inline a function with different signing scheme. (PR #80642)
Nick Desaulniers via llvm-commits
- [llvm] [llvm][SimplifyLibCalls] Add option 'AllowMemcmpToBcmpTransform' (PR #82304)
Nick Desaulniers via llvm-commits
- [llvm] [llvm][AArch64] Autoupgrade function attributes from Module attributes. (PR #80640)
Nick Desaulniers via llvm-commits
- [llvm] [llvm][AArch64] Do not inline a function with different signing scheme. (PR #80642)
Nick Desaulniers via llvm-commits
- [llvm] [llvm][AArch64] Do not inline a function with different signing scheme. (PR #80642)
Nick Desaulniers via llvm-commits
- [llvm] [llvm][AArch64] Do not inline a function with different signing scheme. (PR #80642)
Nick Desaulniers via llvm-commits
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- [llvm] bb029a5 - [gn] port 4c6043de0b83 (InstallAPITests)
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Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fix Failure to fold (and %x, (sext i1 %m)) -> (select %m, %x, 0) with multiple uses of %m (PR #81409)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fix Failure to fold (and %x, (sext i1 %m)) -> (select %m, %x, 0) with multiple uses of %m (PR #81409)
Nikita Popov via llvm-commits
- [llvm] [DAGCombiner] Preserve nneg flag from inner zext when we combine (z/s/aext (zext X)) (PR #82199)
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- [llvm] [InstCombine] If inst in unreachable refers to an inst change it to poison (#65107) (PR #78444)
Nikita Popov via llvm-commits
- [llvm] [DAGCombiner][RISCV] Optimize (zext nneg (truncate X)) if X has known sign bits. (PR #82227)
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
- [llvm] [LLVM][IR] Add native vector support to ConstantInt & ConstantFP. (PR #74502)
Nikita Popov via llvm-commits
- [llvm] [LLVM][IR] Add native vector support to ConstantInt & ConstantFP. (PR #74502)
Nikita Popov via llvm-commits
- [llvm] [LLVM][IR] Add native vector support to ConstantInt & ConstantFP. (PR #74502)
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- [llvm] [InstCombine] If inst in unreachable refers to an inst change it to poison (#65107) (PR #78444)
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- [llvm] [InstCombine] If inst in unreachable refers to an inst change it to poison (#65107) (PR #78444)
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- [llvm] [InstCombine] If inst in unreachable refers to an inst change it to poison (#65107) (PR #78444)
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Nikita Popov via llvm-commits
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- [llvm] 1789dc2 - [InstCombine] Add more dependent IV tests (NFC)
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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- [llvm] [LIR][SCEVExpander] Restore original flags when aborting transform (PR #82362)
Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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- [llvm] [LoopPeel] LCSSA form is destroyed by LoopPeel, preserve it (PR #78696)
Nikita Popov via llvm-commits
- [llvm] [LoopPeel] LCSSA form is destroyed by LoopPeel, preserve it (PR #78696)
Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
- [llvm] [NFC] Turn the StrictFP attribute check to a CompatRule. (PR #82600)
Nikita Popov via llvm-commits
- [llvm] [NFC] Turn the StrictFP attribute check to a CompatRule. (PR #82600)
Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
- [llvm] [DebugInfo][GVNSink] Fix #77415: GVNSink fails to optimize LLVM IR with debug info (PR #77602)
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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- [llvm] [ValueTracking] Compute knownbits for `(and/or cond0, cond1)` on both sides of branch (PR #82818)
Nikita Popov via llvm-commits
- [llvm] [ValueTracking] Compute knownbits for `(and/or cond0, cond1)` on both sides of branch (PR #82818)
Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Orlando Cazalet-Hyams via llvm-commits
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Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
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Pierre van Houtryve via llvm-commits
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Pierre van Houtryve via llvm-commits
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Pierre van Houtryve via llvm-commits
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Pierre van Houtryve via llvm-commits
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Pierre van Houtryve via llvm-commits
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Pierre van Houtryve via llvm-commits
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Pierre van Houtryve via llvm-commits
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Pierre van Houtryve via llvm-commits
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Qiu Chaofan via llvm-commits
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Qiu Chaofan via llvm-commits
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Quentin Dian via llvm-commits
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Quentin Dian via llvm-commits
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Quentin Dian via llvm-commits
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Quentin Dian via llvm-commits
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Rainer Orth via llvm-commits
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Ralf Jung via llvm-commits
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Ralf Jung via llvm-commits
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Ralf Jung via llvm-commits
- [llvm] clarify semantics of masked vector load/store (PR #82469)
Ralf Jung via llvm-commits
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Ralf Jung via llvm-commits
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Reid Kleckner via llvm-commits
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Reid Kleckner via llvm-commits
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Sam Tebbs via llvm-commits
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Sam Tebbs via llvm-commits
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Sam Tebbs via llvm-commits
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Sam Tebbs via llvm-commits
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Sander de Smalen via llvm-commits
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Sander de Smalen via llvm-commits
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- [llvm] [AMDGPU] Fix decoder for BF16 inline constants (PR #82276)
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- [llvm] [AMDGPU] fixes mistake in #82018 (PR #82223)
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- [llvm] [WIP][AMDGPU] Split `isInlinableLiteral16` into three and call the specific version if possible (PR #81345)
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- [llvm] [AMDGPU] Remove `hasAtomicFaddRtnForTy` as it is not used anywhere (PR #82841)
Shilei Tian via llvm-commits
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Shilei Tian via llvm-commits
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Shoaib Meenai via llvm-commits
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Shoaib Meenai via llvm-commits
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- [llvm] [VectorCombine] Fold reduce(trunc(x)) -> trunc(reduce(x)) iff cost effective (PR #81852)
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- [llvm] [VectorCombine] Fold reduce(trunc(x)) -> trunc(reduce(x)) iff cost effective (PR #81852)
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- [llvm] [VectorCombine] Fold reduce(trunc(x)) -> trunc(reduce(x)) iff cost effective (PR #81852)
Simon Pilgrim via llvm-commits
- [llvm] [VectorCombine] Fold reduce(trunc(x)) -> trunc(reduce(x)) iff cost effective (PR #81852)
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- [llvm] 8d8bb35 - [X86] Add some basic test coverage for #81765
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- [llvm] [APInt] Add APIntOps::absdiff to compute the absolute difference of 2 unsigned values (PR #82255)
Simon Pilgrim via llvm-commits
- [llvm] [APInt] Add APIntOps::absdiff to compute the absolute difference of 2 unsigned values (PR #82255)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Fix Failure to reassociate SMAX/SMIN/UMAX/UMIN (PR #82175)
Simon Pilgrim via llvm-commits
- [llvm] [APInt] Add APIntOps::absdiff to compute the absolute difference of 2 unsigned values (PR #82255)
Simon Pilgrim via llvm-commits
- [llvm] 5bd374d - [X86] psadbw.ll - add AVX2 target test coverage
Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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- [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)
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- [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)
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- [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)
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- [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)
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- [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)
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- [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)
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- [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)
Simon Pilgrim via llvm-commits
- [llvm] 539febf - [X86] combineEXTRACT_SUBVECTOR - share the same SDLoc argument instead of recreating it over and over again.
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- [llvm] 2f1e33d - [X86] Fold add(psadbw(X,0),psadbw(Y,0)) -> psadbw(add(X,Y),0)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)
Simon Pilgrim via llvm-commits
- [llvm] 066773c - [X86] computeKnownBitsForTargetNode - add generic handling of PSHUFB
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- [llvm] d2173d8 - [InstCombine] foldFCmpIntToFPConst - simplify repeated calls to getBitWidth/getScalarSizeInBits. NFC.
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- [llvm] Correctly round FP -> BF16 when SDAG expands such nodes (PR #82399)
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- [llvm] Correctly round FP -> BF16 when SDAG expands such nodes (PR #82399)
Simon Pilgrim via llvm-commits
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- [llvm] select m, sub/add(X, C), X --> sub/add (X, and(C, m)) (PR #82441)
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- [llvm] select m, sub/add(X, C), X --> sub/add (X, and(C, m)) (PR #82441)
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- [llvm] select m, sub/add(X, C), X --> sub/add (X, and(C, m)) (PR #82441)
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- [llvm] select m, sub/add(X, C), X --> sub/add (X, and(C, m)) (PR #82441)
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- [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)
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- [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)
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- [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)
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- [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)
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- [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)
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- [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] select m, sub/add(X, C), X --> sub/add (X, and(C, m)) (PR #82441)
Simon Pilgrim via llvm-commits
- [llvm] 98a07f7 - [X86] LowerCTPOP - "ctpop(i2 x) --> sub(x, (x >> 1))"
Simon Pilgrim via llvm-commits
- [llvm] b8c9b06 - [X86] LowerCTPOP - add i3 and i4 LUT 'shift+mask' expansions
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- [llvm] 88a1855 - Fix MSVC signed/unsigned mismatch warning
Simon Pilgrim via llvm-commits
- [llvm] e3d4cac - Fix MSVC "not all control paths return a value" warning
Simon Pilgrim via llvm-commits
- [llvm] 6ba8ca8 - [CostModel][X86] Don't use undef for icmp cost tests
Simon Pilgrim via llvm-commits
- [llvm] a0869b1 - [CostModel][X86] Fix expanded CTPOP i8 costs
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- [llvm] 4beb4d5 - [CostModel][X86] Add test coverage for icmp vs zero
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- [llvm] 9978f6a - [CostModel][X86] Reduce the extra costs for ICMP complex predicates when an operand is constant
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- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
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- [llvm] [DAGCombiner][RISCV] CSE zext nneg and sext. (PR #82597)
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- [llvm] [InstCombine] Improve bitfield addition (PR #77184)
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- [llvm] [InstCombine] Improve bitfield addition (PR #77184)
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- [llvm] [InstCombine] Improve bitfield addition (PR #77184)
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- [llvm] [InstCombine] Improve bitfield addition (PR #77184)
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- [llvm] [InstCombine] Improve bitfield addition (PR #77184)
Simon Pilgrim via llvm-commits
- [llvm] [SLP]Improve findReusedOrderedScalars and graph rotation. (PR #77529)
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- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
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- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Simon Pilgrim via llvm-commits
- [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)
Simon Pilgrim via llvm-commits
- [llvm] d877ab1 - MachineInstr - update TargetRegisterInfo arguments comments. NFC.
Simon Pilgrim via llvm-commits
- [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)
Simon Pilgrim via llvm-commits
- [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)
Simon Pilgrim via llvm-commits
- [llvm] [Codegen] Change getSpillSize/getReloadSize to LocationSize. NFC (PR #82636)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Fix Failure to reassociate SMAX/SMIN/UMAX/UMIN (PR #82175)
Simon Pilgrim via llvm-commits
- [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)
Simon Pilgrim via llvm-commits
- [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)
Simon Pilgrim via llvm-commits
- [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)
Simon Pilgrim via llvm-commits
- [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)
Simon Pilgrim via llvm-commits
- [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)
Simon Pilgrim via llvm-commits
- [llvm] Missing AArch64ISD::BICi handling (PR #76644)
Sizov Nikita via llvm-commits
- [llvm] Missing AArch64ISD::BICi handling (PR #76644)
Sizov Nikita via llvm-commits
- [llvm] Missing AArch64ISD::BICi handling (PR #76644)
Sizov Nikita via llvm-commits
- [llvm] Missing AArch64ISD::BICi handling (PR #76644)
Sizov Nikita via llvm-commits
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- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Snehasish Kumar via llvm-commits
- [compiler-rt] [llvm] [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (PR #81691)
Snehasish Kumar via llvm-commits
- [llvm] [MemProf] Fix the stack updating handling of pruned contexts (PR #81322)
Snehasish Kumar via llvm-commits
- [llvm] [AMDGPU][NFC] Extend PredicateControl to support True16 predicates. (PR #82245)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix decoder for BF16 inline constants (PR #82276)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix decoder for BF16 inline constants (PR #82276)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix decoder for BF16 inline constants (PR #82276)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix decoder for BF16 inline constants (PR #82276)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix decoder for BF16 inline constants (PR #82276)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix decoder for BF16 inline constants (PR #82276)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix decoder for BF16 inline constants (PR #82276)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix decoder for BF16 inline constants (PR #82276)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix decoder for BF16 inline constants (PR #82276)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix bf16 inv2pi inline constant hadling (PR #82283)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix bf16 inv2pi inline constant hadling (PR #82283)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix bf16 inv2pi inline constant hadling (PR #82283)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix bf16 inv2pi inline constant hadling (PR #82283)
Stanislav Mekhanoshin via llvm-commits
- [clang] [llvm] [AMDGPU] Fix operand types for `V_DOT2_F32_BF16` (PR #82044)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix decoder for BF16 inline constants (PR #82276)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix decoder for BF16 inline constants (PR #82276)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix decoder for BF16 inline constants (PR #82276)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU][TableGen][NFC] Combine predicates without using classes. (PR #82346)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Split Dpp8FI and Dpp16FI operands (PR #82379)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix v_dot2_f16_f16/v_dot2_bf16_bf16 operands (PR #82423)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Add v2bf16 for opsel immediate folding (PR #82435)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix v_dot2_f16_f16/v_dot2_bf16_bf16 operands (PR #82423)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix v_dot2_f16_f16/v_dot2_bf16_bf16 operands (PR #82423)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix v_dot2_f16_f16/v_dot2_bf16_bf16 operands (PR #82423)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Add v2bf16 for opsel immediate folding (PR #82435)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix v_dot2_f16_f16/v_dot2_bf16_bf16 operands (PR #82423)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix v_dot2_f16_f16/v_dot2_bf16_bf16 operands (PR #82423)
Stanislav Mekhanoshin via llvm-commits
- [llvm] AMDGPU: Use HasFP8ConversionInsts appropriately, NFC (PR #82433)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix v_dot2_f16_f16/v_dot2_bf16_bf16 operands (PR #82423)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Clean up conversion of DPP instructions in AMDGPUDisassembler (PR #82480)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Remove DPP DecoderNamespaces. NFC. (PR #82491)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [WIP][AMDGPU] Split `isInlinableLiteral16` into three and call the specific version if possible (PR #81345)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [WIP][AMDGPU] Split `isInlinableLiteral16` into three and call the specific version if possible (PR #81345)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [WIP][AMDGPU] Split `isInlinableLiteral16` into three and call the specific version if possible (PR #81345)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix encoding on VOP3P dpp on GFX11 and GFX12 (PR #82710)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix encoding on VOP3P dpp on GFX11 and GFX12 (PR #82710)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix encoding on VOP3P dpp on GFX11 and GFX12 (PR #82710)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix encoding of VOP3P dpp on GFX11 and GFX12 (PR #82710)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix encoding of VOP3P dpp on GFX11 and GFX12 (PR #82710)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix encoding of VOP3P dpp on GFX11 and GFX12 (PR #82710)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix encoding of VOP3P dpp on GFX11 and GFX12 (PR #82710)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix encoding of VOP3P dpp on GFX11 and GFX12 (PR #82710)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix encoding of VOP3P dpp on GFX11 and GFX12 (PR #82710)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix encoding of VOP3P dpp on GFX11 and GFX12 (PR #82710)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Fix encoding of VOP3P dpp on GFX11 and GFX12 (PR #82710)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [WIP][AMDGPU] Split `isInlinableLiteral16` into three and call the specific version if possible (PR #81345)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [WIP][AMDGPU] Split `isInlinableLiteral16` into three and call the specific version if possible (PR #81345)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [WIP][AMDGPU] Split `isInlinableLiteral16` into three and call the specific version if possible (PR #81345)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [WIP][AMDGPU] Split `isInlinableLiteral16` into three and call the specific version if possible (PR #81345)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [WIP][AMDGPU] Split `isInlinableLiteral16` into three and call the specific version if possible (PR #81345)
Stanislav Mekhanoshin via llvm-commits
- [llvm] [AMDGPU] Remove `hasAtomicFaddRtnForTy` as it is not used anywhere (PR #82841)
Stanislav Mekhanoshin via llvm-commits
- [clang] [compiler-rt] [llvm] [clang-repl] [ORC] Add support for out-of-process execution on ELF (PR #79936)
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- [llvm] [RemoveDIs] Print non-intrinsic debug info in textual IR output (PR #79281)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Print non-intrinsic debug info in textual IR output (PR #79281)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][DebugInfo] Check for null marker when printing DPValues (PR #82238)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][DebugInfo] Check for null marker when printing DPValues (PR #82238)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][DebugInfo] Check for null marker when printing DPValues (PR #82238)
Stephen Tozer via llvm-commits
- [llvm] [LangRef] Clarify definition of fragments and debug intrinsics (PR #82019)
Stephen Tozer via llvm-commits
- [llvm] [LangRef] Clarify definition of fragments and debug intrinsics (PR #82019)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][DebugInfo][IR] Add parsing for non-intrinsic debug values (PR #79818)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][DebugInfo][IR] Add parsing for non-intrinsic debug values (PR #79818)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][DebugInfo][IR] Add parsing for non-intrinsic debug values (PR #79818)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Print non-intrinsic debug info in textual IR output (PR #79281)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Print non-intrinsic debug info in textual IR output (PR #79281)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Print non-intrinsic debug info in textual IR output (PR #79281)
Stephen Tozer via llvm-commits
- [llvm] [LangRef] Clarify definition of fragments and debug intrinsics (PR #82019)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][NFC] Introduce DbgRecord base class [1/3] (PR #78252)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][NFC] Introduce DbgRecord base class [1/3] (PR #78252)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][NFC] Introduce DbgRecord base class [1/3] (PR #78252)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][NFC] Introduce DbgRecord base class [1/3] (PR #78252)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][NFC] Introduce DbgRecord base class [1/3] (PR #78252)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Print non-intrinsic debug info in textual IR output (PR #79281)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Print non-intrinsic debug info in textual IR output (PR #79281)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][NFC] Add DPLabel class [2/3] (PR #82376)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][NFC] Add DPLabel class [2/3] (PR #82376)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][NFC] Add DPLabel class [2/3] (PR #82376)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][NFC] Add DPLabel class [2/3] (PR #82376)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Print non-intrinsic debug info in textual IR output (PR #79281)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Print non-intrinsic debug info in textual IR output (PR #79281)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][NFC] Add DPLabel class [2/3] (PR #82376)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][NFC] Add DPLabel class [2/3] (PR #82376)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][NFC] Add DPLabel class [2/3] (PR #82376)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][DebugInfo][IR] Add parsing for non-intrinsic debug values (PR #79818)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][DebugInfo][IR] Add parsing for non-intrinsic debug values (PR #79818)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][DebugInfo][IR] Add parsing for non-intrinsic debug values (PR #79818)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][DebugInfo] Add DPValue checks to the verifier, prepare DPValue for parsing support (PR #79810)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][DebugInfo][IR] Add parsing for non-intrinsic debug values (PR #79818)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][DebugInfo] Add DPValue checks to the verifier, prepare DPValue for parsing support (PR #79810)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][DebugInfo] Add DPValue checks to the verifier, prepare DPValue for parsing support (PR #79810)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][DebugInfo] Add DPValue checks to the verifier, prepare DPValue for parsing support (PR #79810)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Add DPLabels support [3a/3] (PR #82633)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Add DPLabels support [3a/3] (PR #82633)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Add DPLabels support [3a/3] (PR #82633)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Add DPLabels support [3a/3] (PR #82633)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][DebugInfo] Add DPValue checks to the verifier, prepare DPValue for parsing support (PR #79810)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][DebugInfo] Add DPValue checks to the verifier, prepare DPValue for parsing support (PR #79810)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][LoopIdiomRecognize] Fix #82582: Wrong debug location update in processLoopStoreOfLoopLoad (PR #82608)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][LoopIdiomRecognize] Fix #82582: Wrong debug location update in processLoopStoreOfLoopLoad (PR #82608)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][LoopIdiomRecognize] Fix #82582: Wrong debug location update in processLoopStoreOfLoopLoad (PR #82608)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][LoopIdiomRecognize] Fix #82582: Wrong debug location update in processLoopStoreOfLoopLoad (PR #82608)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][LoopIdiomRecognize] Fix #82582: Wrong debug location update in processLoopStoreOfLoopLoad (PR #82608)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][LoopIdiomRecognize] Fix #82582: Wrong debug location update in processLoopStoreOfLoopLoad (PR #82608)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs][DebugInfo] Add DPValue checks to the verifier, prepare DPValue for parsing support (PR #79810)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Add DPLabels support [3a/3] (PR #82633)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Add DPLabels support [3a/3] (PR #82633)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Add DPLabels support [3a/3] (PR #82633)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Add DPLabels support [3a/3] (PR #82633)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Enable DPLabels conversion [3b/3] (PR #82639)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][RemoveDIs] Prevent duplicate DPValues from being returned by findDbgIntrinsics (PR #82764)
Stephen Tozer via llvm-commits
- [llvm] [RemoveDIs] Enable DPLabels conversion [3b/3] (PR #82639)
Stephen Tozer via llvm-commits
- [llvm] [DebugInfo][RemoveDIs] Prevent duplicate DPValues from being returned by findDbgIntrinsics (PR #82764)
Stephen Tozer via llvm-commits
- [llvm] [Hexagon] Update InstrInfo to include LD/ST offsets of vector instructions (PR #82386)
Steven Johnson via llvm-commits
- [llvm] [llvm-objcopy] Fix file offsets when PT_INTERP/PT_LOAD offsets are equal (PR #80562)
Steven Johnson via llvm-commits
- [llvm] [llvm-objcopy] Fix file offsets when PT_INTERP/PT_LOAD offsets are equal (PR #80562)
Steven Johnson via llvm-commits
- [llvm] [llvm-objcopy] Fix file offsets when PT_INTERP/PT_LOAD offsets are equal (PR #80562)
Steven Johnson via llvm-commits
- [llvm] [llvm-objcopy] Fix file offsets when PT_INTERP/PT_LOAD offsets are equal (PR #80562)
Steven Johnson via llvm-commits
- [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82418)
Steven Johnson via llvm-commits
- [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82011)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82011)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Update InstrInfo to include LD/ST offsets of vector instructions (PR #82386)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Update InstrInfo to include LD/ST offsets of vector instructions (PR #82386)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Update InstrInfo to include LD/ST offsets of vector instructions (PR #82386)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82011)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Update InstrInfo to include LD/ST offsets of vector instructions (PR #82386)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Update InstrInfo to include LD/ST offsets of vector instructions (PR #82386)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82418)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82418)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82418)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Update InstrInfo to include LD/ST offsets of vector instructions (PR #82386)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82418)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82418)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Generate absolute-set load/store instructions. (PR #82034)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82418)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82418)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82418)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82418)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Generate absolute-set load/store instructions. (PR #82034)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82418)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Clean up redundant transfer instructions. (PR #82663)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Clean up redundant transfer instructions. (PR #82663)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Clean up redundant transfer instructions. (PR #82663)
Sumanth Gundapaneni via llvm-commits
- [llvm] [Hexagon] Clean up redundant transfer instructions. (PR #82663)
Sumanth Gundapaneni via llvm-commits
- [llvm] [WebAssembly] Disable multivalue emission temporarily (PR #82714)
Thomas Lively via llvm-commits
- [llvm] [WebAssembly] Disable multivalue emission temporarily (PR #82714)
Thomas Lively via llvm-commits
- [llvm] [WebAssembly] Disable multivalue emission temporarily (PR #82714)
Thomas Lively via llvm-commits
- [llvm] [WebAssembly] Disable multivalue emission temporarily (PR #82714)
Thomas Lively via llvm-commits
- [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #82595)
Thomas Preud'homme via llvm-commits
- [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #82595)
Thomas Preud'homme via llvm-commits
- [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #82595)
Thomas Preud'homme via llvm-commits
- [llvm] Extend GCC workaround to GCC < 8.4 for llvm::iterator_range ctor (PR #82643)
Thomas Preud'homme via llvm-commits
- [llvm] Extend GCC workaround to GCC < 8.4 for llvm::iterator_range ctor (PR #82643)
Thomas Preud'homme via llvm-commits
- [llvm] Extend GCC workaround to GCC < 8.4 for llvm::iterator_range ctor (PR #82643)
Thomas Preud'homme via llvm-commits
- [llvm] Extend GCC workaround to GCC < 8.4 for llvm::iterator_range ctor (PR #82643)
Thomas Preud'homme via llvm-commits
- [llvm] Extend GCC workaround to GCC < 8.4 for llvm::iterator_range ctor (PR #82643)
Thomas Preud'homme via llvm-commits
- [llvm] Extend GCC workaround to GCC < 8.4 for llvm::iterator_range ctor (PR #82643)
Thomas Preud'homme via llvm-commits
- [llvm] Add new helper `Module::getRequiredFunction`. (PR #82761)
Thomas Symalla via llvm-commits
- [llvm] [GlobalIsel] Combine logic of floating point compares (PR #81886)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine logic of floating point compares (PR #81886)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine logic of floating point compares (PR #81886)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine logic of floating point compares (PR #81886)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine logic of floating point compares (PR #81886)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalISel] Make sure to check for load barriers when merging G_EXTRACT_VECTOR_ELT into G_LOAD. (PR #82306)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalISel] Make sure to check for load barriers when merging G_EXTRACT_VECTOR_ELT into G_LOAD. (PR #82306)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine ADDE (PR #82413)
Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
- [llvm] 12d29cd - test overflow intrinsics
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine ADDO (PR #82927)
Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
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Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine ADDO (PR #82927)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine ADDO (PR #82927)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine ADDO (PR #82927)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine ADDO (PR #82927)
Thorsten Schütt via llvm-commits
- [llvm] [GlobalIsel] Combine ADDO (PR #82927)
Thorsten Schütt via llvm-commits
- [compiler-rt] Do not call disable / enable on null depot (PR #82542)
Thurston Dang via llvm-commits
- [compiler-rt] [hwasan] Add missing printf parameter in __hwasan_handle_longjmp (PR #82559)
Thurston Dang via llvm-commits
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Thurston Dang via llvm-commits
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Thurston Dang via llvm-commits
- [llvm] 0215d2c - arm64_32: extend @llvm.stackguard call to in-DAG 64-bits before handing off
Tim Northover via llvm-commits
- [llvm] arm64_32: extend @llvm.stackguard call to in-DAG 64-bits before handing off (PR #77318)
Tim Northover via llvm-commits
- [llvm] arm64_32: extend @llvm.stackguard call to in-DAG 64-bits before handing off (PR #77318)
Tim Northover via llvm-commits
- [llvm] [X86][MC] Reject out-of-range segment and debug registers encoded with APX (PR #82584)
Timothy Herchen via llvm-commits
- [llvm] [X86][MC] Reject out-of-range segment and debug registers encoded with APX (PR #82584)
Timothy Herchen via llvm-commits
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Timothy Herchen via llvm-commits
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Tom Stellard via llvm-commits
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Valery Pykhtin via llvm-commits
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Valery Pykhtin via llvm-commits
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Valery Pykhtin via llvm-commits
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Valery Pykhtin via llvm-commits
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Vedant Paranjape via llvm-commits
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- [clang] [llvm] [AMDGPU] Enable OpenCL hostcall printf (WIP) (PR #72556)
Vikram Hegde via llvm-commits
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Vikram Hegde via llvm-commits
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Vikram Hegde via llvm-commits
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Vikram Hegde via llvm-commits
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Vikram Hegde via llvm-commits
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Vikram Hegde via llvm-commits
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Vikram Hegde via llvm-commits
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Vikram Hegde via llvm-commits
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Vikram Hegde via llvm-commits
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Vikram Hegde via llvm-commits
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Visoiu Mistrih Francis via llvm-commits
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Visoiu Mistrih Francis via llvm-commits
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Visoiu Mistrih Francis via llvm-commits
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Visoiu Mistrih Francis via llvm-commits
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Visoiu Mistrih Francis via llvm-commits
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Visoiu Mistrih Francis via llvm-commits
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Visoiu Mistrih Francis via llvm-commits
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Visoiu Mistrih Francis via llvm-commits
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Visoiu Mistrih Francis via llvm-commits
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Visoiu Mistrih Francis via llvm-commits
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Visoiu Mistrih Francis via llvm-commits
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Visoiu Mistrih Francis via llvm-commits
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Visoiu Mistrih Francis via llvm-commits
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Visoiu Mistrih Francis via llvm-commits
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Visoiu Mistrih Francis via llvm-commits
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Vlad Serebrennikov via llvm-commits
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Vladimir Vereschaka via llvm-commits
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Vladimir Vereschaka via llvm-commits
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Volodymyr Sapsai via llvm-commits
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Vyacheslav Levytskyy via llvm-commits
- [llvm] Add support for the SPV_INTEL_usm_storage_classes extension (PR #82247)
Vyacheslav Levytskyy via llvm-commits
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Vyacheslav Levytskyy via llvm-commits
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Vyacheslav Levytskyy via llvm-commits
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Vyacheslav Levytskyy via llvm-commits
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Vyacheslav Levytskyy via llvm-commits
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Vyacheslav Levytskyy via llvm-commits
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Vyacheslav Levytskyy via llvm-commits
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Vyacheslav Levytskyy via llvm-commits
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Vyacheslav Levytskyy via llvm-commits
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Vyacheslav Levytskyy via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
- [llvm] b8ed69e - [RISCV] Support llvm.readsteadycounter intrinsic
Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
- [llvm] [RISCV][NFC] Allow SchedVar to be a def inside our scheduler model files. (PR #82634)
Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
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Wang Pengcheng via llvm-commits
- [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)
Wang Pengcheng via llvm-commits
- [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)
Wang Pengcheng via llvm-commits
- [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)
Wang Pengcheng via llvm-commits
- [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)
Wang Pengcheng via llvm-commits
- [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)
Wang Pengcheng via llvm-commits
- [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)
Wang Pengcheng via llvm-commits
- [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)
Wang Pengcheng via llvm-commits
- [llvm] [RISCV][NFC] Use sub to construct RVV registers without V0 (PR #82962)
Wang Pengcheng via llvm-commits
- [llvm] [asan] Disable instrumentation for available_externally global with COFF (PR #81109)
Wu Yingcong via llvm-commits
- [llvm] [asan] Disable instrumentation for available_externally global with COFF (PR #81109)
Wu Yingcong via llvm-commits
- [llvm] [DirectX][NFC] Use LLVM Types in DXIL Operation specifications in DXIL.td (PR #81692)
Xiang Li via llvm-commits
- [llvm] [DirectX][NFC] Use LLVM Types in DXIL Operation specifications in DXIL.td (PR #81692)
Xiang Li via llvm-commits
- [llvm] [DirectX][NFC] Rename ShaderFlag to Shader_FEATURE_INFO. (PR #82700)
Xiang Li via llvm-commits
- [llvm] [DirectX][NFC] Rename ShaderFlag to Shader_FEATURE_INFO. (PR #82700)
Xiang Li via llvm-commits
- [llvm] [DirectX][NFC] Rename ShaderFlag to Shader_FEATURE_INFO. (PR #82700)
Xiang Li via llvm-commits
- [llvm] [DirectX][NFC] Rename ShaderFlag to Shader_FEATURE_INFO. (PR #82700)
Xiang Li via llvm-commits
- [llvm] [DirectX][NFC] Rename ShaderFlag to Shader_FEATURE_INFO. (PR #82700)
Xiang Li via llvm-commits
- [llvm] [llvm][doc][cmake] Use llvm_config instead of llvm_map_components_to_libnames (llvm#34593) (PR #82765)
Yanglin Xun via llvm-commits
- [llvm] [llvm][doc][cmake] Use llvm_config instead of llvm_map_components_to_libnames (llvm#34593) (PR #82765)
Yanglin Xun via llvm-commits
- [llvm] [llvm][doc][cmake] Use llvm_config instead of llvm_map_components_to_libnames (llvm#34593) (PR #82765)
Yanglin Xun via llvm-commits
- [llvm] [llvm][doc][cmake] Use llvm_config instead of llvm_map_components_to_libnames (llvm#34593) (PR #82765)
Yanglin Xun via llvm-commits
- [llvm] [llvm][doc][cmake] Use llvm_config instead of llvm_map_components_to_libnames (llvm#34593) (PR #82769)
Yanglin Xun via llvm-commits
- [llvm] [RISCV] Select pattern (shl (sext_vl/zext_vl), 1) to VWADD/VWADDU. (PR #82225)
Yeting Kuo via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/substraction and RISC-V support. (PR #82370)
Yeting Kuo via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/substraction and RISC-V support. (PR #82370)
Yeting Kuo via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/substraction and RISC-V support. (PR #82370)
Yeting Kuo via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/substraction and RISC-V support. (PR #82370)
Yeting Kuo via llvm-commits
- [llvm] [RISCV] Teach RISCVMakeCompressible handle Zca/Zcf/Zce/Zcd. (PR #81844)
Yeting Kuo via llvm-commits
- [llvm] [RISCV] Teach RISCVMakeCompressible handle Zca/Zcf/Zce/Zcd. (PR #81844)
Yeting Kuo via llvm-commits
- [llvm] [InjectTLIMappings] Remove signext/zeroext attributes from vector functions. (PR #80546)
Yeting Kuo via llvm-commits
- [llvm] [InjectTLIMappings] Remove signext/zeroext attributes from vector functions. (PR #80546)
Yeting Kuo via llvm-commits
- [llvm] [RISCV] Teach RISCVMakeCompressible handle Zca/Zcf/Zce/Zcd. (PR #81844)
Yeting Kuo via llvm-commits
- [llvm] [RISCV] Teach RISCVMakeCompressible handle Zca/Zcf/Zce/Zcd. (PR #81844)
Yeting Kuo via llvm-commits
- [llvm] [RISCV] Teach RISCVMakeCompressible handle Zca/Zcf/Zce/Zcd. (PR #81844)
Yeting Kuo via llvm-commits
- [llvm] [InjectTLIMappings] Remove signext/zeroext attributes from vector functions. (PR #80546)
Yeting Kuo via llvm-commits
- [llvm] [InjectTLIMappings] Remove signext/zeroext attributes from vector functions. (PR #80546)
Yeting Kuo via llvm-commits
- [llvm] [InjectTLIMappings] Remove signext/zeroext attributes from vector functions. (PR #80546)
Yeting Kuo via llvm-commits
- [llvm] [InjectTLIMappings] Remove signext/zeroext attributes from vector functions. (PR #80546)
Yeting Kuo via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Yeting Kuo via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Yeting Kuo via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/substraction and RISC-V support. (PR #82370)
Yeting Kuo via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/substraction and RISC-V support. (PR #82370)
Yeting Kuo via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/substraction and RISC-V support. (PR #82370)
Yeting Kuo via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/substraction and RISC-V support. (PR #82370)
Yeting Kuo via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/substraction and RISC-V support. (PR #82370)
Yeting Kuo via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Yeting Kuo via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Yeting Kuo via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Yeting Kuo via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Yeting Kuo via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Yeting Kuo via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Yeting Kuo via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Yeting Kuo via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Yeting Kuo via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/subtraction and RISC-V support. (PR #82370)
Yeting Kuo via llvm-commits
- [llvm] [RISCV][VP] Introduce vp saturating addition/subtraction and RISC-V support. (PR #82370)
Yeting Kuo via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Yeting Kuo via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Yeting Kuo via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Yeting Kuo via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Yeting Kuo via llvm-commits
- [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)
Yeting Kuo via llvm-commits
- [llvm] [CodeGenPrepare] Reverse the canonicalization of isInf/isNanOrInf (PR #81572)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Don't require GEP in indexed compare fold (PR #81614)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Improve tracking for constant range of `{s|u}rem C` (PR #82303)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Improve tracking for constant range of `{s|u}rem C` (PR #82303)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Improve tracking for constant range of `{s|u}rem C` (PR #82303)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold usub_sat((sub nuw C1, A), C2) to usub_sat(C1 - C2, A) or 0 (PR #82280)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Optimize `sinh` and `cosh` divivsions (PR #81433)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Add ctpop(A | B) + ctpop(A & B) -> ctpop(A) + ctpop(B) (PR #79089)
Yingwei Zheng via llvm-commits
- [llvm] [ConstraintElim] Decompose sext-like insts for signed predicates (PR #82344)
Yingwei Zheng via llvm-commits
- [llvm] [ConstraintElim] Decompose sext-like insts for signed predicates (PR #82344)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV] Fix scheduling info for C_FSW and C_FSWSP. (PR #82339)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold gep of exact unsigned division (PR #82334)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Support zext nneg in `foldLogicCastConstant` (PR #82355)
Yingwei Zheng via llvm-commits
- [llvm] [ConstraintElim] Add pre-commit tests for PR82271. NFC. (PR #82357)
Yingwei Zheng via llvm-commits
- [llvm] [ConstraintElim] Add pre-commit tests for PR82271. NFC. (PR #82357)
Yingwei Zheng via llvm-commits
- [llvm] [ConstraintElim] Add pre-commit tests for PR82271. NFC. (PR #82357)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Support zext nneg in `foldLogicCastConstant` (PR #82355)
Yingwei Zheng via llvm-commits
- [llvm] [ConstraintElim] Add pre-commit tests for PR82271. NFC. (PR #82357)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold dependent IVs (PR #81151)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold dependent IVs (PR #81151)
Yingwei Zheng via llvm-commits
- [llvm] [ConstraintElim] Add pre-commit tests for PR82271. NFC. (PR #82357)
Yingwei Zheng via llvm-commits
- [llvm] [ConstraintElim] Decompose sext-like insts for signed predicates (PR #82344)
Yingwei Zheng via llvm-commits
- [llvm] [ConstraintElim] Decompose sext-like insts for signed predicates (PR #82344)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold dependent IVs (PR #81151)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold dependent IVs (PR #81151)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV] Fix scheduling info for C_FSW and C_FSWSP. (PR #82339)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Canonicalize `(uitofp x)` -> `(sitofp x)` if `x >= 0` (PR #82404)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Add support for cast instructions in `getFreelyInvertedImpl` (PR #82451)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV][SDAG] Improve codegen of select with constants if zicond is available (PR #82456)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV][SDAG] Fold `select c, ~x, x` into `xor -c, x` (PR #82462)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV] Fix scheduling info for C_FSW and C_FSWSP. (PR #82339)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Avoid breaking SPF by `foldICmpUsingKnownBits` (PR #82472)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV][SDAG] Fold `select c, ~x, x` into `xor -c, x` (PR #82462)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Avoid breaking SPF by `foldICmpUsingKnownBits` (PR #82472)
Yingwei Zheng via llvm-commits
- [llvm] [CVP] Canonicalize signed minmax into unsigned (PR #82478)
Yingwei Zheng via llvm-commits
- [llvm] [CVP] Refactor `processMinMaxIntrinsic` to use context-sensitive information (PR #82596)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Improve bitfield addition (PR #77184)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Improve bitfield addition (PR #77184)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Improve bitfield addition (PR #77184)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Improve bitfield addition (PR #77184)
Yingwei Zheng via llvm-commits
- [llvm] [CVP] Refactor `processMinMaxIntrinsic` to use context-sensitive information (PR #82596)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)
Yingwei Zheng via llvm-commits
- [llvm] [CVP] Refactor `processMinMaxIntrinsic` to check non-strict predicate in both directions (PR #82596)
Yingwei Zheng via llvm-commits
- [llvm] [CVP] Refactor `processMinMaxIntrinsic` to check non-strict predicate in both directions (PR #82596)
Yingwei Zheng via llvm-commits
- [llvm] [CVP] Refactor `processMinMaxIntrinsic` to check non-strict predicate in both directions (PR #82596)
Yingwei Zheng via llvm-commits
- [llvm] [CVP] Refactor `processMinMaxIntrinsic` to check non-strict predicate in both directions (PR #82596)
Yingwei Zheng via llvm-commits
- [llvm] [CVP] Refactor `processMinMaxIntrinsic` to check non-strict predicate in both directions (PR #82596)
Yingwei Zheng via llvm-commits
- [llvm] [CVP] Refactor `processMinMaxIntrinsic` to check non-strict predicate in both directions (PR #82596)
Yingwei Zheng via llvm-commits
- [llvm] [CVP] Canonicalize signed minmax into unsigned (PR #82478)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV][SDAG] Improve codegen of select with constants if zicond is available (PR #82456)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV][SDAG] Improve codegen of select with constants if zicond is available (PR #82456)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Add support for cast instructions in `getFreelyInvertedImpl` (PR #82451)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV][NFC] Allow SchedVar to be a def inside our scheduler model files. (PR #82634)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV][NFC] Allow SchedVar to be a def inside our scheduler model files. (PR #82634)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Add support for cast instructions in `getFreelyInvertedImpl` (PR #82451)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [IRBuilder] Fold binary intrinsics (PR #80743)
Yingwei Zheng via llvm-commits
- [llvm] [ConstraintElim] Decompose sext-like insts for signed predicates (PR #82344)
Yingwei Zheng via llvm-commits
- [llvm] [ConstraintElim] Decompose sext-like insts for signed predicates (PR #82344)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV][SDAG] Improve codegen of select with constants if zicond is available (PR #82456)
Yingwei Zheng via llvm-commits
- [llvm] [ConstraintElim] Decompose sext-like insts for signed predicates (PR #82344)
Yingwei Zheng via llvm-commits
- [llvm] [ConstraintElim] Decompose sext-like insts for signed predicates (PR #82344)
Yingwei Zheng via llvm-commits
- [llvm] [CVP] Canonicalize signed minmax into unsigned (PR #82478)
Yingwei Zheng via llvm-commits
- [llvm] [CVP] Canonicalize signed minmax into unsigned (PR #82478)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Improve folding of `icmp pred (and X, Mask/~Mask), Y)` (PR #81562)
Yingwei Zheng via llvm-commits
- [llvm] [ConstraintElim] Decompose sext-like insts for signed predicates (PR #82344)
Yingwei Zheng via llvm-commits
- [llvm] [CVP] Canonicalize signed minmax into unsigned (PR #82478)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Add a helper to detect information loss (PR #82674)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Avoid breaking SPF by `foldICmpUsingKnownBits` (PR #82472)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Add a helper to detect information loss (PR #82674)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Add support for cast instructions in `getFreelyInvertedImpl` (PR #82451)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Add a helper to detect information loss (PR #82674)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Avoid breaking SPF by `foldICmpUsingKnownBits` (PR #82472)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Avoid breaking SPF by `foldICmpUsingKnownBits` (PR #82472)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Add a helper to detect information loss (PR #82674)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Add a helper to detect information loss (PR #82674)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Add a helper to detect information loss (PR #82674)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Add a helper to detect information loss (PR #82674)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Handle more integer intrinsics in `propagatesPoison` (PR #82749)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Handle more integer intrinsics in `propagatesPoison` (PR #82749)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Handle more integer intrinsics in `propagatesPoison` (PR #82749)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Handle `icmp pred (trunc X), C` in `computeKnownBitsFromCmp` (PR #82803)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking][NFC] Early exit when enumerating guaranteed well-defined/non-poison operands. (PR #82812)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Avoid breaking SPF by `foldICmpUsingKnownBits` (PR #82472)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking][NFC] Early exit when enumerating guaranteed well-defined/non-poison operands. (PR #82812)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking][NFC] Early exit when enumerating guaranteed well-defined/non-poison operands. (PR #82812)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking][NFC] Early exit when enumerating guaranteed well-defined/non-poison operands. (PR #82812)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Compute knownbits for `(and/or cond0, cond1)` on both sides of branch (PR #82818)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Handle more even/odd math functions (PR #81324)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Handle more even/odd math functions (PR #81324)
Yingwei Zheng via llvm-commits
- [llvm] [FlattenCFG] Fix the miscompilation where phi nodes exist in the merge point (PR #81987)
Yingwei Zheng via llvm-commits
- [llvm] [CodeGenPrepare] Reverse the canonicalization of isInf/isNanOrInf (PR #81572)
Yingwei Zheng via llvm-commits
- [llvm] [CodeGenPrepare] Reverse the canonicalization of isInf/isNanOrInf (PR #81572)
Yingwei Zheng via llvm-commits
- [llvm] [CodeGenPrepare] Reverse the canonicalization of isInf/isNanOrInf (PR #81572)
Yingwei Zheng via llvm-commits
- [llvm] [FlattenCFG] Fix the miscompilation where phi nodes exist in the merge point (PR #81987)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold umax(smax)/smin(umin) with non-negative constants (PR #82929)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold umax(smax)/smin(umin) with non-negative constants (PR #82929)
Yingwei Zheng via llvm-commits
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- [llvm] [HCS] Externd to outline overlapping sub/super cold regions (PR #80732)
via llvm-commits
- [llvm] [CGP] Permit tail call optimization on undefined return value (PR #82419)
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- [llvm] [Release] Don't build during test-release.sh Phase 3 install (PR #82001)
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- [llvm] 1219214 - [Hexagon] Update InstrInfo to include LD/ST offsets of vector instructions (#82386)
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- [llvm] [LLVM][DWARF] Refactor code for generating DWARF V5 .debug_names (PR #82394)
via llvm-commits
- [llvm] [LLVM][DWARF] Refactor code for generating DWARF V5 .debug_names (PR #82394)
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- [llvm] [ThinLTO] NFC: Merge duplicated functions together (PR #82421)
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- [llvm] [AMDGPU] Fix v_dot2_f16_f16/v_dot2_bf16_bf16 operands (PR #82423)
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- [llvm] [VPlan] Support live-ins without underlying IR in type analysis. (PR #80723)
via llvm-commits
- [llvm] [VPlan] Support live-ins without underlying IR in type analysis. (PR #80723)
via llvm-commits
- [llvm] [VPlan] Support live-ins without underlying IR in type analysis. (PR #80723)
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- [llvm] [LLVM][DWARF] Refactor code for generating DWARF V5 .debug_names (PR #82394)
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- [llvm] [SROA] analyze gep(ptr,phi(const...)) (PR #82425)
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- [llvm] Resolve fixme: create cld only when needed (PR #82415)
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- [llvm] Resolve fixme: create cld only when needed (PR #82415)
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- [llvm] Resolve fixme: create cld only when needed (PR #82415)
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- [compiler-rt] [scudo] increase frames per stack to 16 for stack depot (PR #82427)
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- [compiler-rt] [llvm] [nfc]For InstrProfData.inc, clang-format functions and opt-out of formatting on the rest (PR #82057)
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- [llvm] AMDGPU: Use HasFP8ConversionInsts appropriately, NFC (PR #82433)
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- [compiler-rt] [llvm] [nfc][compiler-rt]Replace Type::getInt8PtrTy with PointerType::getUnqual as a clean-up (PR #82434)
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- [llvm] [AMDGPU] Add v2bf16 for opsel immediate folding (PR #82435)
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- [llvm] [NVPTX] Annotate CUDA kernel pointer arguments with .ptr .space .align attributes. (PR #79646)
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- [llvm] [NVPTX] Annotate CUDA kernel pointer arguments with .ptr .space .align attributes. (PR #79646)
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- [llvm] 39cab1a - [AMDGPU] Add v2bf16 for opsel immediate folding (#82435)
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- [llvm] [LLVM][DWARF] Refactor code for generating DWARF V5 .debug_names (PR #82394)
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- [llvm] [LLVM][DWARF] Refactor code for generating DWARF V5 .debug_names (PR #82394)
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- [llvm] [NVPTX] Annotate CUDA kernel pointer arguments with .ptr .space .align attributes. (PR #79646)
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- [llvm] [LLVM][DWARF] Refactor code for generating DWARF V5 .debug_names (PR #82394)
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- [llvm] select m, sub/add(X, C), X --> sub/add (X, and(C, m)) (PR #82441)
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- [llvm] select m, sub/add(X, C), X --> sub/add (X, and(C, m)) (PR #82441)
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- [llvm] select m, sub/add(X, C), X --> sub/add (X, and(C, m)) (PR #82441)
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- [llvm] select m, sub/add(X, C), X --> sub/add (X, and(C, m)) (PR #82441)
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- [llvm] [LLVM][DebugInfo] Refactor some code for easier sharing. (PR #82153)
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- [llvm] [LLVM][DebugInfo] Refactor some code for easier sharing. (PR #82153)
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- [llvm] [LLVM][DebugInfo] Refactor some code for easier sharing. (PR #82153)
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- [llvm] [LLVM][DebugInfo] Refactor some code for easier sharing. (PR #82153)
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- [llvm] [LLVM][DebugInfo] Refactor some code for easier sharing. (PR #82153)
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- [llvm] [LLVM][DWARF] Refactor code for generating DWARF V5 .debug_names (PR #82394)
via llvm-commits
- [llvm] d3fcf31 - AMDGPU: Use HasFP8ConversionInsts appropriately, NFC (#82433)
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- [llvm] [LLVM][DebugInfo] Refactor some code for easier sharing. (PR #82153)
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- [llvm] Resolve fixme: create cld only when needed (PR #82415)
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- [llvm] 98db8d0 - [AMDGPU] Fix v_dot2_f16_f16/v_dot2_bf16_bf16 operands (#82423)
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- [llvm] Resolve fixme: create cld only when needed (PR #82415)
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- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
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- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
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- [llvm] [InstCombine] Add support for cast instructions in `getFreelyInvertedImpl` (PR #82451)
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- [llvm] [X86] Resolve FIXME: Add X86::FPCW as a rounding control register (PR #82452)
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- [llvm] [X86] Resolve FIXME: Add X86::FPCW as a rounding control register (PR #82452)
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- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
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- [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)
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- [llvm] [X86] Resolve FIXME: Add X86::FPCW as a rounding control register (PR #82452)
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- [llvm] [workflows] Fix permissions check for creating new releases (PR #81163)
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- [llvm] [X86] Resolve FIXME: Add X86::FPCW as a rounding control register (PR #82452)
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- [llvm] Add ARM:r12 and ARM:LR as scratch regs for ARM (PR #82454)
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- [llvm] Add ARM:r12 and ARM:LR as scratch regs for ARM (PR #82454)
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- [llvm] Add ARM:r12 and ARM:LR as scratch regs for ARM (PR #82454)
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- [llvm] Add ARM:r12 and ARM:LR as scratch regs for ARM (PR #82454)
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- [llvm] Add ARM:r12 and ARM:LR as scratch regs for ARM (PR #82454)
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- [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)
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- [llvm] [ARM] Add r12 and lr as scratch regs (PR #82454)
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- [llvm] [ARM] Add r12 and lr as scratch regs (PR #82454)
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- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
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- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
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- [llvm] [RISCV] Vector sub (zext, zext) -> sext (sub (zext, zext)) (PR #82455)
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- [llvm] [NewPM/CodeGen] Rewrite pass manager nesting (PR #81068)
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- [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)
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- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
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- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
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- [llvm] [ARM] Add r12 and lr as scratch registers (PR #82454)
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- [llvm] [ARM] Add r12 and lr as scratch registers (PR #82454)
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- [llvm] [OpenMP][FIX] Remove unsound omp_get_thread_limit deduplication (PR #79524)
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- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
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- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
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- [llvm] [RISCV][SDAG] Improve codegen of select with constants if zicond is available (PR #82456)
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- [llvm] [InstCombine] Add support for cast instructions in `getFreelyInvertedImpl` (PR #82451)
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- [llvm] [AArch64] Improve lowering of truncating uzp1 (PR #82457)
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- [llvm] [CodeGen] Port AtomicExpand to new Pass Manager (PR #71220)
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- [llvm] c02b0d0 - [GlobalISel] Make sure to check for load barriers when merging G_EXTRACT_VECTOR_ELT into G_LOAD. (#82306)
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- [llvm] [OpenMP][FIX] Remove unsound omp_get_thread_limit deduplication (PR #79524)
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- [llvm] [OpenMP][FIX] Remove unsound omp_get_thread_limit deduplication (PR #79524)
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- [llvm] [OpenMP][FIX] Remove unsound omp_get_thread_limit deduplication (PR #79524)
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- [llvm] [OpenMP][FIX] Remove unsound omp_get_thread_limit deduplication (PR #79524)
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- [llvm] 03203b7 - [SPIR-V] Fix vloadn OpenCL builtin lowering (#81148)
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- [llvm] [GVN] Restrict equality propagation for pointers (PR #82458)
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- [llvm] [GVN] Restrict equality propagation for pointers (PR #82458)
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- [llvm] 7988973 - Implement convergence control in MIR using SelectionDAG (#71785)
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- [llvm] [Offload][WIP] Move `/openmp/libomptarget` to `/offload` (PR #82459)
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- [llvm] [Offload][WIP] Move `/openmp/libomptarget` to `/offload` (PR #82459)
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- [llvm] [GlobalISel] Clamp out-of-range G_EXTRACT_VECTOR_ELT constant indices when converting them into loads. (PR #82460)
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- [llvm] [Offload][WIP] Move `/openmp/libomptarget` to `/offload` (PR #82459)
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- [llvm] [GlobalISel] Clamp out-of-range G_EXTRACT_VECTOR_ELT constant indices when converting them into loads. (PR #82460)
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- [llvm] e4057aa - [X86] Add missing pass initialization calls. (#82447)
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- [llvm] 44b717d - [GlobalISel] Clamp out-of-range G_EXTRACT_VECTOR_ELT constant indices when converting them into loads. (#82460)
via llvm-commits
- [compiler-rt] ec516ff - Fix __isOSVersionAtLeast for Android (#80496)
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- [compiler-rt] Fix __isOSVersionAtLeast for Android (PR #80496)
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- [compiler-rt] Fix __isOSVersionAtLeast for Android (PR #80496)
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- [llvm] [RISCV][SDAG] Fold `select c, ~x, x` into `xor -c, x` (PR #82462)
via llvm-commits
- [llvm] [RISCV] Use TImmLeaf for csr_sysreg (PR #82463)
via llvm-commits
- [llvm] a445474 - [RISCV] Use TImmLeaf for csr_sysreg (#82463)
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- [llvm] [BPI] Refine libcall heuristic (PR #79941)
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- [llvm] [AMDGPU] Add function attribute to force enable WQM (PR #82468)
via llvm-commits
- [llvm] clarify semantics of masked vector load/store (PR #82469)
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- [llvm] d3fb596 - [RISCV] Fix scheduling info for compressed LD/ST of FP types. (#82339)
via llvm-commits
- [llvm] 7ce1a11 - [InstCombine] Fold dependent IVs (#81151)
via llvm-commits
- [llvm] [docs][llvm-objcopy] Add missing formats (PR #81981)
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- [llvm] 02fad05 - [RISCV][SDAG] Fold `select c, ~x, x` into `xor -c, x` (#82462)
via llvm-commits
- [llvm] [llvm][unittests] add NDEBUG for some unittests (PR #80821)
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- [llvm] [llvm][unittests] add NDEBUG for some unittests (PR #80821)
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- [llvm] [llvm][unittests] add NDEBUG for some unittests (PR #80821)
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- [llvm] 8b84de2 - [llvm-exegesis][NFC] Refactor all `ValidationEvent` info in a single … (#82256)
via llvm-commits
- [lld] [lld] enable fixup chains by default (PR #79894)
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- [llvm] 07292b7 - [LIR][SCEVExpander] Restore original flags when aborting transform (#82362)
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- [llvm] [AMDGPU][MC] Support src modifiers for v_mov_b32 and v_movrel* instructions (PR #76498)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Refactor BITCAST Legalization (PR #80505)
via llvm-commits
- [llvm] [PowerPC] Peephole address calculation in TOC memops (PR #76488)
via llvm-commits
- [llvm] [Mips] Fix missing sign extension in expansion of sub-word atomic max (PR #77072)
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- [llvm] 5db49f7 - [GlobalISel] replace right identity X * -1.0 with fneg(x) (#80526)
via llvm-commits
- [clang] [llvm] [AArch64] Added feature dependencies for SME2p1 to TargetParser (PR #81860)
via llvm-commits
- [llvm] 48101ed - [AArch64] Fix syntax of gcsstr and gcssttr instructions (#82385)
via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)
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- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)
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- [llvm] [CVP] Canonicalize signed minmax into unsigned (PR #82478)
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- [llvm] [DAG] Fix Failure to reassociate SMAX/SMIN/UMAX/UMIN (PR #82175)
via llvm-commits
- [llvm] convert dpp (PR #82480)
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- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)
via llvm-commits
- [llvm] [Mips] Fix missing sign extension in expansion of sub-word atomic max (PR #77072)
via llvm-commits
- [llvm] [RemoveDIs][AsmWriter] Process DbgRecord DebugLocs (PR #82482)
via llvm-commits
- [clang] [llvm] [AArch64] Added feature dependencies for SME2p1 to TargetParser (PR #81860)
via llvm-commits
- [llvm] 6d160a4 - [AMDGPU][TableGen][NFC] Combine predicates without using classes. (#82346)
via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Refactor BITCAST Legalization (PR #80505)
via llvm-commits
- [llvm] Replace copy with a reference. (PR #82485)
via llvm-commits
- [llvm] Replace copy with a reference. (PR #82485)
via llvm-commits
- [llvm] [RISCV][ISel] Combine vector fadd/fsub/fmul with fp extend. (PR #81248)
via llvm-commits
- [llvm] Replace copy with a reference. (PR #82485)
via llvm-commits
- [llvm] e209178 - [SimplifyIndVar] LCSSA form is destroyed by simplifyLoopIVs, preserve it (#78696)
via llvm-commits
- [llvm] 02e17ab - [AArch64] Added feature dependencies for SME2p1 to TargetParser (#81860)
via llvm-commits
- [clang] [llvm] [AArch64] Added feature dependencies for SME2p1 to TargetParser (PR #81860)
via llvm-commits
- [clang] [llvm] [AArch64] Added feature dependencies for SME2p1 to TargetParser (PR #81860)
via llvm-commits
- [llvm] [AArch64] SLP can vectorize frem (PR #82488)
via llvm-commits
- [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)
via llvm-commits
- [llvm] 28fb2b3 - [LLVM][SelectionDAG] Reduce number of ComputeValueVTs variants. (#75614)
via llvm-commits
- [llvm] [LoongArch] Assume no-op addrspacecasts by default (PR #82332)
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- [llvm] [LoongArch] Assume no-op addrspacecasts by default (PR #82332)
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- [llvm] c50ca3d - [RISCV][ISel] Combine vector fadd/fsub/fmul with fp extend. (#81248)
via llvm-commits
- [llvm] [RISCV][ISel] Combine vector fadd/fsub/fmul with fp extend. (PR #81248)
via llvm-commits
- [llvm] dd3e0a4 - [LoongArch] Assume no-op addrspacecasts by default (#82332)
via llvm-commits
- [llvm] [LoongArch] Assume no-op addrspacecasts by default (PR #82332)
via llvm-commits
- [llvm] 0fb3d42 - [AArch64][GlobalISel] Refactor BITCAST Legalization (#80505)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Refactor BITCAST Legalization (PR #80505)
via llvm-commits
- [llvm] 1a71668 - [AArch64] Fix stack probing clobbering flags (#81879)
via llvm-commits
- [llvm] [AArch64] Restore Z-registers before P-registers (#79623) (PR #82492)
via llvm-commits
- [llvm] [AArch64] Restore Z-registers before P-registers (#79623) (PR #82492)
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- [llvm] [AMDGPU] Remove DPP DecoderNamespaces. NFC. (PR #82491)
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- [llvm] [InstCombine] Pick bfloat over half when shrinking ops that started with an fpext from bfloat (PR #82493)
via llvm-commits
- [llvm] [AArch64] Restore Z-registers before P-registers (#79623) (PR #82492)
via llvm-commits
- [llvm] [VPlan] Support live-ins without underlying IR in type analysis. (PR #80723)
via llvm-commits
- [llvm] [VPlan] Support live-ins without underlying IR in type analysis. (PR #80723)
via llvm-commits
- [llvm] [VPlan] Support live-ins without underlying IR in type analysis. (PR #80723)
via llvm-commits
- [llvm] [VPlan] Support live-ins without underlying IR in type analysis. (PR #80723)
via llvm-commits
- [llvm] [VPlan] Support live-ins without underlying IR in type analysis. (PR #80723)
via llvm-commits
- [llvm] [VPlan] Support live-ins without underlying IR in type analysis. (PR #80723)
via llvm-commits
- [llvm] [VPlan] Support live-ins without underlying IR in type analysis. (PR #80723)
via llvm-commits
- [llvm] 5a023f5 - [AArch64][SVE2] Enable dynamic shuffle for fixed length types. (#72490)
via llvm-commits
- [llvm] build_llvm_release.bat: add tarball export to x64 release (PR #79840)
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- [llvm] build_llvm_release.bat: add tarball export to x64 release (PR #79840)
via llvm-commits
- [llvm] build_llvm_release.bat: add tarball export to x64 release (PR #79840)
via llvm-commits
- [llvm] build_llvm_release.bat: add tarball export to x64 release (PR #79840)
via llvm-commits
- [llvm] [AArch64][SVE] Add intrinsincs to assembly mapping for svpmov (PR #81861)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
via llvm-commits
- [llvm] [AArch64][SVE] Add intrinsincs to assembly mapping for svpmov (PR #81861)
via llvm-commits
- [llvm] 9c0e45d - [SystemZ] Use VT (not ArgVT) for SlotVT in LowerCall(). (#82475)
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- [llvm] [AArch64][GlobalISel] Legalize G_STORE for v4s8 vector (PR #82498)
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- [llvm] [AArch64][GlobalISel] Legalize G_STORE for v4s8 vector (PR #82498)
via llvm-commits
- [llvm] f037e70 - [RISCV][TTI] Cost a subvector extract at a register boundary with exact vlen (#82405)
via llvm-commits
- [llvm] [DebugInfo][RemoveDIs] Fix another mismatched debug-info flag (PR #82502)
via llvm-commits
- [llvm] Correctly round FP -> BF16 when SDAG expands such nodes (PR #82399)
via llvm-commits
- [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #79553)
via llvm-commits
- [llvm] 453b1a2 - [LLVM][DWARF] Refactor code for generating DWARF V5 .debug_names (#82394)
via llvm-commits
- [llvm] [LLVM][DWARF] Refactor code for generating DWARF V5 .debug_names (PR #82394)
via llvm-commits
- [llvm] [LLVM][DWARF] Refactor code for generating DWARF V5 .debug_names (PR #82394)
via llvm-commits
- [llvm] Module::getOrInsertFunction: set debug info format (PR #82505)
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- [llvm] [RISCV] Fix mgather -> riscv.masked.strided.load combine not extending indices (PR #82506)
via llvm-commits
- [llvm] 2e29c91 - Revert "[Coro] [async] Disable inlining in async coroutine splitting (#80904)"
via llvm-commits
- [llvm] 162fa4d - Module::getOrInsertFunction: set debug info format (#82505)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
via llvm-commits
- [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)
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- [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)
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- [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)
via llvm-commits
- [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
via llvm-commits
- [llvm] [InstCombine] Improve bitfield addition (PR #77184)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
via llvm-commits
- [llvm] cc374d8 - [OpenMP] Remove `register_requires` global constructor (#80460)
via llvm-commits
- [llvm] cc13f3b - Correctly round FP -> BF16 when SDAG expands such nodes (#82399)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
via llvm-commits
- [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)
via llvm-commits
- [llvm] 2c30180 - [coro] [async] Don't fail on targets that don't support tail calls
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- [libc] [llvm] [LLVM] Add 'LLVM_EXTRA_RUNTIME_TARGETS' to append to default list (PR #82513)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
via llvm-commits
- [llvm] c5bbf97 - [AMDGPU] fixes mistake in #82018 (#82223)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
via llvm-commits
- [llvm] Correct lie in contract (PR #82517)
via llvm-commits
- [llvm] Correct lie in contract (PR #82517)
via llvm-commits
- [llvm] Correct lie in contract (PR #82517)
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- [llvm] Add missing precondition (PR #82519)
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- [llvm] [OpenMP][FIX] Remove unsound omp_get_thread_limit deduplication (PR #79524)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
via llvm-commits
- [llvm] 4247175 - [nfc]For InstrProfData.inc, clang-format functions and opt-out of formatting on the rest (#82057)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
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- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
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- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
via llvm-commits
- [llvm] [Mips] mips1 DivByZeroTrap (PR #81311)
via llvm-commits
- [llvm] [AMDGPU] Prevent hang in SIFoldOperands (PR #82099)
via llvm-commits
- [llvm] 3d66d69 - [VPlan] Support live-ins without underlying IR in type analysis. (#80723)
via llvm-commits
- [llvm] [AMDGPU] Prevent hang in SIFoldOperands (PR #82099)
via llvm-commits
- [llvm] [Mips] mips1 DivByZeroTrap (PR #81311)
via llvm-commits
- [llvm] 22cf983 - [VPlan] Use opaque pointers in VPlan unit test IR (#69947)
via llvm-commits
- [llvm] [Mips] mips1 DivByZeroTrap (PR #81311)
via llvm-commits
- [llvm] [llvm][AArch64] Autoupgrade function attributes from Module attributes. (PR #80640)
via llvm-commits
- [llvm] [llvm][AArch64] Autoupgrade function attributes from Module attributes. (PR #80640)
via llvm-commits
- [llvm] [Mips] mips1 DivByZeroTrap (PR #81311)
via llvm-commits
- [llvm] [llvm][AArch64] Autoupgrade function attributes from Module attributes. (PR #80640)
via llvm-commits
- [llvm] [llvm][AArch64] Autoupgrade function attributes from Module attributes. (PR #80640)
via llvm-commits
- [llvm] [Hexagon] Generate absolute-set load/store instructions. (PR #82034)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
via llvm-commits
- [llvm] db9811c - Make lldbDataFormatters.py compatible with Python 3.8 (#82518)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
via llvm-commits
- [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82418)
via llvm-commits
- [llvm] [ADT] Add standalone_debug attribute to SmallVectorBase (PR #82527)
via llvm-commits
- [llvm] Document string literals in LLVM's format (PR #82529)
via llvm-commits
- [llvm] Document string literals in LLVM's format (PR #82529)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
via llvm-commits
- [llvm] [llvm][AArch64] Do not inline a function with different signing scheme. (PR #80642)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
via llvm-commits
- [llvm] [AMDGPU] Prevent hang in SIFoldOperands (PR #82099)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
via llvm-commits
- [llvm] git test (PR #82532)
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- [llvm] git test (PR #82532)
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- [llvm] git test (PR #82532)
via llvm-commits
- [compiler-rt] 99c457d - Unbreak *tf builtins for hexfloat (#82208)
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- [llvm] [llvm][AArch64] Do not inline a function with different signing scheme. (PR #80642)
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- [compiler-rt] [llvm] [Asan] Add "funclet" OpBundle to generated runtime calls if required by EH personality (PR #82533)
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- [compiler-rt] [llvm] [Asan] Add "funclet" OpBundle to generated runtime calls if required by EH personality (PR #82533)
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- [compiler-rt] [llvm] [Asan] Add "funclet" OpBundle to generated runtime calls if required by EH personality (PR #82533)
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- [compiler-rt] [llvm] [Asan] Add "funclet" OpBundle to generated runtime calls if required by EH personality (PR #82533)
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- [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)
via llvm-commits
- [flang] [llvm] [Flang][LLVM][OpenMP] Relax target data restrictions to be more inline with the specification (PR #82537)
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- [flang] [llvm] [Flang][LLVM][OpenMP] Relax target data restrictions to be more inline with the specification (PR #82537)
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- [flang] [llvm] [Flang][LLVM][OpenMP] Relax target data restrictions to be more inline with the specification (PR #82537)
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- [compiler-rt] [NFC] [scudo] Use AllocationRingBuffer* for pointer to ring buffer (PR #82538)
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- [compiler-rt] [llvm] [Asan] Add "funclet" OpBundle to generated runtime calls if required by EH personality (PR #82533)
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- [compiler-rt] [llvm] [Asan] Add "funclet" OpBundle to generated runtime calls if required by EH personality (PR #82533)
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- [llvm] [BOLT][DWARF] CHange isDWO (PR #82540)
via llvm-commits
- [compiler-rt] [scudo] Avoid splitting aligned allocations on Trusty (PR #69281)
via llvm-commits
- [compiler-rt] Do not call disable / enable on null depot (PR #82542)
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- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
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- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
via llvm-commits
- [compiler-rt] [scudo] increase frames per stack to 16 for stack depot (PR #82427)
via llvm-commits
- [compiler-rt] d17eade - Do not call disable / enable on null depot (#82542)
via llvm-commits
- [llvm] [OpenMP][FIX] Remove unsound omp_get_thread_limit deduplication (PR #79524)
via llvm-commits
- [llvm] [OpenMP][FIX] Remove unsound omp_get_thread_limit deduplication (PR #79524)
via llvm-commits
- [compiler-rt] [NFC] Make RingBuffer an atomic pointer (PR #82547)
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- [llvm] [LLVM-C] Add Bindings for eraseNamedMetadata (PR #82549)
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- [llvm] [LLVM-C] Add Bindings for eraseNamedMetadata (PR #82549)
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- [llvm] [LLVM-C] Add Bindings for eraseNamedMetadata (PR #82549)
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- [llvm] [LLVM-C] Add Bindings for eraseNamedMetadata (PR #82549)
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- [llvm] [LLVM-C] Add Bindings for eraseNamedMetadata (PR #82549)
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- [llvm] [LLVM-C] Add Bindings for eraseNamedMetadata (PR #82549)
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- [llvm] [LLVM-C] Add Bindings for eraseNamedMetadata (PR #82549)
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- [llvm] [LLVM-C] Add Bindings for eraseNamedMetadata (PR #82549)
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- [llvm] [AMDGPU] Prevent hang in SIFoldOperands (PR #82099)
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- [llvm] [AMDGPU] Prevent hang in SIFoldOperands (PR #82099)
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- [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)
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- [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)
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- [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)
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- [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)
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- [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)
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- [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)
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- [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)
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- [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)
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- [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)
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- [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)
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- [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)
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- [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)
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- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)
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- [llvm] goldsteinn/fp binop folds (PR #82555)
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- [llvm] goldsteinn/fp binop folds (PR #82555)
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- [llvm] 9ea9e93 - [MachinePipeliner] Fix elements being added while the list is iterated (#80805)
via llvm-commits
- [llvm] goldsteinn/fp binop folds (PR #82555)
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- [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)
via llvm-commits
- [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)
via llvm-commits
- [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)
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- [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)
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- [llvm] [InstCombine] Canonicalize `(uitofp x)` -> `(sitofp x)` if `x >= 0` (PR #82404)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)
via llvm-commits
- [compiler-rt] [hwasan] Add missing printf parameter in __hwasan_handle_longjmp (PR #82559)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)
via llvm-commits
- [lld] [lld/ELF] Add documentation on large sections (PR #82560)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)
via llvm-commits
- [libc] [llvm] [build] Check RUNTIMES_${target}_LLVM_ENABLE_RUNTIMES for libc also (PR #82561)
via llvm-commits
- [compiler-rt] [NFC] Make RingBuffer an atomic pointer (PR #82547)
via llvm-commits
- [compiler-rt] [NFC] Make RingBuffer an atomic pointer (PR #82547)
via llvm-commits
- [compiler-rt] [NFC] Make RingBuffer an atomic pointer (PR #82547)
via llvm-commits
- [compiler-rt] [NFC] Make RingBuffer an atomic pointer (PR #82547)
via llvm-commits
- [compiler-rt] [NFC] Make RingBuffer an atomic pointer (PR #82547)
via llvm-commits
- [compiler-rt] [NFC] Make RingBuffer an atomic pointer (PR #82547)
via llvm-commits
- [compiler-rt] [NFC] Make RingBuffer an atomic pointer (PR #82547)
via llvm-commits
- [compiler-rt] [NFC] Make RingBuffer an atomic pointer (PR #82547)
via llvm-commits
- [compiler-rt] [NFC] Make RingBuffer an atomic pointer (PR #82547)
via llvm-commits
- [llvm] [NVPTX] fixup support for unaligned parameters and returns (PR #82562)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)
via llvm-commits
- [compiler-rt] [compiler-rt][Fuchsia] Propogate raw_report to UnmapOrDieVmar (PR #82566)
via llvm-commits
- [compiler-rt] [compiler-rt][Fuchsia] Propogate raw_report to UnmapOrDieVmar (PR #82566)
via llvm-commits
- [compiler-rt] [sanitizer][fuchsia] Fix fuchsia buildbot failure after 64790064e82467b43c04a70b6e9873e6939be81f (PR #82202)
via llvm-commits
- [compiler-rt] [compiler-rt][Fuchsia] Propogate raw_report to UnmapOrDieVmar (PR #82566)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)
via llvm-commits
- [llvm] 4c0fdcd - [Hexagon] Generate absolute-set load/store instructions. (#82034)
via llvm-commits
- [llvm] d62ca8d - [Hexagon] Optimize post-increment load and stores in loops. (#82418)
via llvm-commits
- [compiler-rt] a976e3c - [compiler-rt][Fuchsia] Propogate raw_report to UnmapOrDieVmar (#82566)
via llvm-commits
- [compiler-rt] [compiler-rt][Fuchsia] Propogate raw_report to UnmapOrDieVmar (PR #82566)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)
via llvm-commits
- [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)
via llvm-commits
- [llvm] [UTC] Don't leave dangling CHECK-SAME when removing CHECK lines (PR #82569)
via llvm-commits
- [lld] [llvm] [Mips] Fix unable to handle inline assembly ends with compat-branch o… (PR #77291)
via llvm-commits
- [llvm] 05af9c8 - [TableGen] Suppress per-HwMode duplicate instructions/tables. (#82567)
via llvm-commits
- [llvm] 815644b - [RISCV] Fix mgather -> riscv.masked.strided.load combine not extending indices (#82506)
via llvm-commits
- [clang] [llvm] [CodeGen][arm64e] Add methods and data members to Address, which are needed to authenticate signed pointers (PR #67454)
via llvm-commits
- [llvm] [AMDGPU][NFC] Refactor SIInsertWaitcnts zero waitcnt generation (PR #82575)
via llvm-commits
- [llvm] [AMDGPU][NFC] Refactor SIInsertWaitcnts zero waitcnt generation (PR #82575)
via llvm-commits
- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
via llvm-commits
- [compiler-rt] db7e9e6 - [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (#81691)
via llvm-commits
- [llvm] remove expensive copy of options passed (PR #82577)
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- [llvm] remove expensive copy of options passed (PR #82577)
via llvm-commits
- [llvm] remove expensive copy of options passed (PR #82577)
via llvm-commits
- [llvm] 4d73cbe - [nfc]remove unused variable after pr/81691 (#82578)
via llvm-commits
- [llvm] revert type profiling change as it breaks compiler-rt test on non-Linux platforms (PR #82581)
via llvm-commits
- [compiler-rt] [llvm] Revert type profiling change as compiler-rt test break on Windows. (PR #82583)
via llvm-commits
- [compiler-rt] 0e8d187 - Revert type profiling change as compiler-rt test break on Windows. (#82583)
via llvm-commits
- [compiler-rt] [llvm] Revert type profiling change as compiler-rt test break on Windows. (PR #82583)
via llvm-commits
- [llvm] [X86][MC] Reject out-of-range segment and debug registers encoded with APX (PR #82584)
via llvm-commits
- [llvm] [X86][MC] Reject out-of-range segment and debug registers encoded with APX (PR #82584)
via llvm-commits
- [llvm] [LTO] Add an option to select a pre-link pipeline (PR #82585)
via llvm-commits
- [lld] [lld] check the format of libary and skip the wrong one (PR #78874)
via llvm-commits
- [llvm] [LTO] Remove Config.UseDefaultPipeline (PR #82587)
via llvm-commits
- [llvm] [llvm-debuginfo-analyzer] Add support for WebAssembly binary format. (PR #82588)
via llvm-commits
- [llvm] [llvm-debuginfo-analyzer] Add support for WebAssembly binary format. (PR #82588)
via llvm-commits
- [llvm] [RISCV] Compute integers once in isSimpleVIDSequence. NFCI (PR #82590)
via llvm-commits
- [llvm] [X86] Support APX CMOV/CFCMOV instructions (PR #82592)
via llvm-commits
- [llvm] [X86] Support APX CMOV/CFCMOV instructions (PR #82592)
via llvm-commits
- [llvm] [X86] Support APX CMOV/CFCMOV instructions (PR #82592)
via llvm-commits
- [llvm] [X86] Support APX CMOV/CFCMOV instructions (PR #82592)
via llvm-commits
- [llvm] [X86] Support APX CMOV/CFCMOV instructions (PR #82592)
via llvm-commits
- [llvm] [VPlan] Support live-ins without underlying IR in type analysis. (PR #80723)
via llvm-commits
- [llvm] [llvm-readobj,ELF] Support --decompress/-z (PR #82594)
via llvm-commits
- [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #82595)
via llvm-commits
- [llvm] 7e97ae3 - [RISCV] Teach RISCVMakeCompressible handle Zca/Zcf/Zce/Zcd. (#81844)
via llvm-commits
- [llvm] [CVP] Refactor `processMinMaxIntrinsic` to use context-sensitive information (PR #82596)
via llvm-commits
- [llvm] edd4aee - [RISCV] Compute integers once in isSimpleVIDSequence. NFCI (#82590)
via llvm-commits
- [llvm] [DAGCombiner][RISCV] CSE zext nneg and sext. (PR #82597)
via llvm-commits
- [llvm] [llvm][unittests] add NDEBUG for some unittests (PR #80821)
via llvm-commits
- [llvm] [llvm][AArch64] Do not inline a function with different signing scheme. (PR #80642)
via llvm-commits
- [llvm] [NFC] Turn the StrictFP attribute check to a CompatRule. (PR #82600)
via llvm-commits
- [llvm] [NFC] Turn the StrictFP attribute check to a CompatRule. (PR #82600)
via llvm-commits
- [lld] [llvm] [Mips] Fix unable to handle inline assembly ends with compat-branch o… (PR #77291)
via llvm-commits
- [llvm] 8bd327d - [AMDGPU][GlobalISel] Add fdiv / sqrt to rsq combine (#78673)
via llvm-commits
- [llvm] [AArch64] Fix sched model for TSV110 core. (PR #82343)
via llvm-commits
- [llvm] [InstCombine] Improve bitfield addition (PR #77184)
via llvm-commits
- [llvm] [InstCombine] Improve bitfield addition (PR #77184)
via llvm-commits
- [llvm] c5253aa - [AArch64] Restore Z-registers before P-registers (#79623) (#82492)
via llvm-commits
- [llvm] [AArch64] Restore Z-registers before P-registers (#79623) (PR #82492)
via llvm-commits
- [llvm] fddf23c - [SPIRV] Add support for the SPV_KHR_subgroup_rotate extension (#82374)
via llvm-commits
- [llvm] 6cca23a - [SPIRV] Prevent creation of jump tables from switch (#82287)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Legalize G_STORE for v4s8 vector (PR #82498)
via llvm-commits
- [llvm] bcbffd9 - [AMDGPU] Split Dpp8FI and Dpp16FI operands (#82379)
via llvm-commits
- [llvm] 6193233 - [AArch64] Fix sched model for TSV110 core. (#82343)
via llvm-commits
- [llvm] 4a602d9 - Add support for the SPV_INTEL_usm_storage_classes extension (#82247)
via llvm-commits
- [llvm] b9ce237 - [AMDGPU] Clean up conversion of DPP instructions in AMDGPUDisassembler (#82480)
via llvm-commits
- [llvm] 4f12f47 - [AArch64] Switch to soft promoting half types. (#80576)
via llvm-commits
- [llvm] [LoopIdiomRecognize] Fix #82582: Wrong debug location updates in LoopIdiomRecognize (PR #82608)
via llvm-commits
- [llvm] [LoopIdiomRecognize] Fix #82582: Wrong debug location updates in LoopIdiomRecognize (PR #82608)
via llvm-commits
- [llvm] Replace copy with a reference. (PR #82485)
via llvm-commits
- [llvm] Replace copy with a reference. (PR #82485)
via llvm-commits
- [llvm] 3b7d433 - [AMDGPU] Remove DPP DecoderNamespaces. NFC. (#82491)
via llvm-commits
- [llvm] [InferAddrSpaces] Correctly replace identical operands of insts (PR #82610)
via llvm-commits
- [llvm] f17e415 - [AArch64] Mangle names of all ARM64EC functions with entry thunks (#80996)
via llvm-commits
- [llvm] [LLVM][AArch64]Use load/store with consecutive registers in SME2 or S… (PR #77665)
via llvm-commits
- [llvm] [InferAddrSpaces] Correctly replace identical operands of insts (PR #82610)
via llvm-commits
- [llvm] 4235e44 - [GlobalISel] Constant-fold G_PTR_ADD with different type sizes (#81473)
via llvm-commits
- [llvm] build_llvm_release.bat: add tarball export to x64 release (PR #79840)
via llvm-commits
- [llvm] [ARM][AArch64] Enable FEAT_FHM, disable FEAT_MEC for Arm Neoverse N2 (PR #82613)
via llvm-commits
- [llvm] [ARM][AArch64] Enable FEAT_FHM, disable FEAT_MEC for Arm Neoverse N2 (PR #82613)
via llvm-commits
- [llvm] 3ef63a7 - [CVP] Refactor `processMinMaxIntrinsic` to check non-strict predicate in both directions (#82596)
via llvm-commits
- [llvm] c831d83 - [InferAddrSpaces] Correctly replace identical operands of insts (#82610)
via llvm-commits
- [llvm] [CodeGen] Support MachineFunctionProperties in PassConcept (PR #79749)
via llvm-commits
- [llvm] [CodeGen] Support MachineFunctionProperties in PassConcept (PR #79749)
via llvm-commits
- [llvm] 770fd38 - [LangRef] Document string literals in LLVM's format (#82529)
via llvm-commits
- [llvm] [LangRef] Document string literals in LLVM's format (PR #82529)
via llvm-commits
- [llvm] [ARM][GlobalISel] Remove legacy legalizer rules (PR #82619)
via llvm-commits
- [llvm] 5b8e560 - [AIX] Lower intrinsic __builtin_cpu_is into AIX platform-specific code. (#80069)
via llvm-commits
- [llvm] Min and Max are associative (PR #82621)
via llvm-commits
- [llvm] Min and Max are associative (PR #82621)
via llvm-commits
- [llvm] Min and Max are associative (PR #82621)
via llvm-commits
- [llvm] Min and Max are associative (PR #82621)
via llvm-commits
- [llvm] Min and Max are associative (PR #82621)
via llvm-commits
- [llvm] cbb24e1 - [LLVM][IR] Add native vector support to ConstantInt & ConstantFP. (#74502)
via llvm-commits
- [llvm] 88e31f6 - [OpenMP][FIX] Remove unsound omp_get_thread_limit deduplication (#79524)
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- [llvm] goldsteinn/kb both sides (PR #82818)
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- [llvm] goldsteinn/kb both sides (PR #82818)
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- [llvm] goldsteinn/kb both sides (PR #82818)
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- [llvm] [ValueTracking] Compute knownbits for `(and/or cond0, cond1)` on both sides of branch (PR #82818)
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- [llvm] [ValueTracking] Compute knownbits for `(and/or cond0, cond1)` on both sides of branch (PR #82818)
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- [llvm] [SelectionDAG] Support sign tracking trough `{S|U}INT_TO_FP` (PR #82808)
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- [llvm] [ValueTracking] Compute knownbits for `(and/or cond0, cond1)` on both sides of branch (PR #82818)
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- [llvm] [ValueTracking] Compute knownbits for `(and/or cond0, cond1)` on both sides of branch (PR #82818)
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- [llvm] [llvm-ar] Use COFF archive format for COFF targets. (PR #82642)
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- [llvm] [SPIRV] Add vector reduction instructions (PR #82786)
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- [llvm] [mlir] [OpenMP][MLIR][OMPIRBuilder] Add a small optional constant alloca raise function pass to finalize, utilised in convertTarget (PR #78818)
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- [llvm] [mlir] [OpenMP][MLIR][OMPIRBuilder] Add a small optional constant alloca raise function pass to finalize, utilised in convertTarget (PR #78818)
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- [llvm] [mlir] [OpenMP][MLIR][OMPIRBuilder] Add a small optional constant alloca raise function pass to finalize, utilised in convertTarget (PR #78818)
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- [llvm] [ValueTracking] Compute knownbits for `(and/or cond0, cond1)` on both sides of branch (PR #82818)
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- [clang] [clang-tools-extra] [compiler-rt] [flang] [libclc] [libcxx] [lld] [lldb] [llvm] [NFC] Remove trailing whitespace across all non-test related files (PR #82838)
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- [clang] [clang-tools-extra] [compiler-rt] [flang] [libclc] [libcxx] [lld] [lldb] [llvm] [NFC] Remove trailing whitespace across all non-test related files (PR #82838)
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- [clang] [clang-tools-extra] [compiler-rt] [flang] [libclc] [libcxx] [lld] [lldb] [llvm] [NFC] Remove trailing whitespace across all non-test related files (PR #82838)
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- [clang] [clang-tools-extra] [compiler-rt] [flang] [libclc] [libcxx] [lld] [lldb] [llvm] [NFC] Remove trailing whitespace across all non-test related files (PR #82838)
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- [llvm] [CodeGen] Resolve FIXME: Find the same unit free in each cycle instead of one in each cycle (PR #82732)
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- [clang] [clang-tools-extra] [compiler-rt] [flang] [libclc] [libcxx] [lld] [lldb] [llvm] [NFC] Remove trailing whitespace across all non-test related files (PR #82838)
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- [llvm] [llvm][loop-rotate] Allow forcing loop-rotation (PR #82828)
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- [llvm] [llvm][loop-rotate] Allow forcing loop-rotation (PR #82828)
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- [llvm] [AMDGPU] Remove `hasAtomicFaddRtnForTy` as it is not used anywhere (PR #82841)
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- [llvm] 775bd60 - [RISCV] Add scheduling info for Zcmp (#82719)
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- [llvm] [workflows] Delete user branches that are too long (PR #82845)
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- [llvm] [SelectionDAG] Remove unused getIndexedStridedLoadVP/getIndexedStridedStoreVP functions. NFC (PR #82847)
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- [llvm] 10c48a7 - [llvm-shlib] Change libLLVM-$MAJOR.so symlink to point to versioned SO (#82660)
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- [llvm] de3b2c2 - [clang][ScanDeps] Allow PCHs to have different VFS overlays (#82294)
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- [llvm] bfcf7a0 - [AMDGPU] Remove `hasAtomicFaddRtnForTy` as it is not used anywhere (#82841)
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- [llvm] [Transforms] Remove m_OneUse requirement only for max, not min (PR #81505)
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- [llvm] <Fix> A replaced SDValue is used to call getNode function (PR #82876)
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- [llvm] <Fix> A replaced SDValue is used to call getNode function (PR #82876)
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- [llvm] 00c0638 - [AArch64] Intrinsics aarch64_{get, set}_fpsr (#81867)
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- [llvm] 1901f44 - [InstCombine] Handle more even/odd math functions (#81324)
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- [llvm] <Fix> A replaced SDValue is used to call getNode function (PR #82876)
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- [llvm] <Fix> incorrect IndexReg parameter (PR #82881)
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- [llvm] <Fix> incorrect IndexReg parameter (PR #82881)
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- [llvm] <Fix> incorrect IndexReg parameter (PR #82881)
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- [llvm] <Fix> incorrect IndexReg parameter (PR #82881)
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- [llvm] [Fix] incorrect IndexReg parameter (PR #82881)
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- [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)
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- [llvm] [Sparc] Use generated MatchRegisterName (NFCI) (PR #82165)
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- [llvm] cf9201c - [llvm-ar] Use COFF archive format for COFF targets. (#82642)
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- [llvm] 8a5aa10 - Revert "[llvm-ar] Use COFF archive format for COFF targets." (#82889)
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- [llvm] Revert "[llvm-ar] Use COFF archive format for COFF targets." (PR #82889)
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- [lld] [lld][WebAssembly] Add `--max-memory-growth` (PR #82890)
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- [lld] [lld][WebAssembly] Add `--max-memory-growth` (PR #82890)
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- [lld] [lld][WebAssembly] Add `--max-memory-growth` (PR #82890)
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- [lld] [lld][WebAssembly] Add `--max-memory-growth` (PR #82890)
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- [lld] [lld][WebAssembly] Add `--max-memory-growth` (PR #82890)
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- [lld] [lld][WebAssembly] Add `--max-memory-growth` (PR #82890)
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- [lld] [lld][WebAssembly] Add `--max-memory-growth` (PR #82890)
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- [lld] [lld][WebAssembly] Add `--max-memory-growth` (PR #82890)
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- [llvm] [InstCombineCompares] Try to "strengthen" compares based on known bits. (PR #79405)
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- [llvm] [llvm][SimplifyLibCalls] Add option 'AllowMemcmpToBcmpTransform' (PR #82304)
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- [llvm] [DAG] select m, sub/add(X, C), X --> sub/add (X, and(C, m)) (PR #82441)
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- [llvm] [DAG] select m, sub/add(X, C), X --> sub/add (X, and(C, m)) (PR #82441)
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- [llvm] [DAG] select m, sub/add(X, C), X --> sub/add (X, and(C, m)) (PR #82441)
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- [llvm] Revert "[AArch64] Intrinsics aarch64_{get, set}_fpsr" (PR #82894)
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- [lld] [lld][WebAssembly] Add `--max-memory-growth` (PR #82890)
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- [lld] [lld][WebAssembly] Add `--no-growable-memory` (PR #82890)
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- [lld] [lld][WebAssembly] Add `--no-growable-memory` (PR #82890)
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- [lld] [lld][WebAssembly] Add `--no-growable-memory` (PR #82890)
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- [lld] [lld][WebAssembly] Add `--no-growable-memory` (PR #82890)
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- [lld] [lld][WebAssembly] Add `--no-growable-memory` (PR #82890)
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- [lld] [lld][WebAssembly] Add `--no-growable-memory` (PR #82890)
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- [llvm] [llvm-ar][Object] Use K_GNU instead of K_COFF for archives with no symtab. (PR #82898)
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- [llvm] [CMake][LIT] Add option to run lit testsuites in parallel (PR #82899)
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- [llvm] Verifier: More helpful error message for cross-function references (PR #82906)
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- [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)
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- [llvm] [AArch64] Add FPSR to reserved registers (PR #82907)
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- [llvm] a4096ea - [AArch64] Add FPSR to reserved registers (#82907)
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- [compiler-rt] a8c3b3e - [nfc][compiler-rt]Replace Type::getInt8PtrTy with PointerType::getUnqual as a clean-up (#82434)
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- [llvm] [InstCombine] Improve bitfield addition (PR #77184)
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- [llvm] [TableGen] Fix __CLAUSE_NO_CLASS macro leak in directive emitter (PR #82912)
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- [llvm] [InstCombine] Improve bitfield addition (PR #77184)
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- [llvm] [InstCombine] Improve bitfield addition (PR #77184)
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- [lld] [lld][WebAssembly] Add `--no-growable-memory` (PR #82890)
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- [llvm] [DAG] Fix Failure to reassociate SMAX/SMIN/UMAX/UMIN (PR #82175)
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- [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)
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- [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)
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- [llvm] [JITLink][AArch64] Implement R_AARCH64_LDR_PREL_LO19 (PR #82172)
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- [llvm] 4bf06c1 - Initialize unsigned integer when declared (#81894)
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- [llvm] fe42e72 - [CodeGen] Port AtomicExpand to new Pass Manager (#71220)
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- [llvm] f920b74 - [FlattenCFG] Fix the miscompilation where phi nodes exist in the merge point (#81987)
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- [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)
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- [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)
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- [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)
via llvm-commits
- [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)
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- [llvm] 8eb6757 - [NFC] Turn the StrictFP attribute check to a CompatRule. (#82600)
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- [llvm] [NFC] Turn the StrictFP attribute check to a CompatRule. (PR #82600)
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- [llvm] [RISCV] Place mergeable small read only data into srodata section (PR #82214)
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- [llvm] 2c5a688 - Fix non-splat vector SREM expansion when one of the divisors is a power of two. (#82706)
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- [llvm] d6ded91 - [Codegen] Change getSpillSize/getReloadSize to LocationSize. NFC (#82636)
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- [lld] cb4f94d - [lld][WebAssembly] Add `--no-growable-memory` (#82890)
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- [llvm] [SelectionDAG] Support sign tracking trough `{S|U}INT_TO_FP` (PR #82808)
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Archived on: Sun Feb 25 23:56:07 PST 2024
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