[llvm] [Mips] mips1 DivByZeroTrap (PR #81311)

[YunQiang Su via llvm-commits]

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@@ -206,12 +234,30 @@ entry:
 }
 
 define signext i32 @sdiv_i32(i32 signext %a, i32 signext %b) {
-; GP32-LABEL: sdiv_i32:
-; GP32:       # %bb.0: # %entry
-; GP32-NEXT:    div $zero, $4, $5
-; GP32-NEXT:    teq $5, $zero, 7
-; GP32-NEXT:    jr $ra
-; GP32-NEXT:    mflo $2
+; GP32R0R1-LABEL: sdiv_i32:
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wzssyqa wrote:

Note, MIPS32R1 is not same as MIPS I.
The road map of MIPS Rev is like

32bit   I  II                     32R1
64bit          III IV V.       64R1

This name scheme is quite confusion.


https://github.com/llvm/llvm-project/pull/81311