[llvm] [WIP][AMDGPU] Split `isInlinableLiteral16` into three and call the specific version if possible (PR #81345)

[Shilei Tian via llvm-commits]

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@@ -99,39 +99,39 @@ define i32 @inline_A_constraint_H1() {
 ; VI-LABEL: {{^}}inline_A_constraint_H2:
 ; VI: v_mov_b32 {{v[0-9]+}}, 0x3c00
 define i32 @inline_A_constraint_H2() {
-  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 bitcast (half 1.0 to i16))
+  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(trunc i32 bitcast (float 1.0 to i32) to i16)
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shiltian wrote:

Yes, I think the inline literal only makes sense when it is along with corresponding type. The underlying issue within this test case (as well as the implementation of checking 16-bit inline literal) is, it tries to recognize some special combination of bits such that as long as it is, say `0x3C00` and it is 16-bit operand, we take it as inline literal ` half 1.0`. This is problematic.

One of the goal of this patch is to do this right: check the inline literal with corresponding type, instead of just checking whether this 16-bit thing is an inline literal or not.

https://github.com/llvm/llvm-project/pull/81345