[llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)

[Yeting Kuo via llvm-commits]

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@@ -5690,6 +5691,9 @@ static unsigned getRISCVVLOp(SDValue Op) {
   switch (Op.getOpcode()) {
   default:
     llvm_unreachable("don't have RISC-V specified VL op for this SDNode");
+  case ISD::VP_LRINT:
+  case ISD::VP_LLRINT:
+    return RISCVISD::VFCVT_X_F_VL;
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yetingk wrote:

Done.

https://github.com/llvm/llvm-project/pull/82627