[llvm] 7b9504f - test: Refine InstrProfiling/mcdc.ll

[NAKAMURA Takumi via llvm-commits]

Author: NAKAMURA Takumi
Date: 2024-02-25T11:21:46+09:00
New Revision: 7b9504fc012e8b96c2bca9d641e16f719696d723

URL: https://github.com/llvm/llvm-project/commit/7b9504fc012e8b96c2bca9d641e16f719696d723
DIFF: https://github.com/llvm/llvm-project/commit/7b9504fc012e8b96c2bca9d641e16f719696d723.diff

LOG: test: Refine InstrProfiling/mcdc.ll

Added: 
    

Modified: 
    llvm/test/Instrumentation/InstrProfiling/mcdc.ll

Removed: 
    


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diff  --git a/llvm/test/Instrumentation/InstrProfiling/mcdc.ll b/llvm/test/Instrumentation/InstrProfiling/mcdc.ll
index fccb026c25bf26..f61f6ca136ce77 100644
--- a/llvm/test/Instrumentation/InstrProfiling/mcdc.ll
+++ b/llvm/test/Instrumentation/InstrProfiling/mcdc.ll
@@ -23,24 +23,24 @@ entry:
   %tobool = icmp ne i32 %0, 0
 
   call void @llvm.instrprof.mcdc.condbitmap.update(ptr @__profn_test, i64 99278, i32 0, ptr %mcdc.addr, i1 %tobool)
-  ; CHECK:      %mcdc.temp = load i32, ptr %mcdc.addr, align 4
-  ; CHECK-NEXT: %1 = zext i1 %tobool to i32
-  ; CHECK-NEXT: %2 = shl i32 %1, 0
-  ; CHECK-NEXT: %3 = or i32 %mcdc.temp, %2
-  ; CHECK-NEXT: store i32 %3, ptr %mcdc.addr, align 4
+  ; CHECK:      %[[TEMP:mcdc.*]] = load i32, ptr %mcdc.addr, align 4
+  ; CHECK-NEXT: %[[LAB1:[0-9]+]] = zext i1 %tobool to i32
+  ; CHECK-NEXT: %[[LAB2:[0-9]+]] = shl i32 %[[LAB1]], 0
+  ; CHECK-NEXT: %[[LAB3:[0-9]+]] = or i32 %[[TEMP]], %[[LAB2]]
+  ; CHECK-NEXT: store i32 %[[LAB3]], ptr %mcdc.addr, align 4
 
   call void @llvm.instrprof.mcdc.tvbitmap.update(ptr @__profn_test, i64 99278, i32 1, i32 0, ptr %mcdc.addr)
-  ; CHECK:       %mcdc.temp1 = load i32, ptr %mcdc.addr, align 4
-  ; CHECK-NEXT: %4 = lshr i32 %mcdc.temp1, 3
-  ; CHECK-NEXT: %5 = zext i32 %4 to i64
-  ; CHECK-NEXT: %6 = add i64 ptrtoint (ptr @__profbm_test to i64), %5
-  ; CHECK-NEXT: %7 = inttoptr i64 %6 to ptr
-  ; CHECK-NEXT: %8 = and i32 %mcdc.temp1, 7
-  ; CHECK-NEXT: %9 = trunc i32 %8 to i8
-  ; CHECK-NEXT: %10 = shl i8 1, %9
-  ; CHECK-NEXT: %mcdc.bits = load i8, ptr %7, align 1
-  ; CHECK-NEXT: %11 = or i8 %mcdc.bits, %10
-  ; CHECK-NEXT: store i8 %11, ptr %7, align 1
+  ; CHECK:      %[[TEMP:mcdc.*]] = load i32, ptr %mcdc.addr, align 4
+  ; CHECK-NEXT: %[[LAB4:[0-9]+]] = lshr i32 %[[TEMP]], 3
+  ; CHECK-NEXT: %[[LAB5:[0-9]+]] = zext i32 %[[LAB4]] to i64
+  ; CHECK-NEXT: %[[LAB6:[0-9]+]] = add i64 ptrtoint (ptr @__profbm_test to i64), %[[LAB5]]
+  ; CHECK-NEXT: %[[LAB7:[0-9]+]] = inttoptr i64 %[[LAB6]] to ptr
+  ; CHECK-NEXT: %[[LAB8:[0-9]+]] = and i32 %[[TEMP]], 7
+  ; CHECK-NEXT: %[[LAB9:[0-9]+]] = trunc i32 %[[LAB8]] to i8
+  ; CHECK-NEXT: %[[LAB10:[0-9]+]] = shl i8 1, %[[LAB9]]
+  ; CHECK-NEXT: %[[BITS:mcdc.*]] = load i8, ptr %[[LAB7]], align 1
+  ; CHECK-NEXT: %[[LAB11:[0-9]+]] = or i8 %[[BITS]], %[[LAB10]]
+  ; CHECK-NEXT: store i8 %[[LAB11]], ptr %[[LAB7]], align 1
   ret void
 }