[llvm] 6f9b0a7 - [ValueTracking] Compute knownbits for `(and/or cond0, cond1)` on both sides of branch

Noah Goldstein via llvm-commits llvm-commits at lists.llvm.org
Sun Feb 25 10:44:39 PST 2024


Author: Noah Goldstein
Date: 2024-02-25T12:44:23-06:00
New Revision: 6f9b0a7095cbb7781e1f387f99d5725c950ce79b

URL: https://github.com/llvm/llvm-project/commit/6f9b0a7095cbb7781e1f387f99d5725c950ce79b
DIFF: https://github.com/llvm/llvm-project/commit/6f9b0a7095cbb7781e1f387f99d5725c950ce79b.diff

LOG: [ValueTracking] Compute knownbits for `(and/or cond0, cond1)` on both sides of branch

The false branch for `and` and true branch for `or` provide less
information (intersection as opposed to union), but still can give
some useful information.

Closes #82818

Added: 
    

Modified: 
    llvm/lib/Analysis/DomConditionCache.cpp
    llvm/lib/Analysis/ValueTracking.cpp
    llvm/test/Transforms/InstCombine/known-bits.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Analysis/DomConditionCache.cpp b/llvm/lib/Analysis/DomConditionCache.cpp
index 274f3ff44b2a6f..da05e02b4b57f7 100644
--- a/llvm/lib/Analysis/DomConditionCache.cpp
+++ b/llvm/lib/Analysis/DomConditionCache.cpp
@@ -34,7 +34,6 @@ static void findAffectedValues(Value *Cond,
     }
   };
 
-  bool TopLevelIsAnd = match(Cond, m_LogicalAnd());
   SmallVector<Value *, 8> Worklist;
   SmallPtrSet<Value *, 8> Visited;
   Worklist.push_back(Cond);
@@ -45,9 +44,7 @@ static void findAffectedValues(Value *Cond,
 
     CmpInst::Predicate Pred;
     Value *A, *B;
-    // Only recurse into and/or if it matches the top-level and/or type.
-    if (TopLevelIsAnd ? match(V, m_LogicalAnd(m_Value(A), m_Value(B)))
-                      : match(V, m_LogicalOr(m_Value(A), m_Value(B)))) {
+    if (match(V, m_LogicalOp(m_Value(A), m_Value(B)))) {
       Worklist.push_back(A);
       Worklist.push_back(B);
     } else if (match(V, m_ICmp(Pred, m_Value(A), m_Constant()))) {

diff  --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index de105dfe53ab28..e591ac504e9f05 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -711,10 +711,17 @@ static void computeKnownBitsFromCond(const Value *V, Value *Cond,
                                      const SimplifyQuery &SQ, bool Invert) {
   Value *A, *B;
   if (Depth < MaxAnalysisRecursionDepth &&
-      (Invert ? match(Cond, m_LogicalOr(m_Value(A), m_Value(B)))
-              : match(Cond, m_LogicalAnd(m_Value(A), m_Value(B))))) {
-    computeKnownBitsFromCond(V, A, Known, Depth + 1, SQ, Invert);
-    computeKnownBitsFromCond(V, B, Known, Depth + 1, SQ, Invert);
+      match(Cond, m_LogicalOp(m_Value(A), m_Value(B)))) {
+    KnownBits Known2(Known.getBitWidth());
+    KnownBits Known3(Known.getBitWidth());
+    computeKnownBitsFromCond(V, A, Known2, Depth + 1, SQ, Invert);
+    computeKnownBitsFromCond(V, B, Known3, Depth + 1, SQ, Invert);
+    if (Invert ? match(Cond, m_LogicalOr(m_Value(), m_Value()))
+               : match(Cond, m_LogicalAnd(m_Value(), m_Value())))
+      Known2 = Known2.unionWith(Known3);
+    else
+      Known2 = Known2.intersectWith(Known3);
+    Known = Known.unionWith(Known2);
   }
 
   if (auto *Cmp = dyn_cast<ICmpInst>(Cond))

diff  --git a/llvm/test/Transforms/InstCombine/known-bits.ll b/llvm/test/Transforms/InstCombine/known-bits.ll
index 2e39f7f7d627a8..b658ee0d2ef4e2 100644
--- a/llvm/test/Transforms/InstCombine/known-bits.ll
+++ b/llvm/test/Transforms/InstCombine/known-bits.ll
@@ -136,8 +136,7 @@ define i8 @test_cond_and_bothways(i8 %x) {
 ; CHECK-NEXT:    [[OR1:%.*]] = or i8 [[X]], -4
 ; CHECK-NEXT:    ret i8 [[OR1]]
 ; CHECK:       exit:
-; CHECK-NEXT:    [[OR2:%.*]] = or i8 [[X]], -4
-; CHECK-NEXT:    ret i8 [[OR2]]
+; CHECK-NEXT:    ret i8 -4
 ;
   %and = and i8 %x, 91
   %cmp0 = icmp ne i8 %and, 24
@@ -162,8 +161,7 @@ define i8 @test_cond_or_bothways(i8 %x) {
 ; CHECK-NEXT:    [[COND:%.*]] = or i1 [[CMP0]], [[CMP1]]
 ; CHECK-NEXT:    br i1 [[COND]], label [[IF:%.*]], label [[EXIT:%.*]]
 ; CHECK:       if:
-; CHECK-NEXT:    [[OR1:%.*]] = or i8 [[X]], -4
-; CHECK-NEXT:    ret i8 [[OR1]]
+; CHECK-NEXT:    ret i8 -4
 ; CHECK:       exit:
 ; CHECK-NEXT:    [[OR2:%.*]] = or i8 [[X]], -4
 ; CHECK-NEXT:    ret i8 [[OR2]]


        


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