[llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)

[Craig Topper via llvm-commits]

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@@ -445,12 +445,12 @@ def ST5 : X86Reg<"st(5)", 5>, DwarfRegNum<[38, 17, 16]>;
 def ST6 : X86Reg<"st(6)", 6>, DwarfRegNum<[39, 18, 17]>;
 def ST7 : X86Reg<"st(7)", 7>, DwarfRegNum<[40, 19, 18]>;
 
-// Floating-point status word
-def FPSW : X86Reg<"fpsr", 0>;
-
 // Floating-point control word
 def FPCW : X86Reg<"fpcr", 0>;
 
+// Floating-point status word
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topperc wrote:

Why is this order changed?

https://github.com/llvm/llvm-project/pull/82452