[llvm] [CodeGenSchedule] Don't allow invalid ReadAdvances to be formed (PR #82685)

[Visoiu Mistrih Francis via llvm-commits]

francisvm wrote:

Mostly trying to get thoughts on this first, since current models fail the check today:

```
AArch64SchedExynosM4.td:497:5: error: ReadAdvance referencing a ValidWrite that is not used by any instruction (M4WriteFMAC5)
```

Does it make sense to make this an error? Should it be a warning? Should we make the emitter to silently skip the `SchedWrite` in the list but still apply the `ReadAdvance` to the rest of the `ValidWrites`?

https://github.com/llvm/llvm-project/pull/82685