[llvm] Add vector reduction instructions (PR #82786)

[via llvm-commits]

github-actions[bot] wrote:

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git-clang-format --diff f01719afaae9a208ac272d99760d18e4c16d9241 df1312ce79e3b44bb76f628fb55a05ca522c7032 -- llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp llvm/lib/Target/SPIRV/SPIRV.h llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
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diff --git a/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp b/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
index b6fd4fd2d8..c3f75463df 100644
--- a/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
@@ -113,12 +113,10 @@ SPIRVLegalizerInfo::SPIRVLegalizerInfo(const SPIRVSubtarget &ST) {
       v3s32, v3s64, v4s1,  v4s8,  v4s16,  v4s32,  v4s64, v8s1, v8s8, v8s16,
       v8s32, v8s64, v16s1, v16s8, v16s16, v16s32, v16s64};
 
-  auto allVectors = {
-       v2s1,  v2s8,  v2s16,  v2s32,  v2s64,
-       v3s1,  v3s8,  v3s16,  v3s32,  v3s64,
-       v4s1,  v4s8,  v4s16,  v4s32,  v4s64,
-       v8s1,  v8s8,  v8s16,  v8s32,  v8s64,
-      v16s1, v16s8, v16s16, v16s32, v16s64};
+  auto allVectors = {v2s1,  v2s8,   v2s16,  v2s32, v2s64, v3s1,  v3s8,
+                     v3s16, v3s32,  v3s64,  v4s1,  v4s8,  v4s16, v4s32,
+                     v4s64, v8s1,   v8s8,   v8s16, v8s32, v8s64, v16s1,
+                     v16s8, v16s16, v16s32, v16s64};
 
   auto allScalarsAndVectors = {
       s1,   s8,   s16,   s32,   s64,   v2s1,  v2s8,  v2s16,  v2s32,  v2s64,

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https://github.com/llvm/llvm-project/pull/82786