[llvm] a4096ea - [AArch64] Add FPSR to reserved registers (#82907)

[via llvm-commits]

Author: Serge Pavlov
Date: 2024-02-25T13:16:09+07:00
New Revision: a4096eaeb63e7086a2e0a32bd69523c1fa72db3e

URL: https://github.com/llvm/llvm-project/commit/a4096eaeb63e7086a2e0a32bd69523c1fa72db3e
DIFF: https://github.com/llvm/llvm-project/commit/a4096eaeb63e7086a2e0a32bd69523c1fa72db3e.diff

LOG: [AArch64] Add FPSR to reserved registers (#82907)

This is follow-up of #81867. FPSR was not added to reserved registers,
this resulted in machine verifier fails.

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
index 48e1c1bc73022c..b919c116445c8b 100644
--- a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
@@ -450,6 +450,7 @@ AArch64RegisterInfo::getStrictlyReservedRegs(const MachineFunction &MF) const {
   }
 
   markSuperRegs(Reserved, AArch64::FPCR);
+  markSuperRegs(Reserved, AArch64::FPSR);
 
   if (MF.getFunction().getCallingConv() == CallingConv::GRAAL) {
     markSuperRegs(Reserved, AArch64::X27);