[llvm] [AArch64][GlobalISel] Legalize Insert vector element (PR #81453)

[Amara Emerson via llvm-commits]

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@@ -2121,6 +2120,31 @@ bool AArch64InstructionSelector::preISelLower(MachineInstr &I) {
     }
     return false;
   }
+  case TargetOpcode::G_INSERT_VECTOR_ELT: {
+    Register InsReg = I.getOperand(2).getReg();
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aemerson wrote:

Please add a comment documenting what this is trying to do and why.

https://github.com/llvm/llvm-project/pull/81453