[llvm] Add ARM:r12 and ARM:LR as scratch regs for ARM (PR #82454)

via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 20 18:13:32 PST 2024


https://github.com/AtariDreams updated https://github.com/llvm/llvm-project/pull/82454

>From b0cc14b4954fea6cf2a1bef8d5dcfcf3c2e282c4 Mon Sep 17 00:00:00 2001
From: Rose <83477269+AtariDreams at users.noreply.github.com>
Date: Tue, 20 Feb 2024 21:10:39 -0500
Subject: [PATCH] Add ARM:r12 and ARM:LR as scratch regs for ARM

r12 is the intra-procedural scratch register and lr is clobbered across every call.
---
 llvm/lib/Target/ARM/ARMISelLowering.cpp | 8 ++++++++
 llvm/lib/Target/ARM/ARMISelLowering.h   | 2 ++
 2 files changed, 10 insertions(+)

diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index b98006ed0cb3f4..7d265e1ab4e522 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -13789,6 +13789,14 @@ static SDValue PerformADDVecReduce(SDNode *N, SelectionDAG &DAG,
   return SDValue();
 }
 
+const MCPhysReg *getScratchRegisters(CallingConv::ID) {
+  // LR is a not a scratch register, but we must treat it as clobbered by any
+  // call site. Hence we include LR in the scratch registers, which are in turn
+  // added as implicit-defs for stackmaps and patchpoints.
+  static const MCPhysReg ScratchRegs[] = {ARM::R12, ARM::LR, 0};
+  return ScratchRegs;
+}
+
 bool
 ARMTargetLowering::isDesirableToCommuteWithShift(const SDNode *N,
                                                  CombineLevel Level) const {
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.h b/llvm/lib/Target/ARM/ARMISelLowering.h
index b13ddf697cb806..bca55b5c95a235 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.h
+++ b/llvm/lib/Target/ARM/ARMISelLowering.h
@@ -738,6 +738,8 @@ class VectorType;
     Align getABIAlignmentForCallingConv(Type *ArgTy,
                                         const DataLayout &DL) const override;
 
+    const MCPhysReg *getScratchRegisters(CallingConv::ID CC) const override;
+
     bool isDesirableToCommuteWithShift(const SDNode *N,
                                        CombineLevel Level) const override;
 



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