[llvm] [RISCV] Use TImmLeaf for csr_sysreg (PR #82463)

[Craig Topper via llvm-commits]

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@@ -127,7 +127,8 @@ enum NodeType : unsigned {
   FMAX, FMIN,
 
   // A read of the 64-bit counter CSR on a 32-bit target (returns (Lo, Hi)).
-  // It takes a chain operand.
+  // It takes a chain operand and another two target constant operands (the
+  // low and high parts of the counter).
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topperc wrote:

"the CSR numbers of the low and high parts of the counter"

https://github.com/llvm/llvm-project/pull/82463