[llvm] 39cab1a - [AMDGPU] Add v2bf16 for opsel immediate folding (#82435)

via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 20 14:55:48 PST 2024


Author: Stanislav Mekhanoshin
Date: 2024-02-20T14:55:44-08:00
New Revision: 39cab1a0a0d68cb33142099c320674fa54e11a91

URL: https://github.com/llvm/llvm-project/commit/39cab1a0a0d68cb33142099c320674fa54e11a91
DIFF: https://github.com/llvm/llvm-project/commit/39cab1a0a0d68cb33142099c320674fa54e11a91.diff

LOG: [AMDGPU] Add v2bf16 for opsel immediate folding (#82435)

This was previously enabled since v2bf16 was represented by v2f16. As of
now it is NFC since we only have dot instructions which could use it,
but currently folding is guarded by the hasDOTOpSelHazard().

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIFoldOperands.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
index 8bf05682cbe7ea..d16d8ebd41a54f 100644
--- a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
@@ -219,8 +219,10 @@ bool SIFoldOperands::canUseImmWithOpSel(FoldCandidate &Fold) const {
   default:
     return false;
   case AMDGPU::OPERAND_REG_IMM_V2FP16:
+  case AMDGPU::OPERAND_REG_IMM_V2BF16:
   case AMDGPU::OPERAND_REG_IMM_V2INT16:
   case AMDGPU::OPERAND_REG_INLINE_C_V2FP16:
+  case AMDGPU::OPERAND_REG_INLINE_C_V2BF16:
   case AMDGPU::OPERAND_REG_INLINE_C_V2INT16:
     break;
   }


        


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