[llvm] [RISCV] Fix mgather -> riscv.masked.strided.load combine not extending indices (PR #82506)

Wang Pengcheng via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 21 20:02:32 PST 2024


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@@ -3261,14 +3262,14 @@ static std::optional<VIDSequence> isSimpleVIDSequence(SDValue Op) {
       if (!isa<ConstantSDNode>(Op.getOperand(Idx)))
         return std::nullopt;
       Val = Op.getConstantOperandVal(Idx) &
-            maskTrailingOnes<uint64_t>(EltSizeInBits);
+            maskTrailingOnes<uint64_t>(Op.getScalarValueSizeInBits());
----------------
wangpc-pp wrote:

Make `Op.getScalarValueSizeInBits()` a variable? It has a lot of usages.

https://github.com/llvm/llvm-project/pull/82506


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