[llvm] [AMDGPU] Prevent cyclic behaviour in SIFoldOperands (PR #82099)

[via llvm-commits]

choikwa wrote:

You are right, I think I was incorrectly explaining the behaviour:
The first entry point was from this:
  %35:sreg_64 = REG_SEQUENCE killed %34:sreg_32, %subreg.sub0, %33:sreg_32, %subreg.sub1

And the subsequent UseMI is just RSUseMI and does not go into the isRegSequence() path. However, the cycle still exists with RSUseMI flipflopping between %77 and %49.

https://github.com/llvm/llvm-project/pull/82099