[llvm] [Mips] mips1 DivByZeroTrap (PR #81311)
YunQiang Su via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 21 16:08:25 PST 2024
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@@ -206,12 +234,30 @@ entry:
}
define signext i32 @sdiv_i32(i32 signext %a, i32 signext %b) {
-; GP32-LABEL: sdiv_i32:
-; GP32: # %bb.0: # %entry
-; GP32-NEXT: div $zero, $4, $5
-; GP32-NEXT: teq $5, $zero, 7
-; GP32-NEXT: jr $ra
-; GP32-NEXT: mflo $2
+; GP32R0R1-LABEL: sdiv_i32:
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wzssyqa wrote:
Since MIPS I is not supported well yet for LLVM, and I guess the 32R0 was supposed to be equal with MIPS II in this context.
If we need MIPS I, we may use a new name for it, maybe 32_I?
https://github.com/llvm/llvm-project/pull/81311
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