[llvm] [Mips] Fix missing sign extension in expansion of sub-word atomic max (PR #77072)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 21 03:03:26 PST 2024
https://github.com/yingopq updated https://github.com/llvm/llvm-project/pull/77072
>From c8b484f20954de6a400eb47e0e8b1f62d5809034 Mon Sep 17 00:00:00 2001
From: Ying Huang <ying.huang at oss.cipunited.com>
Date: Fri, 5 Jan 2024 18:05:25 +0800
Subject: [PATCH] [Mips] Fix missing sign extension in expansion of sub-word
atomic max
Add sign extension "SEB/SEH" before compare.
Fix #61881
---
llvm/lib/Target/Mips/MipsExpandPseudo.cpp | 46 +-
llvm/test/CodeGen/Mips/atomic-min-max.ll | 575 +++++++++++++++++++++-
2 files changed, 594 insertions(+), 27 deletions(-)
diff --git a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
index 2c2554b5b4bc3b..510b2f1a18c9dc 100644
--- a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
+++ b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
@@ -388,18 +388,32 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
Opcode = Mips::XOR;
break;
case Mips::ATOMIC_LOAD_UMIN_I8_POSTRA:
+ IsUnsigned = true;
+ IsMin = true;
+ break;
case Mips::ATOMIC_LOAD_UMIN_I16_POSTRA:
IsUnsigned = true;
- [[fallthrough]];
+ IsMin = true;
+ break;
case Mips::ATOMIC_LOAD_MIN_I8_POSTRA:
+ SEOp = Mips::SEB;
+ IsMin = true;
+ break;
case Mips::ATOMIC_LOAD_MIN_I16_POSTRA:
IsMin = true;
break;
case Mips::ATOMIC_LOAD_UMAX_I8_POSTRA:
+ IsUnsigned = true;
+ IsMax = true;
+ break;
case Mips::ATOMIC_LOAD_UMAX_I16_POSTRA:
IsUnsigned = true;
- [[fallthrough]];
+ IsMax = true;
+ break;
case Mips::ATOMIC_LOAD_MAX_I8_POSTRA:
+ SEOp = Mips::SEB;
+ IsMax = true;
+ break;
case Mips::ATOMIC_LOAD_MAX_I16_POSTRA:
IsMax = true;
break;
@@ -467,8 +481,34 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
.addReg(OldVal)
.addReg(Mask);
BuildMI(loopMBB, DL, TII->get(Mips::AND), Incr).addReg(Incr).addReg(Mask);
- }
+ if (!IsUnsigned) {
+ BuildMI(loopMBB, DL, TII->get(Mips::SRAV), OldVal)
+ .addReg(OldVal)
+ .addReg(ShiftAmnt);
+ BuildMI(loopMBB, DL, TII->get(Mips::SRAV), Incr)
+ .addReg(Incr)
+ .addReg(ShiftAmnt);
+ if (STI->hasMips32r2()) {
+ BuildMI(loopMBB, DL, TII->get(SEOp), OldVal).addReg(OldVal);
+ BuildMI(loopMBB, DL, TII->get(SEOp), Incr).addReg(Incr);
+ } else {
+ const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24;
+ BuildMI(loopMBB, DL, TII->get(Mips::SLL), OldVal)
+ .addReg(OldVal, RegState::Kill)
+ .addImm(ShiftImm);
+ BuildMI(loopMBB, DL, TII->get(Mips::SRA), OldVal)
+ .addReg(OldVal, RegState::Kill)
+ .addImm(ShiftImm);
+ BuildMI(loopMBB, DL, TII->get(Mips::SLL), Incr)
+ .addReg(Incr, RegState::Kill)
+ .addImm(ShiftImm);
+ BuildMI(loopMBB, DL, TII->get(Mips::SRA), Incr)
+ .addReg(Incr, RegState::Kill)
+ .addImm(ShiftImm);
+ }
+ }
+ }
// unsigned: sltu Scratch4, oldVal, Incr
// signed: slt Scratch4, oldVal, Incr
BuildMI(loopMBB, DL, TII->get(SLTScratch4), Scratch4)
diff --git a/llvm/test/CodeGen/Mips/atomic-min-max.ll b/llvm/test/CodeGen/Mips/atomic-min-max.ll
index f953c885ea7345..7fe0f36793af9c 100644
--- a/llvm/test/CodeGen/Mips/atomic-min-max.ll
+++ b/llvm/test/CodeGen/Mips/atomic-min-max.ll
@@ -3,6 +3,7 @@
; RUN: llc -march=mips -O0 -mcpu=mips32r6 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPSR6
; RUN: llc -march=mips -O0 -mcpu=mips32r2 -mattr=+micromips -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MM
; RUN: llc -march=mips -O0 -mcpu=mips32r6 -mattr=+micromips -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MMR6
+; RUN: llc -march=mipsel -O0 -mcpu=mips32 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS32
; RUN: llc -march=mipsel -O0 -mcpu=mips32r2 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPSEL
; RUN: llc -march=mipsel -O0 -mcpu=mips32r6 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPSELR6
; RUN: llc -march=mipsel -O0 -mcpu=mips32r2 -mattr=+micromips -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MMEL
@@ -77,6 +78,23 @@ define i32 @test_max_32(ptr nocapture %ptr, i32 signext %val) {
; MMR6-NEXT: sync
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_max_32:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: $BB0_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($4)
+; MIPS32-NEXT: slt $3, $2, $5
+; MIPS32-NEXT: move $1, $2
+; MIPS32-NEXT: movn $1, $5, $3
+; MIPS32-NEXT: sc $1, 0($4)
+; MIPS32-NEXT: beqz $1, $BB0_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_max_32:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: sync
@@ -280,6 +298,23 @@ define i32 @test_min_32(ptr nocapture %ptr, i32 signext %val) {
; MMR6-NEXT: sync
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_min_32:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: $BB1_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($4)
+; MIPS32-NEXT: slt $3, $2, $5
+; MIPS32-NEXT: move $1, $2
+; MIPS32-NEXT: movz $1, $5, $3
+; MIPS32-NEXT: sc $1, 0($4)
+; MIPS32-NEXT: beqz $1, $BB1_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_min_32:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: sync
@@ -483,6 +518,23 @@ define i32 @test_umax_32(ptr nocapture %ptr, i32 signext %val) {
; MMR6-NEXT: sync
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_umax_32:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: $BB2_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($4)
+; MIPS32-NEXT: sltu $3, $2, $5
+; MIPS32-NEXT: move $1, $2
+; MIPS32-NEXT: movn $1, $5, $3
+; MIPS32-NEXT: sc $1, 0($4)
+; MIPS32-NEXT: beqz $1, $BB2_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_umax_32:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: sync
@@ -686,6 +738,23 @@ define i32 @test_umin_32(ptr nocapture %ptr, i32 signext %val) {
; MMR6-NEXT: sync
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_umin_32:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: $BB3_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($4)
+; MIPS32-NEXT: sltu $3, $2, $5
+; MIPS32-NEXT: move $1, $2
+; MIPS32-NEXT: movz $1, $5, $3
+; MIPS32-NEXT: sc $1, 0($4)
+; MIPS32-NEXT: beqz $1, $BB3_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_umin_32:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: sync
@@ -980,6 +1049,55 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MMR6-NEXT: sync
; MMR6-NEXT: addiu $sp, $sp, 8
; MMR6-NEXT: jrc $ra
+;
+; MIPS32-LABEL: test_max_16:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: # kill: def $at killed $a1
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $1, $zero, -4
+; MIPS32-NEXT: and $6, $4, $1
+; MIPS32-NEXT: andi $1, $4, 3
+; MIPS32-NEXT: sll $10, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 65535
+; MIPS32-NEXT: sllv $8, $1, $10
+; MIPS32-NEXT: nor $9, $zero, $8
+; MIPS32-NEXT: sllv $7, $5, $10
+; MIPS32-NEXT: $BB4_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: and $2, $2, $8
+; MIPS32-NEXT: and $7, $7, $8
+; MIPS32-NEXT: srav $2, $2, $10
+; MIPS32-NEXT: srav $7, $7, $10
+; MIPS32-NEXT: sll $2, $2, 16
+; MIPS32-NEXT: sra $2, $2, 16
+; MIPS32-NEXT: sll $7, $7, 16
+; MIPS32-NEXT: sra $7, $7, 16
+; MIPS32-NEXT: slt $5, $2, $7
+; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: movn $3, $7, $5
+; MIPS32-NEXT: and $3, $3, $8
+; MIPS32-NEXT: and $4, $2, $9
+; MIPS32-NEXT: or $4, $4, $3
+; MIPS32-NEXT: sc $4, 0($6)
+; MIPS32-NEXT: beqz $4, $BB4_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: and $1, $2, $8
+; MIPS32-NEXT: srlv $1, $1, $10
+; MIPS32-NEXT: sll $1, $1, 16
+; MIPS32-NEXT: sra $1, $1, 16
+; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: # %bb.4: # %entry
+; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $sp, $sp, 8
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+
;
; MIPSEL-LABEL: test_max_16:
; MIPSEL: # %bb.0: # %entry
@@ -1000,6 +1118,10 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSEL-NEXT: ll $2, 0($6)
; MIPSEL-NEXT: and $2, $2, $8
; MIPSEL-NEXT: and $7, $7, $8
+; MIPSEL-NEXT: srav $2, $2, $10
+; MIPSEL-NEXT: srav $7, $7, $10
+; MIPSEL-NEXT: seh $2, $2
+; MIPSEL-NEXT: seh $7, $7
; MIPSEL-NEXT: slt $5, $2, $7
; MIPSEL-NEXT: move $3, $2
; MIPSEL-NEXT: movn $3, $7, $5
@@ -1041,6 +1163,10 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSELR6-NEXT: ll $2, 0($6)
; MIPSELR6-NEXT: and $2, $2, $8
; MIPSELR6-NEXT: and $7, $7, $8
+; MIPSELR6-NEXT: srav $2, $2, $10
+; MIPSELR6-NEXT: srav $7, $7, $10
+; MIPSELR6-NEXT: seh $2, $2
+; MIPSELR6-NEXT: seh $7, $7
; MIPSELR6-NEXT: slt $5, $2, $7
; MIPSELR6-NEXT: seleqz $3, $2, $5
; MIPSELR6-NEXT: selnez $5, $7, $5
@@ -1081,6 +1207,10 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MMEL-NEXT: ll $2, 0($6)
; MMEL-NEXT: and $2, $2, $8
; MMEL-NEXT: and $7, $7, $8
+; MMEL-NEXT: srav $2, $2, $10
+; MMEL-NEXT: srav $7, $7, $10
+; MMEL-NEXT: seh $2, $2
+; MMEL-NEXT: seh $7, $7
; MMEL-NEXT: slt $5, $2, $7
; MMEL-NEXT: or $3, $2, $zero
; MMEL-NEXT: movn $3, $7, $5
@@ -1120,6 +1250,10 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MMELR6-NEXT: ll $2, 0($6)
; MMELR6-NEXT: and $2, $2, $8
; MMELR6-NEXT: and $7, $7, $8
+; MMELR6-NEXT: srav $2, $2, $10
+; MMELR6-NEXT: srav $7, $7, $10
+; MMELR6-NEXT: seh $2, $2
+; MMELR6-NEXT: seh $7, $7
; MMELR6-NEXT: slt $5, $2, $7
; MMELR6-NEXT: seleqz $3, $2, $5
; MMELR6-NEXT: selnez $5, $7, $5
@@ -1239,6 +1373,10 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64EL-NEXT: ll $2, 0($6)
; MIPS64EL-NEXT: and $2, $2, $8
; MIPS64EL-NEXT: and $7, $7, $8
+; MIPS64EL-NEXT: srav $2, $2, $10
+; MIPS64EL-NEXT: srav $7, $7, $10
+; MIPS64EL-NEXT: seh $2, $2
+; MIPS64EL-NEXT: seh $7, $7
; MIPS64EL-NEXT: slt $5, $2, $7
; MIPS64EL-NEXT: move $3, $2
; MIPS64EL-NEXT: movn $3, $7, $5
@@ -1280,6 +1418,10 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64ELR6-NEXT: ll $2, 0($6)
; MIPS64ELR6-NEXT: and $2, $2, $8
; MIPS64ELR6-NEXT: and $7, $7, $8
+; MIPS64ELR6-NEXT: srav $2, $2, $10
+; MIPS64ELR6-NEXT: srav $7, $7, $10
+; MIPS64ELR6-NEXT: seh $2, $2
+; MIPS64ELR6-NEXT: seh $7, $7
; MIPS64ELR6-NEXT: slt $5, $2, $7
; MIPS64ELR6-NEXT: seleqz $3, $2, $5
; MIPS64ELR6-NEXT: selnez $5, $7, $5
@@ -1462,6 +1604,54 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MMR6-NEXT: addiu $sp, $sp, 8
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_min_16:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: # kill: def $at killed $a1
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $1, $zero, -4
+; MIPS32-NEXT: and $6, $4, $1
+; MIPS32-NEXT: andi $1, $4, 3
+; MIPS32-NEXT: sll $10, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 65535
+; MIPS32-NEXT: sllv $8, $1, $10
+; MIPS32-NEXT: nor $9, $zero, $8
+; MIPS32-NEXT: sllv $7, $5, $10
+; MIPS32-NEXT: $BB5_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: and $2, $2, $8
+; MIPS32-NEXT: and $7, $7, $8
+; MIPS32-NEXT: srav $2, $2, $10
+; MIPS32-NEXT: srav $7, $7, $10
+; MIPS32-NEXT: sll $2, $2, 16
+; MIPS32-NEXT: sra $2, $2, 16
+; MIPS32-NEXT: sll $7, $7, 16
+; MIPS32-NEXT: sra $7, $7, 16
+; MIPS32-NEXT: slt $5, $2, $7
+; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: movz $3, $7, $5
+; MIPS32-NEXT: and $3, $3, $8
+; MIPS32-NEXT: and $4, $2, $9
+; MIPS32-NEXT: or $4, $4, $3
+; MIPS32-NEXT: sc $4, 0($6)
+; MIPS32-NEXT: beqz $4, $BB5_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: and $1, $2, $8
+; MIPS32-NEXT: srlv $1, $1, $10
+; MIPS32-NEXT: sll $1, $1, 16
+; MIPS32-NEXT: sra $1, $1, 16
+; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: # %bb.4: # %entry
+; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $sp, $sp, 8
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_min_16:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: addiu $sp, $sp, -8
@@ -1481,6 +1671,10 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSEL-NEXT: ll $2, 0($6)
; MIPSEL-NEXT: and $2, $2, $8
; MIPSEL-NEXT: and $7, $7, $8
+; MIPSEL-NEXT: srav $2, $2, $10
+; MIPSEL-NEXT: srav $7, $7, $10
+; MIPSEL-NEXT: seh $2, $2
+; MIPSEL-NEXT: seh $7, $7
; MIPSEL-NEXT: slt $5, $2, $7
; MIPSEL-NEXT: move $3, $2
; MIPSEL-NEXT: movz $3, $7, $5
@@ -1522,6 +1716,10 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSELR6-NEXT: ll $2, 0($6)
; MIPSELR6-NEXT: and $2, $2, $8
; MIPSELR6-NEXT: and $7, $7, $8
+; MIPSELR6-NEXT: srav $2, $2, $10
+; MIPSELR6-NEXT: srav $7, $7, $10
+; MIPSELR6-NEXT: seh $2, $2
+; MIPSELR6-NEXT: seh $7, $7
; MIPSELR6-NEXT: slt $5, $2, $7
; MIPSELR6-NEXT: selnez $3, $2, $5
; MIPSELR6-NEXT: seleqz $5, $7, $5
@@ -1562,6 +1760,10 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MMEL-NEXT: ll $2, 0($6)
; MMEL-NEXT: and $2, $2, $8
; MMEL-NEXT: and $7, $7, $8
+; MMEL-NEXT: srav $2, $2, $10
+; MMEL-NEXT: srav $7, $7, $10
+; MMEL-NEXT: seh $2, $2
+; MMEL-NEXT: seh $7, $7
; MMEL-NEXT: slt $5, $2, $7
; MMEL-NEXT: or $3, $2, $zero
; MMEL-NEXT: movz $3, $7, $5
@@ -1601,6 +1803,10 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MMELR6-NEXT: ll $2, 0($6)
; MMELR6-NEXT: and $2, $2, $8
; MMELR6-NEXT: and $7, $7, $8
+; MMELR6-NEXT: srav $2, $2, $10
+; MMELR6-NEXT: srav $7, $7, $10
+; MMELR6-NEXT: seh $2, $2
+; MMELR6-NEXT: seh $7, $7
; MMELR6-NEXT: slt $5, $2, $7
; MMELR6-NEXT: selnez $3, $2, $5
; MMELR6-NEXT: seleqz $5, $7, $5
@@ -1720,6 +1926,10 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64EL-NEXT: ll $2, 0($6)
; MIPS64EL-NEXT: and $2, $2, $8
; MIPS64EL-NEXT: and $7, $7, $8
+; MIPS64EL-NEXT: srav $2, $2, $10
+; MIPS64EL-NEXT: srav $7, $7, $10
+; MIPS64EL-NEXT: seh $2, $2
+; MIPS64EL-NEXT: seh $7, $7
; MIPS64EL-NEXT: slt $5, $2, $7
; MIPS64EL-NEXT: move $3, $2
; MIPS64EL-NEXT: movz $3, $7, $5
@@ -1761,6 +1971,10 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64ELR6-NEXT: ll $2, 0($6)
; MIPS64ELR6-NEXT: and $2, $2, $8
; MIPS64ELR6-NEXT: and $7, $7, $8
+; MIPS64ELR6-NEXT: srav $2, $2, $10
+; MIPS64ELR6-NEXT: srav $7, $7, $10
+; MIPS64ELR6-NEXT: seh $2, $2
+; MIPS64ELR6-NEXT: seh $7, $7
; MIPS64ELR6-NEXT: slt $5, $2, $7
; MIPS64ELR6-NEXT: selnez $3, $2, $5
; MIPS64ELR6-NEXT: seleqz $5, $7, $5
@@ -1943,6 +2157,48 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MMR6-NEXT: addiu $sp, $sp, 8
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_umax_16:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: # kill: def $at killed $a1
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $1, $zero, -4
+; MIPS32-NEXT: and $6, $4, $1
+; MIPS32-NEXT: andi $1, $4, 3
+; MIPS32-NEXT: sll $10, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 65535
+; MIPS32-NEXT: sllv $8, $1, $10
+; MIPS32-NEXT: nor $9, $zero, $8
+; MIPS32-NEXT: sllv $7, $5, $10
+; MIPS32-NEXT: $BB6_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: and $2, $2, $8
+; MIPS32-NEXT: and $7, $7, $8
+; MIPS32-NEXT: sltu $5, $2, $7
+; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: movn $3, $7, $5
+; MIPS32-NEXT: and $3, $3, $8
+; MIPS32-NEXT: and $4, $2, $9
+; MIPS32-NEXT: or $4, $4, $3
+; MIPS32-NEXT: sc $4, 0($6)
+; MIPS32-NEXT: beqz $4, $BB6_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: and $1, $2, $8
+; MIPS32-NEXT: srlv $1, $1, $10
+; MIPS32-NEXT: sll $1, $1, 16
+; MIPS32-NEXT: sra $1, $1, 16
+; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: # %bb.4: # %entry
+; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $sp, $sp, 8
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_umax_16:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: addiu $sp, $sp, -8
@@ -2424,6 +2680,49 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MMR6-NEXT: addiu $sp, $sp, 8
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_umin_16:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: # kill: def $at killed $a1
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $1, $zero, -4
+; MIPS32-NEXT: and $6, $4, $1
+; MIPS32-NEXT: andi $1, $4, 3
+; MIPS32-NEXT: sll $10, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 65535
+; MIPS32-NEXT: sllv $8, $1, $10
+; MIPS32-NEXT: nor $9, $zero, $8
+; MIPS32-NEXT: sllv $7, $5, $10
+; MIPS32-NEXT: $BB7_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: and $2, $2, $8
+; MIPS32-NEXT: and $7, $7, $8
+; MIPS32-NEXT: sltu $5, $2, $7
+; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: movz $3, $7, $5
+; MIPS32-NEXT: and $3, $3, $8
+; MIPS32-NEXT: and $4, $2, $9
+; MIPS32-NEXT: or $4, $4, $3
+; MIPS32-NEXT: sc $4, 0($6)
+; MIPS32-NEXT: beqz $4, $BB7_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: and $1, $2, $8
+; MIPS32-NEXT: srlv $1, $1, $10
+; MIPS32-NEXT: sll $1, $1, 16
+; MIPS32-NEXT: sra $1, $1, 16
+; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: # %bb.4: # %entry
+; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $sp, $sp, 8
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
+;
; MIPSEL-LABEL: test_umin_16:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: addiu $sp, $sp, -8
@@ -2780,7 +3079,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS-NEXT: # %bb.2: # %entry
; MIPS-NEXT: and $1, $2, $8
; MIPS-NEXT: srlv $1, $1, $10
-; MIPS-NEXT: seh $1, $1
+; MIPS-NEXT: seb $1, $1
; MIPS-NEXT: # %bb.3: # %entry
; MIPS-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS-NEXT: # %bb.4: # %entry
@@ -2820,7 +3119,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSR6-NEXT: # %bb.2: # %entry
; MIPSR6-NEXT: and $1, $2, $8
; MIPSR6-NEXT: srlv $1, $1, $10
-; MIPSR6-NEXT: seh $1, $1
+; MIPSR6-NEXT: seb $1, $1
; MIPSR6-NEXT: # %bb.3: # %entry
; MIPSR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSR6-NEXT: # %bb.4: # %entry
@@ -2858,7 +3157,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MM-NEXT: # %bb.2: # %entry
; MM-NEXT: and $1, $2, $8
; MM-NEXT: srlv $1, $1, $10
-; MM-NEXT: seh $1, $1
+; MM-NEXT: seb $1, $1
; MM-NEXT: # %bb.3: # %entry
; MM-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MM-NEXT: # %bb.4: # %entry
@@ -2897,7 +3196,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: # %bb.2: # %entry
; MMR6-NEXT: and $1, $2, $8
; MMR6-NEXT: srlv $1, $1, $10
-; MMR6-NEXT: seh $1, $1
+; MMR6-NEXT: seb $1, $1
; MMR6-NEXT: # %bb.3: # %entry
; MMR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMR6-NEXT: # %bb.4: # %entry
@@ -2906,6 +3205,54 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: addiu $sp, $sp, 8
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_max_8:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: # kill: def $at killed $a1
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $1, $zero, -4
+; MIPS32-NEXT: and $6, $4, $1
+; MIPS32-NEXT: andi $1, $4, 3
+; MIPS32-NEXT: sll $10, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 255
+; MIPS32-NEXT: sllv $8, $1, $10
+; MIPS32-NEXT: nor $9, $zero, $8
+; MIPS32-NEXT: sllv $7, $5, $10
+; MIPS32-NEXT: $BB8_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: and $2, $2, $8
+; MIPS32-NEXT: and $7, $7, $8
+; MIPS32-NEXT: srav $2, $2, $10
+; MIPS32-NEXT: srav $7, $7, $10
+; MIPS32-NEXT: sll $2, $2, 24
+; MIPS32-NEXT: sra $2, $2, 24
+; MIPS32-NEXT: sll $7, $7, 24
+; MIPS32-NEXT: sra $7, $7, 24
+; MIPS32-NEXT: slt $5, $2, $7
+; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: movn $3, $7, $5
+; MIPS32-NEXT: and $3, $3, $8
+; MIPS32-NEXT: and $4, $2, $9
+; MIPS32-NEXT: or $4, $4, $3
+; MIPS32-NEXT: sc $4, 0($6)
+; MIPS32-NEXT: beqz $4, $BB8_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: and $1, $2, $8
+; MIPS32-NEXT: srlv $1, $1, $10
+; MIPS32-NEXT: sll $1, $1, 24
+; MIPS32-NEXT: sra $1, $1, 24
+; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: # %bb.4: # %entry
+; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $sp, $sp, 8
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_max_8:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: addiu $sp, $sp, -8
@@ -2925,6 +3272,10 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: ll $2, 0($6)
; MIPSEL-NEXT: and $2, $2, $8
; MIPSEL-NEXT: and $7, $7, $8
+; MIPSEL-NEXT: srav $2, $2, $10
+; MIPSEL-NEXT: srav $7, $7, $10
+; MIPSEL-NEXT: seb $2, $2
+; MIPSEL-NEXT: seb $7, $7
; MIPSEL-NEXT: slt $5, $2, $7
; MIPSEL-NEXT: move $3, $2
; MIPSEL-NEXT: movn $3, $7, $5
@@ -2937,7 +3288,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: # %bb.2: # %entry
; MIPSEL-NEXT: and $1, $2, $8
; MIPSEL-NEXT: srlv $1, $1, $10
-; MIPSEL-NEXT: seh $1, $1
+; MIPSEL-NEXT: seb $1, $1
; MIPSEL-NEXT: # %bb.3: # %entry
; MIPSEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSEL-NEXT: # %bb.4: # %entry
@@ -2966,6 +3317,10 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: ll $2, 0($6)
; MIPSELR6-NEXT: and $2, $2, $8
; MIPSELR6-NEXT: and $7, $7, $8
+; MIPSELR6-NEXT: srav $2, $2, $10
+; MIPSELR6-NEXT: srav $7, $7, $10
+; MIPSELR6-NEXT: seb $2, $2
+; MIPSELR6-NEXT: seb $7, $7
; MIPSELR6-NEXT: slt $5, $2, $7
; MIPSELR6-NEXT: seleqz $3, $2, $5
; MIPSELR6-NEXT: selnez $5, $7, $5
@@ -2978,7 +3333,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: # %bb.2: # %entry
; MIPSELR6-NEXT: and $1, $2, $8
; MIPSELR6-NEXT: srlv $1, $1, $10
-; MIPSELR6-NEXT: seh $1, $1
+; MIPSELR6-NEXT: seb $1, $1
; MIPSELR6-NEXT: # %bb.3: # %entry
; MIPSELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSELR6-NEXT: # %bb.4: # %entry
@@ -3006,6 +3361,10 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: ll $2, 0($6)
; MMEL-NEXT: and $2, $2, $8
; MMEL-NEXT: and $7, $7, $8
+; MMEL-NEXT: srav $2, $2, $10
+; MMEL-NEXT: srav $7, $7, $10
+; MMEL-NEXT: seb $2, $2
+; MMEL-NEXT: seb $7, $7
; MMEL-NEXT: slt $5, $2, $7
; MMEL-NEXT: or $3, $2, $zero
; MMEL-NEXT: movn $3, $7, $5
@@ -3017,7 +3376,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: # %bb.2: # %entry
; MMEL-NEXT: and $1, $2, $8
; MMEL-NEXT: srlv $1, $1, $10
-; MMEL-NEXT: seh $1, $1
+; MMEL-NEXT: seb $1, $1
; MMEL-NEXT: # %bb.3: # %entry
; MMEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMEL-NEXT: # %bb.4: # %entry
@@ -3045,6 +3404,10 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: ll $2, 0($6)
; MMELR6-NEXT: and $2, $2, $8
; MMELR6-NEXT: and $7, $7, $8
+; MMELR6-NEXT: srav $2, $2, $10
+; MMELR6-NEXT: srav $7, $7, $10
+; MMELR6-NEXT: seb $2, $2
+; MMELR6-NEXT: seb $7, $7
; MMELR6-NEXT: slt $5, $2, $7
; MMELR6-NEXT: seleqz $3, $2, $5
; MMELR6-NEXT: selnez $5, $7, $5
@@ -3057,7 +3420,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: # %bb.2: # %entry
; MMELR6-NEXT: and $1, $2, $8
; MMELR6-NEXT: srlv $1, $1, $10
-; MMELR6-NEXT: seh $1, $1
+; MMELR6-NEXT: seb $1, $1
; MMELR6-NEXT: # %bb.3: # %entry
; MMELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMELR6-NEXT: # %bb.4: # %entry
@@ -3096,7 +3459,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64-NEXT: # %bb.2: # %entry
; MIPS64-NEXT: and $1, $2, $8
; MIPS64-NEXT: srlv $1, $1, $10
-; MIPS64-NEXT: seh $1, $1
+; MIPS64-NEXT: seb $1, $1
; MIPS64-NEXT: # %bb.3: # %entry
; MIPS64-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64-NEXT: # %bb.4: # %entry
@@ -3136,7 +3499,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64R6-NEXT: # %bb.2: # %entry
; MIPS64R6-NEXT: and $1, $2, $8
; MIPS64R6-NEXT: srlv $1, $1, $10
-; MIPS64R6-NEXT: seh $1, $1
+; MIPS64R6-NEXT: seb $1, $1
; MIPS64R6-NEXT: # %bb.3: # %entry
; MIPS64R6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64R6-NEXT: # %bb.4: # %entry
@@ -3164,6 +3527,10 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: ll $2, 0($6)
; MIPS64EL-NEXT: and $2, $2, $8
; MIPS64EL-NEXT: and $7, $7, $8
+; MIPS64EL-NEXT: srav $2, $2, $10
+; MIPS64EL-NEXT: srav $7, $7, $10
+; MIPS64EL-NEXT: seb $2, $2
+; MIPS64EL-NEXT: seb $7, $7
; MIPS64EL-NEXT: slt $5, $2, $7
; MIPS64EL-NEXT: move $3, $2
; MIPS64EL-NEXT: movn $3, $7, $5
@@ -3176,7 +3543,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: # %bb.2: # %entry
; MIPS64EL-NEXT: and $1, $2, $8
; MIPS64EL-NEXT: srlv $1, $1, $10
-; MIPS64EL-NEXT: seh $1, $1
+; MIPS64EL-NEXT: seb $1, $1
; MIPS64EL-NEXT: # %bb.3: # %entry
; MIPS64EL-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64EL-NEXT: # %bb.4: # %entry
@@ -3205,6 +3572,10 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: ll $2, 0($6)
; MIPS64ELR6-NEXT: and $2, $2, $8
; MIPS64ELR6-NEXT: and $7, $7, $8
+; MIPS64ELR6-NEXT: srav $2, $2, $10
+; MIPS64ELR6-NEXT: srav $7, $7, $10
+; MIPS64ELR6-NEXT: seb $2, $2
+; MIPS64ELR6-NEXT: seb $7, $7
; MIPS64ELR6-NEXT: slt $5, $2, $7
; MIPS64ELR6-NEXT: seleqz $3, $2, $5
; MIPS64ELR6-NEXT: selnez $5, $7, $5
@@ -3217,7 +3588,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: # %bb.2: # %entry
; MIPS64ELR6-NEXT: and $1, $2, $8
; MIPS64ELR6-NEXT: srlv $1, $1, $10
-; MIPS64ELR6-NEXT: seh $1, $1
+; MIPS64ELR6-NEXT: seb $1, $1
; MIPS64ELR6-NEXT: # %bb.3: # %entry
; MIPS64ELR6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64ELR6-NEXT: # %bb.4: # %entry
@@ -3261,7 +3632,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS-NEXT: # %bb.2: # %entry
; MIPS-NEXT: and $1, $2, $8
; MIPS-NEXT: srlv $1, $1, $10
-; MIPS-NEXT: seh $1, $1
+; MIPS-NEXT: seb $1, $1
; MIPS-NEXT: # %bb.3: # %entry
; MIPS-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS-NEXT: # %bb.4: # %entry
@@ -3301,7 +3672,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSR6-NEXT: # %bb.2: # %entry
; MIPSR6-NEXT: and $1, $2, $8
; MIPSR6-NEXT: srlv $1, $1, $10
-; MIPSR6-NEXT: seh $1, $1
+; MIPSR6-NEXT: seb $1, $1
; MIPSR6-NEXT: # %bb.3: # %entry
; MIPSR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSR6-NEXT: # %bb.4: # %entry
@@ -3339,7 +3710,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MM-NEXT: # %bb.2: # %entry
; MM-NEXT: and $1, $2, $8
; MM-NEXT: srlv $1, $1, $10
-; MM-NEXT: seh $1, $1
+; MM-NEXT: seb $1, $1
; MM-NEXT: # %bb.3: # %entry
; MM-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MM-NEXT: # %bb.4: # %entry
@@ -3378,7 +3749,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: # %bb.2: # %entry
; MMR6-NEXT: and $1, $2, $8
; MMR6-NEXT: srlv $1, $1, $10
-; MMR6-NEXT: seh $1, $1
+; MMR6-NEXT: seb $1, $1
; MMR6-NEXT: # %bb.3: # %entry
; MMR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMR6-NEXT: # %bb.4: # %entry
@@ -3387,6 +3758,54 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: addiu $sp, $sp, 8
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_min_8:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: # kill: def $at killed $a1
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $1, $zero, -4
+; MIPS32-NEXT: and $6, $4, $1
+; MIPS32-NEXT: andi $1, $4, 3
+; MIPS32-NEXT: sll $10, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 255
+; MIPS32-NEXT: sllv $8, $1, $10
+; MIPS32-NEXT: nor $9, $zero, $8
+; MIPS32-NEXT: sllv $7, $5, $10
+; MIPS32-NEXT: $BB9_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: and $2, $2, $8
+; MIPS32-NEXT: and $7, $7, $8
+; MIPS32-NEXT: srav $2, $2, $10
+; MIPS32-NEXT: srav $7, $7, $10
+; MIPS32-NEXT: sll $2, $2, 24
+; MIPS32-NEXT: sra $2, $2, 24
+; MIPS32-NEXT: sll $7, $7, 24
+; MIPS32-NEXT: sra $7, $7, 24
+; MIPS32-NEXT: slt $5, $2, $7
+; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: movz $3, $7, $5
+; MIPS32-NEXT: and $3, $3, $8
+; MIPS32-NEXT: and $4, $2, $9
+; MIPS32-NEXT: or $4, $4, $3
+; MIPS32-NEXT: sc $4, 0($6)
+; MIPS32-NEXT: beqz $4, $BB9_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: and $1, $2, $8
+; MIPS32-NEXT: srlv $1, $1, $10
+; MIPS32-NEXT: sll $1, $1, 24
+; MIPS32-NEXT: sra $1, $1, 24
+; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: # %bb.4: # %entry
+; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $sp, $sp, 8
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_min_8:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: addiu $sp, $sp, -8
@@ -3406,6 +3825,10 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: ll $2, 0($6)
; MIPSEL-NEXT: and $2, $2, $8
; MIPSEL-NEXT: and $7, $7, $8
+; MIPSEL-NEXT: srav $2, $2, $10
+; MIPSEL-NEXT: srav $7, $7, $10
+; MIPSEL-NEXT: seb $2, $2
+; MIPSEL-NEXT: seb $7, $7
; MIPSEL-NEXT: slt $5, $2, $7
; MIPSEL-NEXT: move $3, $2
; MIPSEL-NEXT: movz $3, $7, $5
@@ -3418,7 +3841,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: # %bb.2: # %entry
; MIPSEL-NEXT: and $1, $2, $8
; MIPSEL-NEXT: srlv $1, $1, $10
-; MIPSEL-NEXT: seh $1, $1
+; MIPSEL-NEXT: seb $1, $1
; MIPSEL-NEXT: # %bb.3: # %entry
; MIPSEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSEL-NEXT: # %bb.4: # %entry
@@ -3447,6 +3870,10 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: ll $2, 0($6)
; MIPSELR6-NEXT: and $2, $2, $8
; MIPSELR6-NEXT: and $7, $7, $8
+; MIPSELR6-NEXT: srav $2, $2, $10
+; MIPSELR6-NEXT: srav $7, $7, $10
+; MIPSELR6-NEXT: seb $2, $2
+; MIPSELR6-NEXT: seb $7, $7
; MIPSELR6-NEXT: slt $5, $2, $7
; MIPSELR6-NEXT: selnez $3, $2, $5
; MIPSELR6-NEXT: seleqz $5, $7, $5
@@ -3459,7 +3886,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: # %bb.2: # %entry
; MIPSELR6-NEXT: and $1, $2, $8
; MIPSELR6-NEXT: srlv $1, $1, $10
-; MIPSELR6-NEXT: seh $1, $1
+; MIPSELR6-NEXT: seb $1, $1
; MIPSELR6-NEXT: # %bb.3: # %entry
; MIPSELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSELR6-NEXT: # %bb.4: # %entry
@@ -3487,6 +3914,10 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: ll $2, 0($6)
; MMEL-NEXT: and $2, $2, $8
; MMEL-NEXT: and $7, $7, $8
+; MMEL-NEXT: srav $2, $2, $10
+; MMEL-NEXT: srav $7, $7, $10
+; MMEL-NEXT: seb $2, $2
+; MMEL-NEXT: seb $7, $7
; MMEL-NEXT: slt $5, $2, $7
; MMEL-NEXT: or $3, $2, $zero
; MMEL-NEXT: movz $3, $7, $5
@@ -3498,7 +3929,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: # %bb.2: # %entry
; MMEL-NEXT: and $1, $2, $8
; MMEL-NEXT: srlv $1, $1, $10
-; MMEL-NEXT: seh $1, $1
+; MMEL-NEXT: seb $1, $1
; MMEL-NEXT: # %bb.3: # %entry
; MMEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMEL-NEXT: # %bb.4: # %entry
@@ -3526,6 +3957,10 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: ll $2, 0($6)
; MMELR6-NEXT: and $2, $2, $8
; MMELR6-NEXT: and $7, $7, $8
+; MMELR6-NEXT: srav $2, $2, $10
+; MMELR6-NEXT: srav $7, $7, $10
+; MMELR6-NEXT: seb $2, $2
+; MMELR6-NEXT: seb $7, $7
; MMELR6-NEXT: slt $5, $2, $7
; MMELR6-NEXT: selnez $3, $2, $5
; MMELR6-NEXT: seleqz $5, $7, $5
@@ -3538,7 +3973,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: # %bb.2: # %entry
; MMELR6-NEXT: and $1, $2, $8
; MMELR6-NEXT: srlv $1, $1, $10
-; MMELR6-NEXT: seh $1, $1
+; MMELR6-NEXT: seb $1, $1
; MMELR6-NEXT: # %bb.3: # %entry
; MMELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMELR6-NEXT: # %bb.4: # %entry
@@ -3577,7 +4012,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64-NEXT: # %bb.2: # %entry
; MIPS64-NEXT: and $1, $2, $8
; MIPS64-NEXT: srlv $1, $1, $10
-; MIPS64-NEXT: seh $1, $1
+; MIPS64-NEXT: seb $1, $1
; MIPS64-NEXT: # %bb.3: # %entry
; MIPS64-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64-NEXT: # %bb.4: # %entry
@@ -3617,7 +4052,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64R6-NEXT: # %bb.2: # %entry
; MIPS64R6-NEXT: and $1, $2, $8
; MIPS64R6-NEXT: srlv $1, $1, $10
-; MIPS64R6-NEXT: seh $1, $1
+; MIPS64R6-NEXT: seb $1, $1
; MIPS64R6-NEXT: # %bb.3: # %entry
; MIPS64R6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64R6-NEXT: # %bb.4: # %entry
@@ -3645,6 +4080,10 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: ll $2, 0($6)
; MIPS64EL-NEXT: and $2, $2, $8
; MIPS64EL-NEXT: and $7, $7, $8
+; MIPS64EL-NEXT: srav $2, $2, $10
+; MIPS64EL-NEXT: srav $7, $7, $10
+; MIPS64EL-NEXT: seb $2, $2
+; MIPS64EL-NEXT: seb $7, $7
; MIPS64EL-NEXT: slt $5, $2, $7
; MIPS64EL-NEXT: move $3, $2
; MIPS64EL-NEXT: movz $3, $7, $5
@@ -3657,7 +4096,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: # %bb.2: # %entry
; MIPS64EL-NEXT: and $1, $2, $8
; MIPS64EL-NEXT: srlv $1, $1, $10
-; MIPS64EL-NEXT: seh $1, $1
+; MIPS64EL-NEXT: seb $1, $1
; MIPS64EL-NEXT: # %bb.3: # %entry
; MIPS64EL-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64EL-NEXT: # %bb.4: # %entry
@@ -3686,6 +4125,10 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: ll $2, 0($6)
; MIPS64ELR6-NEXT: and $2, $2, $8
; MIPS64ELR6-NEXT: and $7, $7, $8
+; MIPS64ELR6-NEXT: srav $2, $2, $10
+; MIPS64ELR6-NEXT: srav $7, $7, $10
+; MIPS64ELR6-NEXT: seb $2, $2
+; MIPS64ELR6-NEXT: seb $7, $7
; MIPS64ELR6-NEXT: slt $5, $2, $7
; MIPS64ELR6-NEXT: selnez $3, $2, $5
; MIPS64ELR6-NEXT: seleqz $5, $7, $5
@@ -3698,7 +4141,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: # %bb.2: # %entry
; MIPS64ELR6-NEXT: and $1, $2, $8
; MIPS64ELR6-NEXT: srlv $1, $1, $10
-; MIPS64ELR6-NEXT: seh $1, $1
+; MIPS64ELR6-NEXT: seb $1, $1
; MIPS64ELR6-NEXT: # %bb.3: # %entry
; MIPS64ELR6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64ELR6-NEXT: # %bb.4: # %entry
@@ -3868,6 +4311,48 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: addiu $sp, $sp, 8
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_umax_8:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: # kill: def $at killed $a1
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $1, $zero, -4
+; MIPS32-NEXT: and $6, $4, $1
+; MIPS32-NEXT: andi $1, $4, 3
+; MIPS32-NEXT: sll $10, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 255
+; MIPS32-NEXT: sllv $8, $1, $10
+; MIPS32-NEXT: nor $9, $zero, $8
+; MIPS32-NEXT: sllv $7, $5, $10
+; MIPS32-NEXT: $BB10_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: and $2, $2, $8
+; MIPS32-NEXT: and $7, $7, $8
+; MIPS32-NEXT: sltu $5, $2, $7
+; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: movn $3, $7, $5
+; MIPS32-NEXT: and $3, $3, $8
+; MIPS32-NEXT: and $4, $2, $9
+; MIPS32-NEXT: or $4, $4, $3
+; MIPS32-NEXT: sc $4, 0($6)
+; MIPS32-NEXT: beqz $4, $BB10_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: and $1, $2, $8
+; MIPS32-NEXT: srlv $1, $1, $10
+; MIPS32-NEXT: sll $1, $1, 16
+; MIPS32-NEXT: sra $1, $1, 16
+; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: # %bb.4: # %entry
+; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $sp, $sp, 8
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_umax_8:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: addiu $sp, $sp, -8
@@ -4349,6 +4834,48 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: addiu $sp, $sp, 8
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_umin_8:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: # kill: def $at killed $a1
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $1, $zero, -4
+; MIPS32-NEXT: and $6, $4, $1
+; MIPS32-NEXT: andi $1, $4, 3
+; MIPS32-NEXT: sll $10, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 255
+; MIPS32-NEXT: sllv $8, $1, $10
+; MIPS32-NEXT: nor $9, $zero, $8
+; MIPS32-NEXT: sllv $7, $5, $10
+; MIPS32-NEXT: $BB11_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: and $2, $2, $8
+; MIPS32-NEXT: and $7, $7, $8
+; MIPS32-NEXT: sltu $5, $2, $7
+; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: movz $3, $7, $5
+; MIPS32-NEXT: and $3, $3, $8
+; MIPS32-NEXT: and $4, $2, $9
+; MIPS32-NEXT: or $4, $4, $3
+; MIPS32-NEXT: sc $4, 0($6)
+; MIPS32-NEXT: beqz $4, $BB11_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: and $1, $2, $8
+; MIPS32-NEXT: srlv $1, $1, $10
+; MIPS32-NEXT: sll $1, $1, 16
+; MIPS32-NEXT: sra $1, $1, 16
+; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: # %bb.4: # %entry
+; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $sp, $sp, 8
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_umin_8:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: addiu $sp, $sp, -8
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