[llvm] [AArch64] Remove copy in SVE/SME predicate spill (PR #81716)

[Graham Hunter via llvm-commits]

================
@@ -4807,8 +4808,9 @@ void AArch64InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
              "Unexpected register store without SVE2p1 or SME2");
       if (SrcReg.isVirtual()) {
         auto NewSrcReg =
-            MF.getRegInfo().createVirtualRegister(&AArch64::PPRRegClass);
-        BuildMI(MBB, MBBI, DebugLoc(), get(TargetOpcode::COPY), NewSrcReg)
+            MF.getRegInfo().createVirtualRegister(&AArch64::PPR_p8to15RegClass);
----------------
huntergr-arm wrote:

Hi; I just tried an experiment to constrain the register class to a common superclass instead of introducing a copy and eliding it later. This results in 'pn8' being stored instead of 'p8', but that may be allowable syntax given some discussions I had -- I haven't found much guidance on that. I'm not sure if this the the best approach, but it may be worth investigating.

If there are problems with it, we might want to revisit our current register class hierarchy at some point.

```suggestion
      if (SrcReg.isVirtual()) {
        MF.getRegInfo().constrainRegClass(SrcReg, &AArch64::PPRRegClass);
      }...
```

https://github.com/llvm/llvm-project/pull/81716