[llvm] d877ab1 - MachineInstr - update TargetRegisterInfo arguments comments. NFC.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Feb 24 07:30:08 PST 2024
Author: Simon Pilgrim
Date: 2024-02-24T15:19:12Z
New Revision: d877ab1b99496feb48db1158963abd130e2aee5c
URL: https://github.com/llvm/llvm-project/commit/d877ab1b99496feb48db1158963abd130e2aee5c
DIFF: https://github.com/llvm/llvm-project/commit/d877ab1b99496feb48db1158963abd130e2aee5c.diff
LOG: MachineInstr - update TargetRegisterInfo arguments comments. NFC.
"TargetRegisterInfo is passed" -> "TargetRegisterInfo is non-null" - matches the term in the rest of the header.
Added:
Modified:
llvm/include/llvm/CodeGen/MachineInstr.h
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/MachineInstr.h b/llvm/include/llvm/CodeGen/MachineInstr.h
index bd72ac23fc9c08..5bb4a67555222e 100644
--- a/llvm/include/llvm/CodeGen/MachineInstr.h
+++ b/llvm/include/llvm/CodeGen/MachineInstr.h
@@ -1438,7 +1438,7 @@ class MachineInstr
unsigned getBundleSize() const;
/// Return true if the MachineInstr reads the specified register.
- /// If TargetRegisterInfo is passed, then it also checks if there
+ /// If TargetRegisterInfo is non-null, then it also checks if there
/// is a read of a super-register.
/// This does not count partial redefines of virtual registers as reads:
/// %reg1024:6 = OP.
@@ -1461,7 +1461,7 @@ class MachineInstr
SmallVectorImpl<unsigned> *Ops = nullptr) const;
/// Return true if the MachineInstr kills the specified register.
- /// If TargetRegisterInfo is passed, then it also checks if there is
+ /// If TargetRegisterInfo is non-null, then it also checks if there is
/// a kill of a super-register.
bool killsRegister(Register Reg,
const TargetRegisterInfo *TRI = nullptr) const {
@@ -1469,7 +1469,7 @@ class MachineInstr
}
/// Return true if the MachineInstr fully defines the specified register.
- /// If TargetRegisterInfo is passed, then it also checks
+ /// If TargetRegisterInfo is non-null, then it also checks
/// if there is a def of a super-register.
/// NOTE: It's ignoring subreg indices on virtual registers.
bool definesRegister(Register Reg,
@@ -1486,7 +1486,7 @@ class MachineInstr
}
/// Returns true if the register is dead in this machine instruction.
- /// If TargetRegisterInfo is passed, then it also checks
+ /// If TargetRegisterInfo is non-null, then it also checks
/// if there is a dead def of a super-register.
bool registerDefIsDead(Register Reg,
const TargetRegisterInfo *TRI = nullptr) const {
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