[llvm] [TTI][RISCV]Improve costs for whole vector reg extract/insert. (PR #80164)

[Luke Lau via llvm-commits]

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@@ -326,6 +326,18 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
     switch (Kind) {
     default:
       break;
+    case TTI::SK_InsertSubvector: {
+      auto *FSubTy = dyn_cast<FixedVectorType>(SubTp);
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lukel97 wrote:

Should we use cast instead of dyn_cast here to get the assertion?

https://github.com/llvm/llvm-project/pull/80164