[llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)

[Craig Topper via llvm-commits]

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@@ -491,8 +491,8 @@ class RISCVTargetLowering : public TargetLowering {
       SDValue X, ConstantSDNode *XC, ConstantSDNode *CC, SDValue Y,
       unsigned OldShiftOpcode, unsigned NewShiftOpcode,
       SelectionDAG &DAG) const override;
-  /// Return true if the (vector) instruction I will be lowered to an instruction
-  /// with a scalar splat operand for the given Operand number.
+  /// Return true if the (vector) instruction I will be lowered to an
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topperc wrote:

Don't reformat unrelated code

https://github.com/llvm/llvm-project/pull/82914