[llvm] [TTI][RISCV]Improve costs for whole vector reg extract/insert. (PR #80164)
Alexey Bataev via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 19 13:42:26 PST 2024
================
@@ -442,6 +454,9 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
return LT.first *
getRISCVInstructionCost(RISCV::VSLIDEDOWN_VI, LT.second, CostKind);
case TTI::SK_InsertSubvector:
+ if (Index == 0 && any_of(Args, UndefValue::classof))
----------------
alexey-bataev wrote:
Added, thanks!
https://github.com/llvm/llvm-project/pull/80164
More information about the llvm-commits
mailing list