[llvm] [WIP][AMDGPU] Split `isInlinableLiteral16` into three and call the specific version if possible (PR #81345)

[Shilei Tian via llvm-commits]

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@@ -99,39 +99,39 @@ define i32 @inline_A_constraint_H1() {
 ; VI-LABEL: {{^}}inline_A_constraint_H2:
 ; VI: v_mov_b32 {{v[0-9]+}}, 0x3c00
 define i32 @inline_A_constraint_H2() {
-  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 bitcast (half 1.0 to i16))
+  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(trunc i32 bitcast (float 1.0 to i32) to i16)
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shiltian wrote:

But the thing is, we have an inline asm constraint `A` here, which indeed requires the operand should be an inline literal. Now we only know the type of the operand is `i16`, but for floating-point inline literal, it can be either FP16 or BF16. Like you said, what we actually see is `0x3C00`, but w/o enough information, we can't know whether it is the `half 1.0` or something else.

https://github.com/llvm/llvm-project/pull/81345