[llvm] [TTI][RISCV]Improve costs for whole vector reg extract/insert. (PR #80164)

[Alexey Bataev via llvm-commits]

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@@ -326,6 +326,18 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
     switch (Kind) {
     default:
       break;
+    case TTI::SK_InsertSubvector:
+      if (auto *FSubTy = dyn_cast<FixedVectorType>(SubTp)) {
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alexey-bataev wrote:

Ok, will co, tried to add an extra level of protection here

https://github.com/llvm/llvm-project/pull/80164