[llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)

[Sander de Smalen via llvm-commits]

================
@@ -213,11 +213,9 @@ body:             |
 
     ; EXPAND-LABEL: name: spills_fills_stack_id_virtreg_pnr
     ; EXPAND: renamable $pn8 = WHILEGE_CXX_B
-    ; EXPAND: $p0 = ORR_PPzPP $p8, $p8, killed $p8
-    ; EXPAND: STR_PXI killed renamable $p0, $sp, 7
+    ; EXPAND: STR_PXI killed renamable $pn8, $sp, 7
----------------
sdesmalen-arm wrote:

If you add ` -verify-machineinstrs` to the RUN line, this test will fail with:
```
*** Bad machine code: Illegal virtual register for instruction ***
- function:    spills_fills_stack_id_virtreg_pnr
- basic block: %bb.0 entry (0xaaaafbc96520) [0B;320B)
- instruction: 24B      STR_PXI %1:pnr_p8to15, %stack.0, 0 :: (store (s16) into %stack.0)
- operand 0:   %1:pnr_p8to15
Expected a PPR register, but got a PNR_p8to15 register

*** Bad machine code: Illegal virtual register for instruction ***
- function:    spills_fills_stack_id_virtreg_pnr
- basic block: %bb.0 entry (0xaaaafbc96520) [0B;320B)
- instruction: 280B     %2:pnr_p8to15 = LDR_PXI %stack.0, 0 :: (load (s16) from %stack.0)
- operand 0:   %2:pnr_p8to15
Expected a PPR register, but got a PNR_p8to15 register
```

That's because the instructions only accept PPR registers. You'll probably need to change the instruction definitions to accept both registers.

https://github.com/llvm/llvm-project/pull/81716