The Week Of Monday 6 May 2024 Archives by author
Starting: Mon May 6 00:02:00 PDT 2024
Ending: Sun May 12 23:59:11 PDT 2024
Messages: 4635
- [llvm] [workflows] Port buildkite Windows config to GitHub actions (PR #82093)
Aaron Ballman via llvm-commits
- [llvm] [workflows] Port buildkite Windows config to GitHub actions (PR #82093)
Aaron Ballman via llvm-commits
- [llvm] [bazel] Fix layering_check with macOS targets (PR #91260)
Aaron Siddhartha Mondal via llvm-commits
- [llvm] [bazel] Move HostMacOSXPrivateHeaders to macOS only dep (PR #91354)
Aaron Siddhartha Mondal via llvm-commits
- [llvm] [bazel] Rework liblldb (PR #91549)
Aaron Siddhartha Mondal via llvm-commits
- [llvm] [bazel] Rework liblldb (PR #91549)
Aaron Siddhartha Mondal via llvm-commits
- [llvm] [bazel] Rework liblldb (PR #91549)
Aaron Siddhartha Mondal via llvm-commits
- [llvm] [bazel] Rework liblldb (PR #91549)
Aaron Siddhartha Mondal via llvm-commits
- [llvm] [bazel] Codesign debugserver on macOS (PR #91789)
Aaron Siddhartha Mondal via llvm-commits
- [flang] [llvm] [flang][OMPIRBuilder] Keep debug location in sync with insert point. (PR #89953)
Abid Qadeer via llvm-commits
- [flang] [llvm] [flang][OMPIRBuilder] Keep debug location in sync with insert point. (PR #89953)
Abid Qadeer via llvm-commits
- [flang] [llvm] [flang][OMPIRBuilder] Keep debug location in sync with insert point. (PR #89953)
Abid Qadeer via llvm-commits
- [llvm] [bazel] Fix layering_check with macOS targets (PR #91260)
Adrian Kuegel via llvm-commits
- [llvm] [NVPTX] Add support for atomic add for bf16 type (PR #89586)
Adrian Kuegel via llvm-commits
- [llvm] [NVPTX] Add support for atomic add for bf16 type (PR #89586)
Adrian Kuegel via llvm-commits
- [llvm] [NVPTX] Add support for atomic add for bf16 type (PR #89586)
Adrian Kuegel via llvm-commits
- [llvm] [bazel] Fix new CodeGen dep (PR #91654)
Adrian Kuegel via llvm-commits
- [clang] [llvm] [DebugInfo] Use DW_op_bit_piece for structured bindings of bitfields (PR #85665)
Adrian Prantl via llvm-commits
- [clang] [llvm] [DebugInfo] Use DW_op_bit_piece for structured bindings of bitfields (PR #85665)
Adrian Prantl via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Adrian Prantl via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Adrian Prantl via llvm-commits
- [clang] [llvm] [DebugInfo] Use DW_op_bit_piece for structured bindings of bitfields (PR #85665)
Adrian Prantl via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Adrian Prantl via llvm-commits
- [llvm] Merge sourcelocation in CSEMIRBuilder::getDominatingInstrForID. (PR #90922)
Adrian Prantl via llvm-commits
- [llvm] Introduce DIExpression::foldConstantMath() (PR #71718)
Adrian Prantl via llvm-commits
- [llvm] Introduce DIExpression::foldConstantMath() (PR #71718)
Adrian Prantl via llvm-commits
- [llvm] Introduce DIExpression::foldConstantMath() (PR #71718)
Adrian Prantl via llvm-commits
- [llvm] [CMAKE][llvm-libraries] Add Precompiled Headers option to improve build times (PR #91755)
Adrian Prantl via llvm-commits
- [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)
Ahmed Bougacha via llvm-commits
- [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)
Ahmed Bougacha via llvm-commits
- [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)
Ahmed Bougacha via llvm-commits
- [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)
Ahmed Bougacha via llvm-commits
- [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)
Ahmed Bougacha via llvm-commits
- [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)
Ahmed Bougacha via llvm-commits
- [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)
Ahmed Bougacha via llvm-commits
- [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)
Ahmed Bougacha via llvm-commits
- [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)
Ahmed Bougacha via llvm-commits
- [llvm] [AArch64][PAC] Lower authenticated calls with ptrauth bundles. (PR #85736)
Ahmed Bougacha via llvm-commits
- [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)
Ahmed Bougacha via llvm-commits
- [llvm] [AArch64][PAC] Lower auth/resign into checked sequence. (PR #79024)
Ahmed Bougacha via llvm-commits
- [llvm] [workflows] Port buildkite Windows config to GitHub actions (PR #82093)
Aiden Grossman via llvm-commits
- [clang] [llvm] [mlir] [OpenMP] Migrate GPU Reductions CodeGen from Clang to OMPIRBuilder (PR #80343)
Akash Banerjee via llvm-commits
- [clang] [llvm] [mlir] [OpenMP] Migrate GPU Reductions CodeGen from Clang to OMPIRBuilder (PR #80343)
Akash Banerjee via llvm-commits
- [llvm] [coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (PR #90265)
Alan Zhao via llvm-commits
- [llvm] [coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (PR #90265)
Alan Zhao via llvm-commits
- [llvm] [coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (PR #90265)
Alan Zhao via llvm-commits
- [llvm] [coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (PR #90265)
Alan Zhao via llvm-commits
- [llvm] [coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (PR #90265)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
Alan Zhao via llvm-commits
- [llvm] [ADT] Add back ability to compare StringSet (PR #91374)
Aleksandr Platonov via llvm-commits
- [llvm] [ADT] Add back ability to compare StringSet (PR #91374)
Aleksandr Platonov via llvm-commits
- [llvm] [ADT] Add back ability to compare StringSet (PR #91374)
Aleksandr Platonov via llvm-commits
- [llvm] Add interface to check if a call has a deopt bundle (NFC) (PR #91348)
Aleksandr Popov via llvm-commits
- [llvm] Add interface to check if a call has a deopt bundle (NFC) (PR #91348)
Aleksandr Popov via llvm-commits
- [llvm] Add interface to check if a call has a deopt bundle (NFC) (PR #91348)
Aleksandr Popov via llvm-commits
- [llvm] Add interface to check if a call has a deopt bundle (NFC) (PR #91348)
Aleksandr Popov via llvm-commits
- [llvm] [LSR] Provide TTI hook to enable dropping solutions deemed to be unprofitable (PR #89924)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Enable TTI::shouldDropLSRSolutionIfLessProfitable by default (PR #89927)
Alex Bradbury via llvm-commits
- [llvm] [InstCombine] Prefer to keep power-of-2 constants when combining ashr exact and slt/ult of a constant (PR #86111)
Alex Bradbury via llvm-commits
- [llvm] [RISCV][TTI][RFC] Conservatively enable partial loop unrolling for single block loops (PR #91332)
Alex Bradbury via llvm-commits
- [lld] [llvm] [RISCV] Support RISCV Atomics ABI attributes (PR #84597)
Alex Bradbury via llvm-commits
- [lld] [llvm] Reapply "[RISCV] Support RISCV Atomics ABI attributes (#84597)" (PR #90266)
Alex Bradbury via llvm-commits
- [llvm] 452f439 - [InstCombine] Precommit tests for #86111
Alex Bradbury via llvm-commits
- [llvm] [InstCombine] Prefer to keep power-of-2 constants when combining ashr exact and slt/ult of a constant (PR #86111)
Alex Bradbury via llvm-commits
- [llvm] [InstCombine] Prefer to keep power-of-2 constants when combining ashr exact and slt/ult of a constant (PR #86111)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Add imply rules for zcd/zcf. (PR #91342)
Alex Bradbury via llvm-commits
- [llvm] [RISCV] Don't pre-split before the loop in parseNormalizedArchString. (PR #91684)
Alex Bradbury via llvm-commits
- [llvm] [NVPTX] support immediate values in st.param instructions (PR #91523)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] support immediate values in st.param instructions (PR #91523)
Alex MacLean via llvm-commits
- [clang] [llvm] [mlir] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)
Alex Voicu via llvm-commits
- [clang] [llvm] [mlir] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)
Alex Voicu via llvm-commits
- [clang] [llvm] [mlir] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)
Alex Voicu via llvm-commits
- [clang] [llvm] [mlir] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)
Alex Voicu via llvm-commits
- [clang] [llvm] [mlir] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)
Alex Voicu via llvm-commits
- [clang] [llvm] [mlir] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)
Alex Voicu via llvm-commits
- [clang] [llvm] [clang][SPIR-V] Add support for AMDGCN flavoured SPIRV (PR #89796)
Alex Voicu via llvm-commits
- [clang] [llvm] [mlir] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)
Alex Voicu via llvm-commits
- [clang] [llvm] [clang][SPIR-V] Add support for AMDGCN flavoured SPIRV (PR #89796)
Alex Voicu via llvm-commits
- [clang] [llvm] [clang][SPIR-V] Add support for AMDGCN flavoured SPIRV (PR #89796)
Alex Voicu via llvm-commits
- [clang] [llvm] [clang][SPIR-V] Add support for AMDGCN flavoured SPIRV (PR #89796)
Alex Voicu via llvm-commits
- [clang] [llvm] [clang][SPIR-V] Add support for AMDGCN flavoured SPIRV (PR #89796)
Alex Voicu via llvm-commits
- [clang] [llvm] [clang][SPIR-V] Add support for AMDGCN flavoured SPIRV (PR #89796)
Alex Voicu via llvm-commits
- [clang] [llvm] [mlir] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)
Alex Voicu via llvm-commits
- [clang] [llvm] [mlir] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)
Alex Voicu via llvm-commits
- [clang] [llvm] [mlir] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)
Alex Voicu via llvm-commits
- [clang] [llvm] [mlir] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)
Alex Voicu via llvm-commits
- [clang] [llvm] [mlir] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)
Alexander Richardson via llvm-commits
- [llvm] [BOLT][DWARF] Refactor helper functions that update DW_AT_comp_dir/DW_AT_dwo_name (PR #91237)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Refactor helper functions that update DW_AT_comp_dir/DW_AT_dwo_name (PR #91237)
Alexander Yermolovich via llvm-commits
- [llvm] [utils] Add script to generate elaborated assembly tests (PR #89026)
Alexander Yermolovich via llvm-commits
- [llvm] [utils] Add script to generate elaborated assembly tests (PR #89026)
Alexander Yermolovich via llvm-commits
- [llvm] [utils] Add script to generate elaborated assembly tests (PR #89026)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Updated DW_AT_comp_dir/DW_AT_dwo_name for DWO TUs. (PR #91486)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Updated DW_AT_comp_dir/DW_AT_dwo_name for DWO TUs. (PR #91486)
Alexander Yermolovich via llvm-commits
- [llvm] [BOLT][DWARF] Updated DW_AT_comp_dir/DW_AT_dwo_name for DWO TUs. (PR #91486)
Alexander Yermolovich via llvm-commits
- [llvm] [Support] Handle delete_pending case for Windows fs::status (PR #90655)
Alexandre Ganea via llvm-commits
- [llvm] [Support] Handle delete_pending case for Windows fs::status (PR #90655)
Alexandre Ganea via llvm-commits
- [llvm] [Support] Handle delete_pending case for Windows fs::status (PR #90655)
Alexandre Ganea via llvm-commits
- [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)
Alexandre Ganea via llvm-commits
- [llvm] [Support] Handle delete_pending case for Windows fs::status (PR #90655)
Alexandre Ganea via llvm-commits
- [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)
Alexandre Ganea via llvm-commits
- [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)
Alexandre Ganea via llvm-commits
- [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)
Alexandre Ganea via llvm-commits
- [llvm] d584df6 - [SLP][NFC]Add a test with incorrect smin analysis for minimal bitwidth, NFC.
Alexey Bataev via llvm-commits
- [llvm] a476032 - [SLP]Fix PR91025: correctly handle smin/smax of signed operands.
Alexey Bataev via llvm-commits
- [llvm] [SLP]Transform stores + reverse to strided stores with stride -1, if profitable. (PR #90464)
Alexey Bataev via llvm-commits
- [llvm] c144157 - [SLP]Use last pointer instead of first for reversed strided stores.
Alexey Bataev via llvm-commits
- [llvm] [SLP]Transform stores + reverse to strided stores with stride -1, if profitable. (PR #90464)
Alexey Bataev via llvm-commits
- [clang] [llvm] [WIP][OpenMP] Remove dependency on `libffi` from offloading runtime (PR #91264)
Alexey Bataev via llvm-commits
- [clang] [llvm] [WIP][OpenMP] Remove dependency on `libffi` from offloading runtime (PR #91264)
Alexey Bataev via llvm-commits
- [clang] [llvm] [WIP][OpenMP] Remove dependency on `libffi` from offloading runtime (PR #91264)
Alexey Bataev via llvm-commits
- [llvm] 5d9b549 - [SLP][NFC]Add a test showing incorrect signedness detection in sext nodes.
Alexey Bataev via llvm-commits
- [llvm] f00f294 - [SLP]Fix PR91309: Do not consider SExt as always producing signed result.
Alexey Bataev via llvm-commits
- [clang] [llvm] [WIP][OpenMP] Remove dependency on `libffi` from offloading runtime (PR #91264)
Alexey Bataev via llvm-commits
- [clang] [llvm] [WIP][OpenMP] Remove dependency on `libffi` from offloading runtime (PR #91264)
Alexey Bataev via llvm-commits
- [clang] [llvm] [WIP][OpenMP] Remove dependency on `libffi` from offloading runtime (PR #91264)
Alexey Bataev via llvm-commits
- [llvm] [LV]Set tailfolding styles before computing feasible max VF. (PR #91403)
Alexey Bataev via llvm-commits
- [clang] [llvm] [WIP][OpenMP] Remove dependency on `libffi` from offloading runtime (PR #91264)
Alexey Bataev via llvm-commits
- [llvm] 2475efa - [SLP]Fix PR91467: Look through scalar cast, when trying to cast to another type.
Alexey Bataev via llvm-commits
- [llvm] 58a94b1 - [SLP]Fix PR91467: Look through scalar cast, when trying to cast to another type.
Alexey Bataev via llvm-commits
- [llvm] [LV]Set tailfolding styles before computing feasible max VF. (PR #91403)
Alexey Bataev via llvm-commits
- [llvm] [AArch64][GlobalISel] Push ADD/SUB through Extend Instructions (PR #90964)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Push ADD/SUB through Extend Instructions (PR #90964)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Push ADD/SUB through Extend Instructions (PR #90964)
Amara Emerson via llvm-commits
- [llvm] [GlobalIsel] Combine extract vector element (PR #90339)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Select G_ICMP Zero Instruction (PR #90054)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Select G_ICMP Zero Instruction (PR #90054)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Select G_ICMP instruction through TableGen (PR #89932)
Amara Emerson via llvm-commits
- [llvm] [AArch64][SME] Fix frame lowering not using a base pointer for SME functions. (PR #91643)
Amara Emerson via llvm-commits
- [clang] [compiler-rt] [libcxx] [libunwind] [lld] [llvm] [mlir] [openmp] release/18.x: [AArc64][GlobalISel] Fix legalizer assert for G_INSERT_VECTOR_ELT - manual merge (PR #91672)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Select G_ICMP instruction through TableGen (PR #89932)
Amara Emerson via llvm-commits
- [llvm] [AArch64][GlobalISel] Select G_ICMP instruction through TableGen (PR #89932)
Amara Emerson via llvm-commits
- [llvm] [AArch64][SME] Fix frame lowering not using a base pointer for SME functions. (PR #91643)
Amara Emerson via llvm-commits
- [llvm] [AArch64][SME] Fix frame lowering not using a base pointer for SME functions. (PR #91643)
Amara Emerson via llvm-commits
- [llvm] [AArch64] Clarify atomic load/store size condition (NFCI) (PR #91907)
Amara Emerson via llvm-commits
- [llvm] [CMAKE][llvm-libraries] Add Precompiled Headers option to improve build times (PR #91755)
Ameer J via llvm-commits
- [llvm] [CMAKE][llvm-libraries] Add Precompiled Headers option to improve build times (PR #91755)
Ameer J via llvm-commits
- [llvm] [CMAKE][llvm-libraries] Add Precompiled Headers option to improve build times (PR #91755)
Ameer J via llvm-commits
- [llvm] [CMAKE][llvm-libraries] Add Precompiled Headers option to improve build times (PR #91755)
Ameer J via llvm-commits
- [llvm] [CMAKE][llvm-libraries] Add Precompiled Headers option to improve build times (PR #91755)
Ameer J via llvm-commits
- [llvm] [CMAKE][llvm-libraries] Add Precompiled Headers option to improve build times (PR #91755)
Ameer J via llvm-commits
- [llvm] [BOLT][NFCI] Use FileSymbols for local symbol disambiguation (PR #89088)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][DWARF] Refactor helper functions that update DW_AT_comp_dir/DW_AT_dwo_name (PR #91237)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Fix boltedcollection and no_lbr order in fdata writer and parser (PR #86501)
Amir Ayupov via llvm-commits
- [llvm] [NFC][BOLT] Remove dead code (SPTAllocatorsId) (PR #91477)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Ignore returns in DataAggregator (PR #90807)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Ignore returns in DataAggregator (PR #90807)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Ignore returns in DataAggregator (PR #90807)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Add HasInternalCalls BinaryFunction property (PR #90804)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Add HasInternalCalls BinaryFunction property (PR #90804)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFCI] Use heuristic for matching split global functions (PR #90429)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFCI] Use heuristic for matching split global functions (PR #90429)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFCI] Use heuristic for matching split global functions (PR #90429)
Amir Ayupov via llvm-commits
- [llvm] [NFC] Apply absorption rule to boolean expression (PR #91540)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Add test case for PIC fixed indirect jump (PR #91547)
Amir Ayupov via llvm-commits
- [llvm] [BOLT] Remove original relocs when moving JTs in relocation mode (PR #91656)
Amir Ayupov via llvm-commits
- [llvm] [BOLT][NFC] Rename DispExpr to JTBaseDispExpr in analyzeIndirectBranch (PR #91659)
Amir Ayupov via llvm-commits
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Arthur Eubanks via llvm-commits
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Arthur Eubanks via llvm-commits
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Arthur Eubanks via llvm-commits
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Arthur Eubanks via llvm-commits
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Arthur Eubanks via llvm-commits
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- [llvm] [SelectionDAG] Fold (icmp eq/ne (shift X, C), 0) -> (icmp eq/ne X, 0) (PR #88801)
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- [llvm] [SelectionDAG] Fold (icmp eq/ne (shift X, C), 0) -> (icmp eq/ne X, 0) (PR #88801)
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- [llvm] [SelectionDAG] Fold (icmp eq/ne (shift X, C), 0) -> (icmp eq/ne X, 0) (PR #88801)
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- [llvm] [SelectionDAG] Fold (icmp eq/ne (shift X, C), 0) -> (icmp eq/ne X, 0) (PR #88801)
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- [llvm] [SelectionDAG] Fold (icmp eq/ne (shift X, C), 0) -> (icmp eq/ne X, 0) (PR #88801)
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- [clang] [llvm] [RISCV] Bump Zaamo and Zalrsc to version 1.0 (PR #91556)
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- [clang] [llvm] [WebAssembly] Implement prototype f32.load_f16 instruction. (PR #90906)
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- [clang] [llvm] [WebAssembly] Implement prototype f32.store_f16 instruction. (PR #91545)
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- [clang] [llvm] [WebAssembly] Implement prototype f32.store_f16 instruction. (PR #91545)
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- [clang] [llvm] [WebAssembly] Implement prototype f32.store_f16 instruction. (PR #91545)
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- [clang] [llvm] [WebAssembly] Implement prototype f32.store_f16 instruction. (PR #91545)
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- [llvm] 662267d - [PPC] add testcase, nfc
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- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
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- [llvm] [DirectX] remove string function attribute DXIL not allowed (PR #90778)
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- [llvm] [DirectX] Fix DXIL part header version encoding (PR #91506)
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- [llvm] [NFC] CoroElide: Refactor `Lowerer` into `CoroIdElider` (PR #91539)
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- [llvm] [NFC] CoroElide: Refactor `Lowerer` into `CoroIdElider` (PR #91539)
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- [llvm] [MIPS] Implement llvm.fminimum and llvm.fmaximum with f32/f64 (PR #89907)
Cinhi Young via llvm-commits
- [llvm] [llvm][Support] ListeningSocket::accept returns operation_canceled if FD is set to -1 (PR #89479)
Connor Sughrue via llvm-commits
- [llvm] [llvm][Support] ListeningSocket::accept returns operation_canceled if FD is set to -1 (PR #89479)
Connor Sughrue via llvm-commits
- [llvm] [llvm][Support] ListeningSocket::accept returns operation_canceled if FD is set to -1 (PR #89479)
Connor Sughrue via llvm-commits
- [llvm] [DirectX] Replace bitfield version in ProgramHeader. (PR #91797)
Cooper Partin via llvm-commits
- [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function/macro to free up a bit slot (PR #82787)
Corbin Robeck via llvm-commits
- [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function/macro to free up a bit slot (PR #82787)
Corbin Robeck via llvm-commits
- [llvm] [GISel][RISCV] Legalize G_CONSTANT_FOLD_BARRIER (PR #89960)
Craig Topper via llvm-commits
- [llvm] [Analysis] Add cost model for experimental.cttz.elts intrinsic (PR #90720)
Craig Topper via llvm-commits
- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #90295)
Craig Topper via llvm-commits
- [llvm] [DAGCombiner] Set shift flags during visit. (PR #91239)
Craig Topper via llvm-commits
- [llvm] [DAGCombiner] Set shift flags during visit. (PR #91239)
Craig Topper via llvm-commits
- [llvm] [DAGCombiner] Set shift flags during visit. (PR #91239)
Craig Topper via llvm-commits
- [llvm] [RISCV] Optimize pattern `(setcc (selectLT (vfirst_vl ...) , 0, EVL, ...), EVL)` (PR #90538)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add imply rules for zcd/zcf. (PR #91342)
Craig Topper via llvm-commits
- [llvm] [DAGCombiner] Set shift flags during visit. (PR #91239)
Craig Topper via llvm-commits
- [llvm] [RISCV][GlobalISel] Fix selectShiftMask when shift mask is created from G_AND (PR #89602)
Craig Topper via llvm-commits
- [llvm] [RISCV] Remove hasSideEffects=1 for vsetvli pseudos (PR #91319)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use software guarded branch for indirect jump table branch. (PR #66762)
Craig Topper via llvm-commits
- [llvm] [Analysis] Add cost model for experimental.cttz.elts intrinsic (PR #90720)
Craig Topper via llvm-commits
- [llvm] [RISCV] Codegen support for XCVbi extension (PR #89719)
Craig Topper via llvm-commits
- [llvm] [DAGCombiner] Be more careful about looking through extends and trunc… (PR #91375)
Craig Topper via llvm-commits
- [llvm] [DAGCombiner] Be more careful about looking through extends and trunc… (PR #91375)
Craig Topper via llvm-commits
- [llvm] 6cba93f - [RISCV] Add partial validation of S and X extension names to RISCVISAInfo::parseNormalizedArchString.
Craig Topper via llvm-commits
- [llvm] 117bda5 - [RISCV] Add unittests for MinVLen/MaxELen/MaxElenFp for ParseArchString. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV] Don't crash if parseNormalizedArchString encounters a multi-letter extension with an unknown prefix. (PR #91398)
Craig Topper via llvm-commits
- [llvm] [RISCV] Optimize pattern `(setcc (selectLT (vfirst_vl ...) , 0, EVL, ...), EVL)` (PR #90538)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use 'riscv-isa' module flag to set ELF flags and attributes. (PR #85155)
Craig Topper via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Craig Topper via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Craig Topper via llvm-commits
- [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)
Craig Topper via llvm-commits
- [llvm] [RISCV] Detect duplicate extensions in parseNormalizedArchString. (PR #91416)
Craig Topper via llvm-commits
- [llvm] [RISCV] Detect duplicate extensions in parseNormalizedArchString. (PR #91416)
Craig Topper via llvm-commits
- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #90295)
Craig Topper via llvm-commits
- [llvm] [RISCV] Detect duplicate extensions in parseNormalizedArchString. (PR #91416)
Craig Topper via llvm-commits
- [llvm] [RISCV] Rewrite spill-fpr-scalar.ll test to not use vsetvli. NFC (PR #91428)
Craig Topper via llvm-commits
- [llvm] [RISCV] Detect duplicate extensions in parseNormalizedArchString. (PR #91416)
Craig Topper via llvm-commits
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Craig Topper via llvm-commits
- [llvm] [RISCV] Don't crash if parseNormalizedArchString encounters a multi-letter extension with an unknown prefix. (PR #91398)
Craig Topper via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Allow extra underscores in parseNormalizedArchString and parseArchString. (PR #91532)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Allow extra underscores in parseNormalizedArchString and parseArchString. (PR #91532)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Allow extra underscores in parseNormalizedArchString and parseArchString. (PR #91532)
Craig Topper via llvm-commits
- [llvm] [RISCV] Don't use std::vector<std::string> for split extensions in RISCVISAInfo::parseArchString. NFC (PR #91538)
Craig Topper via llvm-commits
- [llvm] [RISCV] Don't use std::vector<std::string> for split extensions in RISCVISAInfo::parseArchString. NFC (PR #91538)
Craig Topper via llvm-commits
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Craig Topper via llvm-commits
- [llvm] [x86] Add tan intrinsic part 4 (PR #90503)
Craig Topper via llvm-commits
- [llvm] [x86] Add tan intrinsic part 4 (PR #90503)
Craig Topper via llvm-commits
- [llvm] c0b5a96 - [RISCV] Add tests where we could use Zbs instructions in constant materialization. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV] Improve use of BSETI in constant materialization. (PR #91546)
Craig Topper via llvm-commits
- [llvm] 36d8b37 - [RISCV] Add another missed Zbs constant materialization test. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV] Improve use of BSETI in constant materialization. (PR #91546)
Craig Topper via llvm-commits
- [llvm] [RISCV] Improve use of BSETI/BCLRI in constant materialization. (PR #91546)
Craig Topper via llvm-commits
- [llvm] [RISCV] Improve use of BSETI/BCLRI in constant materialization. (PR #91546)
Craig Topper via llvm-commits
- [llvm] [RISCV] Don't use std::vector<std::string> for split extensions in RISCVISAInfo::parseArchString. NFC (PR #91538)
Craig Topper via llvm-commits
- [llvm] [RISCV] Improve use of BSETI/BCLRI in constant materialization. (PR #91546)
Craig Topper via llvm-commits
- [llvm] [RISCV] Improve use of BSETI/BCLRI in constant materialization. (PR #91546)
Craig Topper via llvm-commits
- [llvm] [RISCV] Improve use of BSETI/BCLRI in constant materialization. (PR #91546)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Bump Zaamo and Zalrsc to version 1.0 (PR #91556)
Craig Topper via llvm-commits
- [llvm] [RISCV] Improve use of BSETI/BCLRI in constant materialization. (PR #91546)
Craig Topper via llvm-commits
- [llvm] [RISCV] Improve use of BSETI/BCLRI in constant materialization. (PR #91546)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Bump Zaamo and Zalrsc to version 1.0 (PR #91556)
Craig Topper via llvm-commits
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Craig Topper via llvm-commits
- [llvm] 666970c - [RISCV] Remove unnecessary initialization from RISCVPostRAExpandPseudo pass constructor.
Craig Topper via llvm-commits
- [llvm] [RISC-V] Limit vscale interleaving to addrspace 0. (PR #91573)
Craig Topper via llvm-commits
- [llvm] [RISC-V] Limit vscale interleaving to addrspace 0. (PR #91573)
Craig Topper via llvm-commits
- [llvm] [RISCV] Inhibit DAG folding shl through zext.w pattern with zba (PR #91626)
Craig Topper via llvm-commits
- [llvm] [RISCV] Inhibit DAG folding shl through zext.w pattern with zba (PR #91626)
Craig Topper via llvm-commits
- [llvm] [RISCV] Inhibit DAG folding shl through zext.w pattern with zba (PR #91626)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add isel special case for (and (shl X, c2), c1) -> (slli_uw (srli x, c4-c2), c4). (PR #91638)
Craig Topper via llvm-commits
- [llvm] [RISCV] Inhibit DAG folding shl through zext.w pattern with zba (PR #91626)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add isel special case for (and (shl X, c2), c1) -> (slli_uw (srli x, c4-c2), c4). (PR #91638)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add isel special case for (and (shl X, c2), c1) -> (slli_uw (srli x, c4-c2), c4). (PR #91638)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add isel special case for (and (shl X, c2), c1) -> (slli_uw (srli x, c4-c2), c4). (PR #91638)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add isel special case for (and (shl X, c2), c1) -> (slli_uw (srli x, c4-c2), c4). (PR #91638)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add isel special case for (and (shl X, c2), c1) -> (slli_uw (srli x, c4-c2), c4). (PR #91638)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add isel special case for (and (shl X, c2), c1) -> (slli_uw (srli x, c4-c2), c4). (PR #91638)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add isel special case for (and (shl X, c2), c1) -> (slli_uw (srli x, c4-c2), c4). (PR #91638)
Craig Topper via llvm-commits
- [clang] [llvm] [RISCV] Allow extra underscores in parseNormalizedArchString and parseArchString. (PR #91532)
Craig Topper via llvm-commits
- [llvm] [RISCV] Sink vector select splat operands (PR #91554)
Craig Topper via llvm-commits
- [llvm] [RISCV] Don't pre-split before the loop in parseNormalizedArchString. (PR #91684)
Craig Topper via llvm-commits
- [llvm] e069bb7 - [RISCV] Use map::count instead of hasExtension in RISCVISAInfo::updateCombination. NFC
Craig Topper via llvm-commits
- [clang] [llvm] [X86][Driver] Do not add `-evex512` for `-march=native` when the target doesn't support AVX512 (PR #91694)
Craig Topper via llvm-commits
- [llvm] [RISCV] Don't pre-split before the loop in parseNormalizedArchString. (PR #91684)
Craig Topper via llvm-commits
- [llvm] [RISCV][TTI] Support fdiv/udiv/sdiv/srem/urem in getArithmeticInstrCost (PR #89170)
Craig Topper via llvm-commits
- [clang] [lld] [llvm] [RISCV] Support .note.gnu.property for enable Zicfiss and Zicfilp extension (PR #77414)
Craig Topper via llvm-commits
- [clang] [lld] [llvm] [RISCV] Support .note.gnu.property for enable Zicfiss and Zicfilp extension (PR #77414)
Craig Topper via llvm-commits
- [llvm] [VP][RISCV] Add vp.reduce.fmaximum/fminimum and its RISC-V codegen (PR #91782)
Craig Topper via llvm-commits
- [llvm] [VP][RISCV] Add vp.reduce.fmaximum/fminimum and its RISC-V codegen (PR #91782)
Craig Topper via llvm-commits
- [clang] [lld] [llvm] [RISCV] Support .note.gnu.property for enable Zicfiss and Zicfilp extension (PR #77414)
Craig Topper via llvm-commits
- [llvm] 7237bef - [RISCV] Use map::count instead of hasExtension in computeDefaultABI. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV][CostModel] Add cost model for experimental.cttz.elts (PR #91778)
Craig Topper via llvm-commits
- [llvm] [VP][RISCV] Add vp.reduce.fmaximum/fminimum and its RISC-V codegen (PR #91782)
Craig Topper via llvm-commits
- [llvm] 30aa49c - [RISCV] Remove the pre-split from RISCVISAInfo::parseArchString. NFCI
Craig Topper via llvm-commits
- [llvm] [RISCV] Pass subvector type to isLegalInterleavedAccessType in getInterleavedMemoryOpCost. (PR #91825)
Craig Topper via llvm-commits
- [llvm] [RISCV] Pass subvector type to isLegalInterleavedAccessType in getInterleavedMemoryOpCost. (PR #91825)
Craig Topper via llvm-commits
- [llvm] [llvm][MachO] Fix integer truncation in rebase/bind parsing (PR #89337)
Cyndy Ishida via llvm-commits
- [llvm] [llvm][MachO] Fix integer truncation in rebase/bind parsing (PR #89337)
Cyndy Ishida via llvm-commits
- [llvm] [llvm][MachO] Fix integer truncation in rebase/bind parsing (PR #89337)
Cyndy Ishida via llvm-commits
- [clang] [llvm] [InstallAPI] Support mutually exclusive parse options (PR #90686)
Cyndy Ishida via llvm-commits
- [clang] [llvm] [DirectX] Set DXIL Version using shader model version in compilation target profile (PR #89823)
Damyan Pepper via llvm-commits
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Damyan Pepper via llvm-commits
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Damyan Pepper via llvm-commits
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Damyan Pepper via llvm-commits
- [llvm] [mlir] [mlir][ods] Add documentation on how to use sharded op definitions (NFC) (PR #89664)
Daniel Chen via llvm-commits
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Daniel Kiss via llvm-commits
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Daniel Kiss via llvm-commits
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Daniel Thornburgh via llvm-commits
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Daniel Thornburgh via llvm-commits
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Daniel Thornburgh via llvm-commits
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Daniel Thornburgh via llvm-commits
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Daniel Thornburgh via llvm-commits
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Daniel Thornburgh via llvm-commits
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Daniel Thornburgh via llvm-commits
- [lld] [LLD] Implement --enable-non-contiguous-regions (PR #90007)
Daniel Thornburgh via llvm-commits
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Daniel Thornburgh via llvm-commits
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Daniel Thornburgh via llvm-commits
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Daniel Thornburgh via llvm-commits
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Daniel Thornburgh via llvm-commits
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Daniel Thornburgh via llvm-commits
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Daniel Thornburgh via llvm-commits
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Daniel Thornburgh via llvm-commits
- [lld] [LLD] Implement --enable-non-contiguous-regions (PR #90007)
Daniel Thornburgh via llvm-commits
- [lld] [LLD] Implement --enable-non-contiguous-regions (PR #90007)
Daniel Thornburgh via llvm-commits
- [lld] [LLD] Implement --enable-non-contiguous-regions (PR #90007)
Daniel Thornburgh via llvm-commits
- [lld] [LLD] Implement --enable-non-contiguous-regions (PR #90007)
Daniel Thornburgh via llvm-commits
- [lld] [LLD] Implement --enable-non-contiguous-regions (PR #90007)
Daniel Thornburgh via llvm-commits
- [lld] [LLD] Implement --enable-non-contiguous-regions (PR #90007)
Daniel Thornburgh via llvm-commits
- [lld] [LLD] Implement --enable-non-contiguous-regions (PR #90007)
Daniel Thornburgh via llvm-commits
- [lld] [LLD] Implement --enable-non-contiguous-regions (PR #90007)
Daniel Thornburgh via llvm-commits
- [lld] [LLD] Implement --enable-non-contiguous-regions (PR #90007)
Daniel Thornburgh via llvm-commits
- [lld] [LLD] Implement --enable-non-contiguous-regions (PR #90007)
Daniel Thornburgh via llvm-commits
- [lld] [LLD] Implement --enable-non-contiguous-regions (PR #90007)
Daniel Thornburgh via llvm-commits
- [lld] [LLD] Implement --enable-non-contiguous-regions (PR #90007)
Daniel Thornburgh via llvm-commits
- [lld] [LLD] Implement --enable-non-contiguous-regions (PR #90007)
Daniel Thornburgh via llvm-commits
- [lld] [LLD] Implement --enable-non-contiguous-regions (PR #90007)
Daniel Thornburgh via llvm-commits
- [lld] [LLD] Implement --enable-non-contiguous-regions (PR #90007)
Daniel Thornburgh via llvm-commits
- [lld] [lld-macho] Add support for category names in ConcatInputSection's (PR #90850)
Danny Mösch via llvm-commits
- [llvm] [NFC] Move parameter into field (PR #91065)
Danny Mösch via llvm-commits
- [llvm] [NFC] Prefer `str.resize(len)` over `str.substr(0, len)` (PR #91067)
Danny Mösch via llvm-commits
- [llvm] [NFC] Prefer `str.resize(len)` over `str.substr(0, len)` (PR #91067)
Danny Mösch via llvm-commits
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Danny Mösch via llvm-commits
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Danny Mösch via llvm-commits
- [llvm] [BOLT][NFC] Apply absorption rule to boolean expression (PR #91540)
Danny Mösch via llvm-commits
- [llvm] [BOLT][NFC] Apply absorption rule to boolean expression (PR #91540)
Danny Mösch via llvm-commits
- [llvm] [NFC] Prefer `str.resize(len)` over `str.substr(0, len)` (PR #91067)
Danny Mösch via llvm-commits
- [llvm] [NFC] Prefer `str.resize(len)` over `str.substr(0, len)` (PR #91067)
Danny Mösch via llvm-commits
- [llvm] [DebugInfo] Only create DIEs of concrete functions (PR #90523)
David Blaikie via llvm-commits
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David Blaikie via llvm-commits
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David Blaikie via llvm-commits
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David Blaikie via llvm-commits
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David Blaikie via llvm-commits
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David Blaikie via llvm-commits
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David Blaikie via llvm-commits
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David Blaikie via llvm-commits
- [clang] [llvm] Add option to generate additional debug info for expression dereferencing pointer to pointers. (PR #81545)
David Blaikie via llvm-commits
- [llvm] [Support] Add end/error to decode[US]LEB128AndInc (PR #90006)
David Blaikie via llvm-commits
- [llvm] [Support] Add end/error to decode[US]LEB128AndInc (PR #90006)
David Blaikie via llvm-commits
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David Blaikie via llvm-commits
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David Blaikie via llvm-commits
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David Blaikie via llvm-commits
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David Blaikie via llvm-commits
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David Blaikie via llvm-commits
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David Blaikie via llvm-commits
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David Blaikie via llvm-commits
- [clang] [llvm] [MC,clang,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
David Blaikie via llvm-commits
- [clang] [llvm] [MC,clang,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
David Blaikie via llvm-commits
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David Blaikie via llvm-commits
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David Blaikie via llvm-commits
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David Blaikie via llvm-commits
- [clang] [llvm] [MC,clang,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
David Blaikie via llvm-commits
- [llvm] Add thread-local overrides for `llvm::errs()` and `llvm::outs()`. (PR #90374)
David Blaikie via llvm-commits
- [llvm] [gardening][DebugInfo][NFC] Improve comment on HashingDISubprogram test (PR #91543)
David Blaikie via llvm-commits
- [llvm] [gardening][DebugInfo][NFC] Improve comment on HashingDISubprogram test (PR #91543)
David Blaikie via llvm-commits
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David Blaikie via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
David Blaikie via llvm-commits
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David Blaikie via llvm-commits
- [llvm] Add option to log debugging to stdout (PR #91533)
David Blaikie via llvm-commits
- [llvm] Add option to log debugging to stdout (PR #91533)
David Blaikie via llvm-commits
- [llvm] Add option to log debugging to stdout (PR #91533)
David Blaikie via llvm-commits
- [llvm] e50060f - [AArch64][GlobalISel] Addition GISel test coverage for shuffles. NFC
David Green via llvm-commits
- [llvm] 363ec6f - [AArch64][GlobalISel] Common some shuffle mask functions.
David Green via llvm-commits
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David Green via llvm-commits
- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
David Green via llvm-commits
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David Green via llvm-commits
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- [llvm] [DAG] Fold add(mul(add(A, CA), CM), CB) -> add(mul(A, CM), CM*CA+CB) (PR #90860)
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- [llvm] [DAG] Fold add(mul(add(A, CA), CM), CB) -> add(mul(A, CM), CM*CA+CB) (PR #90860)
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- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
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- [llvm] [LoopVectorize] Add support for vectorisation of simple early exit loops (PR #88385)
David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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Eli Friedman via llvm-commits
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Eli Friedman via llvm-commits
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Eli Friedman via llvm-commits
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Eli Friedman via llvm-commits
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Eli Friedman via llvm-commits
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Eli Friedman via llvm-commits
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Eli Friedman via llvm-commits
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Eli Friedman via llvm-commits
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Eli Friedman via llvm-commits
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Eli Friedman via llvm-commits
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Eli Friedman via llvm-commits
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Florian Hahn via llvm-commits
- [llvm] [SCEV,LAA] Introduce scoped SCEV, use in LAA computations (WIP). (PR #90742)
Florian Hahn via llvm-commits
- [llvm] [SCEV,LAA] Introduce scoped SCEV, use in LAA computations (WIP). (PR #90742)
Florian Hahn via llvm-commits
- [llvm] [LV]Set tailfolding styles before computing feasible max VF. (PR #91403)
Florian Hahn via llvm-commits
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Florian Hahn via llvm-commits
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Florian Hahn via llvm-commits
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Florian Mayer via llvm-commits
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Florian Mayer via llvm-commits
- [llvm] Document FP relative offsets (PR #91031)
Florian Mayer via llvm-commits
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Florian Mayer via llvm-commits
- [llvm] [NFC] add explanation to register flags doc (PR #91803)
Florian Mayer via llvm-commits
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Franklin Zhang via llvm-commits
- [llvm] [AggressiveInstCombine] Inline strcmp/strncmp (PR #89371)
Franklin Zhang via llvm-commits
- [llvm] [AggressiveInstCombine] Inline strcmp/strncmp (PR #89371)
Franklin Zhang via llvm-commits
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Franklin Zhang via llvm-commits
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Franklin Zhang via llvm-commits
- [llvm] [AggressiveInstCombine] Fix strncmp inlining (PR #91204)
Franklin Zhang via llvm-commits
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Freddy Ye via llvm-commits
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Freddy Ye via llvm-commits
- [llvm] CodeGen: Add -denormal-fp-math-bf16 flag (PR #90425)
Freddy Ye via llvm-commits
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Freddy Ye via llvm-commits
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George Burgess IV via llvm-commits
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George Burgess IV via llvm-commits
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George Burgess IV via llvm-commits
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- [llvm] Add an all-in-one histogram intrinsic, along with lowering for AArch64 (PR #88106)
Graham Hunter via llvm-commits
- [llvm] Add an all-in-one histogram intrinsic, along with lowering for AArch64 (PR #88106)
Graham Hunter via llvm-commits
- [llvm] Add an all-in-one histogram intrinsic, along with lowering for AArch64 (PR #88106)
Graham Hunter via llvm-commits
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Graham Hunter via llvm-commits
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Graham Hunter via llvm-commits
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Graham Hunter via llvm-commits
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Graham Hunter via llvm-commits
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Graham Hunter via llvm-commits
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Graham Hunter via llvm-commits
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Graham Hunter via llvm-commits
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Graham Hunter via llvm-commits
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Haojian Wu via llvm-commits
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Haojian Wu via llvm-commits
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Haojian Wu via llvm-commits
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Haojian Wu via llvm-commits
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Haojian Wu via llvm-commits
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Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Haopeng Liu via llvm-commits
- [llvm] [RemoveDIs] Fix remapping of DbgLabelRecords. (PR #91447)
Harald van Dijk via llvm-commits
- [llvm] [RemoveDIs] Fix remapping of DbgLabelRecords. (PR #91447)
Harald van Dijk via llvm-commits
- [llvm] [RemoveDIs] Fix remapping of DbgLabelRecords. (PR #91447)
Harald van Dijk via llvm-commits
- [llvm] [RemoveDIs] Fix remapping of DbgLabelRecords. (PR #91447)
Harald van Dijk via llvm-commits
- [llvm] [RemoveDIs] Fix remapping of DbgLabelRecords. (PR #91447)
Harald van Dijk via llvm-commits
- [llvm] [RemoveDIs] Change remapDbgVariableRecord to remapDbgRecord (PR #91456)
Harald van Dijk via llvm-commits
- [llvm] [RemoveDIs] Change remapDbgVariableRecord to remapDbgRecord (PR #91456)
Harald van Dijk via llvm-commits
- [llvm] [RemoveDIs] Change remapDbgVariableRecord to remapDbgRecord (PR #91456)
Harald van Dijk via llvm-commits
- [llvm] Add unit test for CloneModule and #dbg_label (PR #91463)
Harald van Dijk via llvm-commits
- [llvm] [RemoveDIs] Change remapDbgVariableRecord to remapDbgRecord (PR #91456)
Harald van Dijk via llvm-commits
- [llvm] Add unit test for CloneModule and #dbg_label (PR #91463)
Harald van Dijk via llvm-commits
- [llvm] Add unit test for CloneModule and #dbg_label (PR #91463)
Harald van Dijk via llvm-commits
- [llvm] [RemoveDIs] Change remapDbgVariableRecord to remapDbgRecord (PR #91456)
Harald van Dijk via llvm-commits
- [llvm] [RemoveDIs] Change remapDbgVariableRecord to remapDbgRecord (PR #91456)
Harald van Dijk via llvm-commits
- [llvm] [RemoveDIs] Change remapDbgVariableRecord to remapDbgRecord (PR #91456)
Harald van Dijk via llvm-commits
- [llvm] [RISC-V] Limit vscale interleaving to addrspace 0. (PR #91573)
Harald van Dijk via llvm-commits
- [llvm] [RISC-V] Limit vscale interleaving to addrspace 0. (PR #91573)
Harald van Dijk via llvm-commits
- [llvm] [RISC-V] Limit vscale interleaving to addrspace 0. (PR #91573)
Harald van Dijk via llvm-commits
- [llvm] [RISC-V] Limit vscale interleaving to addrspace 0. (PR #91573)
Harald van Dijk via llvm-commits
- [llvm] [RISC-V] Limit vscale interleaving to addrspace 0. (PR #91573)
Harald van Dijk via llvm-commits
- [llvm] [RISC-V] Limit vscale interleaving to addrspace 0. (PR #91573)
Harald van Dijk via llvm-commits
- [llvm] [AArch64] Improve code generation for experimental.cttz.elts (PR #91505)
Hari Limaye via llvm-commits
- [llvm] [AArch64] Improve code generation for experimental.cttz.elts (PR #91505)
Hari Limaye via llvm-commits
- [llvm] [AArch64] Improve code generation for experimental.cttz.elts (PR #91505)
Hari Limaye via llvm-commits
- [llvm] [AArch64] Improve code generation for experimental.cttz.elts (PR #91505)
Hari Limaye via llvm-commits
- [llvm] [AArch64] Improve code generation for experimental.cttz.elts (PR #91505)
Hari Limaye via llvm-commits
- [llvm] [AArch64] Improve code generation for experimental.cttz.elts (PR #91505)
Hari Limaye via llvm-commits
- [llvm] [AArch64] Improve code generation for experimental.cttz.elts (PR #91505)
Hari Limaye via llvm-commits
- [llvm] [AArch64] Improve code generation for experimental.cttz.elts (PR #91505)
Hari Limaye via llvm-commits
- [llvm] [AArch64] Improve code generation for experimental.cttz.elts (PR #91505)
Hari Limaye via llvm-commits
- [llvm] [AArch64] Improve code generation for experimental.cttz.elts (PR #91505)
Hari Limaye via llvm-commits
- [llvm] [AArch64] Improve code generation for experimental.cttz.elts (PR #91505)
Hari Limaye via llvm-commits
- [clang] [llvm] [AArch64] Add intrinsics for bflaot16 min/max/minnm/maxnm (PR #90105)
Hassnaa Hamdi via llvm-commits
- [clang] [llvm] [AArch64] Add intrinsics for bfloat16 min/max/minnm/maxnm (PR #90105)
Hassnaa Hamdi via llvm-commits
- [clang] [llvm] [AArch64] Add intrinsics for bfloat16 min/max/minnm/maxnm (PR #90105)
Hassnaa Hamdi via llvm-commits
- [llvm] [CodeGen] Regen some old tests; NFC (PR #91250)
Heejin Ahn via llvm-commits
- [clang] [llvm] [WebAssembly] Implement prototype f32.load_f16 instruction. (PR #90906)
Heejin Ahn via llvm-commits
- [clang] [llvm] [WebAssembly] Implement prototype f32.store_f16 instruction. (PR #91545)
Heejin Ahn via llvm-commits
- [clang] [llvm] [WebAssembly] Implement prototype f32.store_f16 instruction. (PR #91545)
Heejin Ahn via llvm-commits
- [clang] [llvm] [WebAssembly] Implement prototype f32.store_f16 instruction. (PR #91545)
Heejin Ahn via llvm-commits
- [clang] [llvm] [WebAssembly] Implement prototype f32.store_f16 instruction. (PR #91545)
Heejin Ahn via llvm-commits
- [clang] [llvm] [WebAssembly] Implement prototype f32.store_f16 instruction. (PR #91545)
Heejin Ahn via llvm-commits
- [clang] [llvm] [WebAssembly] Implement prototype f32.store_f16 instruction. (PR #91545)
Heejin Ahn via llvm-commits
- [llvm] [Offload] Add MPI Plugin (PR #90890)
Hervé Yviquel via llvm-commits
- [llvm] [Offload] Add MPI Plugin (PR #90890)
Hervé Yviquel via llvm-commits
- [llvm] [RISCV][GlobalISel] Fix selectShiftMask when shift mask is created from G_AND (PR #89602)
Hongbin Jin via llvm-commits
- [llvm] [RISCV][GlobalISel] Fix selectShiftMask when shift mask is created from G_AND (PR #89602)
Hongbin Jin via llvm-commits
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Hongbin Jin via llvm-commits
- [llvm] [llvm][CodeGen] Add a new software pipeliner 'Window Scheduler' (PR #84443)
Hua Tian via llvm-commits
- [llvm] [llvm][CodeGen] Add a new software pipeliner 'Window Scheduler' (PR #84443)
Hua Tian via llvm-commits
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Hua Tian via llvm-commits
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Hua Tian via llvm-commits
- [llvm] [llvm][CodeGen] Add a new software pipeliner 'Window Scheduler' (PR #84443)
Hua Tian via llvm-commits
- [llvm] [llvm][CodeGen] Add a new software pipeliner 'Window Scheduler' (PR #84443)
Hua Tian via llvm-commits
- [llvm] [llvm][CodeGen] Add a new software pipeliner 'Window Scheduler' (PR #84443)
Hua Tian via llvm-commits
- [llvm] [llvm][CodeGen] Add a new software pipeliner 'Window Scheduler' (PR #84443)
Hua Tian via llvm-commits
- [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)
Hubert Tong via llvm-commits
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Hubert Tong via llvm-commits
- [clang] [llvm] [C++23] [CLANG] Adding C++23 constexpr math functions: fmin, fmax and frexp. (PR #88978)
Hubert Tong via llvm-commits
- [clang] [llvm] [C++23] [CLANG] Adding C++23 constexpr math functions: fmin, fmax and frexp. (PR #88978)
Hubert Tong via llvm-commits
- [clang] [llvm] [C++23] [CLANG] Adding C++23 constexpr math functions: fmin, fmax and frexp. (PR #88978)
Hubert Tong via llvm-commits
- [clang] [llvm] [C++23] [CLANG] Adding C++23 constexpr math functions: fmin, fmax and frexp. (PR #88978)
Hubert Tong via llvm-commits
- [clang] [clang-tools-extra] [llvm] [clang][modules] stdarg.h and stddef.h shouldn't directly declare anything (PR #90676)
Ian Anderson via llvm-commits
- [llvm] [CommandLine] Set the 'ValueStr' with the selected argument (PR #90816)
Igor Kudrin via llvm-commits
- [llvm] [AMDGPU][RFC] Combine asm and disasm tests. (PR #90214)
Ivan Kosarev via llvm-commits
- [llvm] [AMDGPU][RFC] Combine asm and disasm tests. (PR #90214)
Ivan Kosarev via llvm-commits
- [llvm] [AMDGPU][RFC] Combine asm and disasm tests. (PR #90214)
Ivan Kosarev via llvm-commits
- [llvm] [AMDGPU][RFC] Combine asm and disasm tests. (PR #90214)
Ivan Kosarev via llvm-commits
- [llvm] [AMDGPU][RFC] Combine asm and disasm tests. (PR #90214)
Ivan Kosarev via llvm-commits
- [llvm] [AMDGPU][RFC] Combine asm and disasm tests. (PR #90214)
Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
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Ivan Kosarev via llvm-commits
- [llvm] [llvm] Use StringRef::operator== instead of StringRef::equals (NFC) (PR #91441)
J. Ryan Stinnett via llvm-commits
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J. Ryan Stinnett via llvm-commits
- [llvm] [DebugInfo][IndVarSimplify] fix missing debug location updates (PR #91443)
J. Ryan Stinnett via llvm-commits
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J. Ryan Stinnett via llvm-commits
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J. Ryan Stinnett via llvm-commits
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J. Ryan Stinnett via llvm-commits
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J. Ryan Stinnett via llvm-commits
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J. Ryan Stinnett via llvm-commits
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J. Ryan Stinnett via llvm-commits
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J. Ryan Stinnett via llvm-commits
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J. Ryan Stinnett via llvm-commits
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J. Ryan Stinnett via llvm-commits
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J. Ryan Stinnett via llvm-commits
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J. Ryan Stinnett via llvm-commits
- [llvm] [DebugInfo][JumpThreading] Fix missing debug location updates (PR #91581)
J. Ryan Stinnett via llvm-commits
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J. Ryan Stinnett via llvm-commits
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J. Ryan Stinnett via llvm-commits
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Jack Styles via llvm-commits
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Jakub Kuderski via llvm-commits
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James Y Knight via llvm-commits
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Jamie Schmeiser via llvm-commits
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Jamie Schmeiser via llvm-commits
- [lld] [llvm] Revert "Reapply "Use an abbrev to reduce size of VALUE_GUID records in ThinLTO summaries" (#90610)" (PR #91194)
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- [lld] [llvm] Revert "Reapply "Use an abbrev to reduce size of VALUE_GUID records in ThinLTO summaries" (#90610)" (PR #91194)
Jan Voung via llvm-commits
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Jan Voung via llvm-commits
- [llvm] [ThinLTO][BitcodeWriter] Write import type in per-module combined summary (PR #87600)
Jan Voung via llvm-commits
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Jan Voung via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Jan Voung via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Jan Voung via llvm-commits
- [llvm] Add the 'initializes' attribute langref and support (PR #84803)
Jan Voung via llvm-commits
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Jan Voung via llvm-commits
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Jan Voung via llvm-commits
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Janek van Oirschot via llvm-commits
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Janek van Oirschot via llvm-commits
- [llvm] MCExpr-ify amd_kernel_code_t (PR #91587)
Janek van Oirschot via llvm-commits
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Janek van Oirschot via llvm-commits
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Janek van Oirschot via llvm-commits
- [llvm] MCExpr-ify SIProgramInfo (PR #88257)
Janek van Oirschot via llvm-commits
- [llvm] [AMDGPU] Fix unittest linking error with `LLVM_LINK_LLVM_DYLIB` (PR #91727)
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Janek van Oirschot via llvm-commits
- [llvm] e2c8925 - [AMDGPU] Fix typo in function name
Jay Foad via llvm-commits
- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
Jay Foad via llvm-commits
- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Extend llvm.amdgcn.update.dpp intrinsic to support f64 (PR #91190)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [TII][NFC] Add renamable bit to copyPhysReg (PR #91179)
Jay Foad via llvm-commits
- [llvm] [TII][NFC] Add renamable bit to copyPhysReg (PR #91179)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [AMDGPU] Disallow negative s_load offsets in isLegalAddressingMode (PR #91327)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Disallow negative s_load offsets in isLegalAddressingMode (PR #91327)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [InstCombine] Fold fcmp ogt (x - y), 0 into fcmp ogt x, y #85245 (PR #85506)
Jay Foad via llvm-commits
- [llvm] [TableGen] Fix regunit superset calculation (PR #81850)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Extend llvm.amdgcn.update.dpp intrinsic to support f64 (PR #91190)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Extend llvm.amdgcn.update.dpp intrinsic to support f64 (PR #91190)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [AMDGPU] Disallow negative s_load offsets in isLegalAddressingMode (PR #91327)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #89165)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #89165)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #89165)
Jay Foad via llvm-commits
- [llvm] RFC: [AMDGPU] Check subtarget features for consistency (PR #86957)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Use mangling-agnostic form of IRBuilder::CreateIntrinsic. NFC. (PR #87638)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] RFC: [AMDGPU] Check subtarget features for consistency (PR #86957)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Jay Foad via llvm-commits
- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
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Jay Foad via llvm-commits
- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Jay Foad via llvm-commits
- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
Jay Foad via llvm-commits
- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
Jay Foad via llvm-commits
- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Build lane intrinsics in a mangling-agnostic way. NFC. (PR #91583)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Use mangling-agnostic form of IRBuilder::CreateIntrinsic. NFC. (PR #87638)
Jay Foad via llvm-commits
- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
Jay Foad via llvm-commits
- [llvm] AMDGPU: fix isSafeToSink expecting exactly one predecessor (PR #89224)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Remove unnecessary predicates from aliases. NFC. (PR #91602)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Remove unnecessary predicates from aliases. NFC. (PR #91602)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [AMDGPU] Create AMDGPUMnemonicAlias tablegen class (PR #89288)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Create AMDGPUMnemonicAlias tablegen class (PR #89288)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Create AMDGPUMnemonicAlias tablegen class (PR #89288)
Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
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Jay Foad via llvm-commits
- [llvm] [AMDGPU] Remove unnecessary predicates from aliases. NFC. (PR #91602)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Remove unnecessary predicates from aliases. NFC. (PR #91602)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Remove unnecessary predicates from aliases. NFC. (PR #91602)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Remove unnecessary predicates from aliases. NFC. (PR #91602)
Jay Foad via llvm-commits
- [llvm] [DAG] Use copysign in frem power-2 fold. (PR #91751)
Jay Foad via llvm-commits
- [llvm] [AMDGPU] Exclude certain opcodes from being marked as single use (PR #91802)
Jay Foad via llvm-commits
- [llvm] [SeparateConstOffsetFromGEP] Support GEP reordering for different types (PR #90802)
Jeffrey Byrnes via llvm-commits
- [llvm] [SeparateConstOffsetFromGEP] Support GEP reordering for different types (PR #90802)
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Jeffrey Byrnes via llvm-commits
- [llvm] [SeparateConstOffsetFromGEP] Support GEP reordering for different types (PR #90802)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Vectorize more 16 bit shuffles (PR #90648)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Vectorize more 16 bit shuffles (PR #90648)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Add and optionally use GCNIterativeRPTrackers (PR #88797)
Jeffrey Byrnes via llvm-commits
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Jeffrey Byrnes via llvm-commits
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Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] RFC: Add and optionally use GCNIterativeRPTrackers (PR #88797)
Jeffrey Byrnes via llvm-commits
- [llvm] [SeparateConstOffsetFromGEP] Support GEP reordering for different types (PR #90802)
Jeffrey Byrnes via llvm-commits
- [llvm] [SeparateConstOffsetFromGEP] Support GEP reordering for different types (PR #90802)
Jeffrey Byrnes via llvm-commits
- [llvm] [SeparateConstOffsetFromGEP] Support GEP reordering for different types (PR #90802)
Jeffrey Byrnes via llvm-commits
- [llvm] [SeparateConstOffsetFromGEP] Support GEP reordering for different types (PR #90802)
Jeffrey Byrnes via llvm-commits
- [llvm] [SeparateConstOffsetFromGEP] Support GEP reordering for different types (PR #90802)
Jeffrey Byrnes via llvm-commits
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Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Vectorize more 16 bit shuffles (PR #90648)
Jeffrey Byrnes via llvm-commits
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Jeffrey Byrnes via llvm-commits
- [llvm] [SeparateConstOffsetFromGEP] Support GEP reordering for different types (PR #90802)
Jeffrey Byrnes via llvm-commits
- [llvm] [SeparateConstOffsetFromGEP] Support GEP reordering for different types (PR #90802)
Jeffrey Byrnes via llvm-commits
- [llvm] [AMDGPU] Fix an issue that wrong index is used in calculation of byte provider when the op is extract_vector_elt (PR #91697)
Jeffrey Byrnes via llvm-commits
- [llvm] [Support] Handle delete_pending case for Windows fs::status (PR #90655)
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Jeremy Day via llvm-commits
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Jeremy Day via llvm-commits
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Jeremy Day via llvm-commits
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Jeremy Day via llvm-commits
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Jeremy Day via llvm-commits
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Jeremy Day via llvm-commits
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Jeremy Day via llvm-commits
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- [llvm] [mlir] Poly canonicalization (PR #91410)
Jeremy Kun via llvm-commits
- [llvm] [mlir] Poly canonicalization (PR #91410)
Jeremy Kun via llvm-commits
- [llvm] [mlir] Poly canonicalization (PR #91410)
Jeremy Kun via llvm-commits
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Jeremy Kun via llvm-commits
- [llvm] [mlir] Add constant propagation for polynomial ops (PR #91655)
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- [lld] [llvm] MIPS: Use pcrel|sdata4 for eh_frame (PR #91291)
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- [lld] [llvm] MIPS: Use pcrel|sdata4 for eh_frame (PR #91291)
Jessica Clarke via llvm-commits
- [lld] [llvm] MIPS: Use pcrel|sdata4 for eh_frame (PR #91291)
Jessica Clarke via llvm-commits
- [llvm] [RISCV] Add imply rules for zcd/zcf. (PR #91342)
Jessica Clarke via llvm-commits
- [clang] [llvm] [mlir] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)
Jessica Clarke via llvm-commits
- [clang] [llvm] [mlir] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)
Jessica Clarke via llvm-commits
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Jessica Clarke via llvm-commits
- [clang] [llvm] [RISCV] Teach .option arch to support experimental extensions. (PR #89727)
Jessica Clarke via llvm-commits
- [clang] [llvm] [RISCV] Allow extra underscores in parseNormalizedArchString and parseArchString. (PR #91532)
Jessica Clarke via llvm-commits
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Jhonatan Cléto via llvm-commits
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Jhonatan Cléto via llvm-commits
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Jhonatan Cléto via llvm-commits
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Jhonatan Cléto via llvm-commits
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Jhonatan Cléto via llvm-commits
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Jhonatan Cléto via llvm-commits
- [llvm] [Offload] Add MPI Plugin (PR #90890)
Jhonatan Cléto via llvm-commits
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Jianjian Guan via llvm-commits
- [llvm] [AVR][NFC] Improve format of target description files (PR #91296)
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Jinsong Ji via llvm-commits
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Jinsong Ji via llvm-commits
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Jinsong Ji via llvm-commits
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Jinsong Ji via llvm-commits
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Jinsong Ji via llvm-commits
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Jinsong Ji via llvm-commits
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Jinsong Ji via llvm-commits
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Jinsong Ji via llvm-commits
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Jinsong Ji via llvm-commits
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Jinsong Ji via llvm-commits
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Jinsong Ji via llvm-commits
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Jinsong Ji via llvm-commits
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Joe Nash via llvm-commits
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Joe Nash via llvm-commits
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Joe Nash via llvm-commits
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Joe Nash via llvm-commits
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Joe Nash via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
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Joseph Huber via llvm-commits
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Joseph Huber via llvm-commits
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Joseph Huber via llvm-commits
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Justin Bogner via llvm-commits
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- [clang] [llvm] [LLVM] Add IRNormalizer Pass (PR #68176)
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Kai Nacke via llvm-commits
- [llvm] [yaml2obj][GOFF] Fix writing GOFF header (PR #91383)
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- [lld] [llvm] Reapply "Use an abbrev to reduce size of VALUE_GUID records in ThinLTO summaries" (#90610) (PR #90692)
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- [llvm] promote Pseduo Opcode from 32bit to 64bits after eliminating the `extsw` instruction in PPCMIPeepholes optimization (PR #85451)
Kamau Bridgeman via llvm-commits
- [llvm] promote Pseduo Opcode from 32bit to 64bits after eliminating the `extsw` instruction in PPCMIPeepholes optimization (PR #85451)
Kamau Bridgeman via llvm-commits
- [llvm] promote Pseduo Opcode from 32bit to 64bits after eliminating the `extsw` instruction in PPCMIPeepholes optimization (PR #85451)
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- [llvm] promote Pseduo Opcode from 32bit to 64bits after eliminating the `extsw` instruction in PPCMIPeepholes optimization (PR #85451)
Kamau Bridgeman via llvm-commits
- [llvm] promote Pseduo Opcode from 32bit to 64bits after eliminating the `extsw` instruction in PPCMIPeepholes optimization (PR #85451)
Kamau Bridgeman via llvm-commits
- [llvm] promote Pseduo Opcode from 32bit to 64bits after eliminating the `extsw` instruction in PPCMIPeepholes optimization (PR #85451)
Kamau Bridgeman via llvm-commits
- [llvm] promote Pseduo Opcode from 32bit to 64bits after eliminating the `extsw` instruction in PPCMIPeepholes optimization (PR #85451)
Kamau Bridgeman via llvm-commits
- [llvm] promote Pseduo Opcode from 32bit to 64bits after eliminating the `extsw` instruction in PPCMIPeepholes optimization (PR #85451)
Kamau Bridgeman via llvm-commits
- [polly] [Polly] Data flow reduction detection to cover more cases (PR #84901)
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- [polly] [Polly] Data flow reduction detection to cover more cases (PR #84901)
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Karthika Devi C via llvm-commits
- [polly] [Polly] Data flow reduction detection to cover more cases (PR #84901)
Karthika Devi C via llvm-commits
- [llvm] [Analysis, CodeGen, DebugInfo] Use StringRef::operator== instead of StringRef::equals (NFC) (PR #91304)
Kazu Hirata via llvm-commits
- [llvm] [Analysis, CodeGen, DebugInfo] Use StringRef::operator== instead of StringRef::equals (NFC) (PR #91304)
Kazu Hirata via llvm-commits
- [llvm] [Analysis, CodeGen, DebugInfo] Use StringRef::operator== instead of StringRef::equals (NFC) (PR #91304)
Kazu Hirata via llvm-commits
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Kazu Hirata via llvm-commits
- [llvm] [llvm] Use StringRef::operator== instead of StringRef::equals (NFC) (PR #91441)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Make Version2 officially available (PR #91541)
Kazu Hirata via llvm-commits
- [llvm] [memprof] Make Version2 officially available (PR #91541)
Kazu Hirata via llvm-commits
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Kazu Hirata via llvm-commits
- [llvm] e6785fd - [Scalar] Fix a warning
Kazu Hirata via llvm-commits
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Kazu Hirata via llvm-commits
- [llvm] [bazel] Fix layering_check with macOS targets (PR #91260)
Keith Smiley via llvm-commits
- [llvm] [bazel] Fix layering_check with macOS targets (PR #91260)
Keith Smiley via llvm-commits
- [llvm] [bazel] Move HostMacOSXPrivateHeaders to macOS only dep (PR #91354)
Keith Smiley via llvm-commits
- [llvm] [bazel] Fix layering_check with macOS targets (PR #91260)
Keith Smiley via llvm-commits
- [llvm] [bazel] Move HostMacOSXPrivateHeaders to macOS only dep (PR #91354)
Keith Smiley via llvm-commits
- [llvm] [bazel] Rework liblldb (PR #91549)
Keith Smiley via llvm-commits
- [llvm] [bazel] Rework liblldb (PR #91549)
Keith Smiley via llvm-commits
- [llvm] [bazel] Rework liblldb (PR #91549)
Keith Smiley via llvm-commits
- [llvm] [bazel] Rework liblldb (PR #91549)
Keith Smiley via llvm-commits
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Keith Smiley via llvm-commits
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Keith Smiley via llvm-commits
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Keith Smiley via llvm-commits
- [llvm] [bazel] Fix new CodeGen dep (PR #91654)
Keith Smiley via llvm-commits
- [llvm] [bazel] Fix new CodeGen dep (PR #91654)
Keith Smiley via llvm-commits
- [llvm] [bazel] Codesign debugserver on macOS (PR #91789)
Keith Smiley via llvm-commits
- [llvm] [bazel] Codesign debugserver on macOS (PR #91789)
Keith Smiley via llvm-commits
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Keith Smiley via llvm-commits
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Keith Smiley via llvm-commits
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Keith Smiley via llvm-commits
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Keith Smiley via llvm-commits
- [llvm] [NFC][LLVM] Simplify SVE isel DAG patterns. (PR #91510)
Kerry McLaughlin via llvm-commits
- [llvm] [NFC][LLVM] Simplify SVE isel DAG patterns. (PR #91510)
Kerry McLaughlin via llvm-commits
- [llvm] [NFC][LLVM] Simplify SVE isel DAG patterns. (PR #91510)
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- [clang] [llvm] [AArch64][SME] Save VG for unwind info when changing streaming-mode (PR #83301)
Kerry McLaughlin via llvm-commits
- [clang] [llvm] [AArch64][SME] Save VG for unwind info when changing streaming-mode (PR #83301)
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- [clang] [llvm] [AArch64][SME] Save VG for unwind info when changing streaming-mode (PR #83301)
Kerry McLaughlin via llvm-commits
- [llvm] Reduce llvm-gsymutil memory usage (PR #91023)
Kevin Frei via llvm-commits
- [llvm] Reduce llvm-gsymutil memory usage (PR #91023)
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- [llvm] Reduce llvm-gsymutil memory usage (PR #91023)
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- [llvm] Reduce llvm-gsymutil memory usage (PR #91023)
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- [llvm] [flang][CMake] Add missing dependency to generate Fortran module files (PR #91517)
Kiran Chandramohan via llvm-commits
- [llvm] [flang][CMake] Add missing dependency to generate Fortran module files (PR #91517)
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- [llvm] [flang][CMake] Add missing dependency to generate Fortran module files (PR #91517)
Kiran Chandramohan via llvm-commits
- [llvm] [flang][CMake] Add missing dependency to generate Fortran module files (PR #91517)
Kiran Chandramohan via llvm-commits
- [llvm] [mlir] [mlir][OpenMP] - Honor dependencies in code-generation of the if clause in `omp.task` correctly (PR #90891)
Kiran Chandramohan via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Kiran Chandramohan via llvm-commits
- [llvm] [RISCV][CostModel] Remove inst cost of cmp inst in cmp-select sequence. (PR #91158)
Kito Cheng via llvm-commits
- [llvm] [RISCV][CostModel] Remove cost of icmp inst in icmp+select with SFB. (PR #91158)
Kito Cheng via llvm-commits
- [llvm] [RISCV][CostModel] Remove cost of icmp inst in icmp+select with SFB. (PR #91158)
Kito Cheng via llvm-commits
- [llvm] [LV] Avoid querying the cost of invalid operations (PR #89161)
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- [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)
Kolya Panchenko via llvm-commits
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- [llvm] [InstCombine] Fold copysign of selects from sign comparison to sign operand (PR #85627)
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- [llvm] [InstCombine] Fold copysign of selects from sign comparison to sign operand (PR #85627)
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- [llvm] [InstCombine] Fold copysign of selects from sign comparison to sign operand (PR #85627)
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- [llvm] [NFC][BOLT] Remove dead code (SPTAllocatorsId) (PR #91477)
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- [llvm] [NFC][BOLT] Remove dead code (SPTAllocatorsId) (PR #91477)
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- [llvm] [X86][BF16] Do not combine FP_TRUNC + FP_EXTEND if they come from user (PR #91420)
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- [llvm] [X86][BF16] Do not combine FP_TRUNC + FP_EXTEND if they come from user (PR #91420)
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- [llvm] [X86][BF16] Do not combine FP_TRUNC + FP_EXTEND if they come from user (PR #91420)
Krzysztof Drewniak via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
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Krzysztof Parzyszek via llvm-commits
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Krzysztof Parzyszek via llvm-commits
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Krzysztof Parzyszek via llvm-commits
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Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
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Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
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Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
- [llvm] [Frontend][OpenMP] Remove `reduction` from allowed clauses for `target` (PR #90754)
Krzysztof Parzyszek via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Krzysztof Parzyszek via llvm-commits
- [lld] [lld-macho] Fix category merging category map non-determinism (PR #91159)
Kyungwoo Lee via llvm-commits
- [lld] [lld-macho] Fix category merging category map non-determinism (PR #91159)
Kyungwoo Lee via llvm-commits
- [lld] [lld-macho] Fix category merging category map non-determinism (PR #91159)
Kyungwoo Lee via llvm-commits
- [lld] [lld-macho] Fix category merging category map non-determinism (PR #91159)
Kyungwoo Lee via llvm-commits
- [lld] [lld-macho] Fix category merging category map non-determinism (PR #91159)
Kyungwoo Lee via llvm-commits
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Kyungwoo Lee via llvm-commits
- [llvm] [CGData] llvm-cgdata (PR #89884)
Kyungwoo Lee via llvm-commits
- [llvm] [CGData] llvm-cgdata (PR #89884)
Kyungwoo Lee via llvm-commits
- [lld] [lld-macho] Fix category merging category map non-determinism (PR #91159)
Kyungwoo Lee via llvm-commits
- [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)
Kyungwoo Lee via llvm-commits
- [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)
Kyungwoo Lee via llvm-commits
- [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)
Kyungwoo Lee via llvm-commits
- [lld] [lld-macho] Add support for non-lazy categories to ObjC category merger (PR #91548)
Kyungwoo Lee via llvm-commits
- [llvm] d009bd7 - [gn build] Port 05f88b1769db
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- [llvm] c73516a - [ORC] Add tests for error handling paths in suspended generators.
Lang Hames via llvm-commits
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- [llvm] Merge sourcelocation in CSEMIRBuilder::getDominatingInstrForID. (PR #90922)
Matt Arsenault via llvm-commits
- [llvm] [NewPM][CodeGen] Refactoring CodeGenPassBuilder (PR #89708)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Fold add(mul(add(A, CA), CM), CB) -> add(mul(A, CM), CM*CA+CB) (PR #90860)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen] Allow mixed scalar type constraints for inline asm (PR #65465)
Matt Arsenault via llvm-commits
- [llvm] DAG: Skip 0 sign handling in minimum/maximum lowering for _ieee case (PR #91326)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Disallow negative s_load offsets in isLegalAddressingMode (PR #91327)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
Matt Arsenault via llvm-commits
- [llvm] f548c4d - AMDGPU: Add mode register use to s_getreg_b32
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Do not bitcast atomicrmw in IR (PR #90045)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add tests for vector rebroadcast. (PR #91322)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add tests for vector rebroadcast. (PR #91322)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add tests for vector rebroadcast. (PR #91322)
Matt Arsenault via llvm-commits
- [llvm] [SeparateConstOffsetFromGEP] Support GEP reordering for different types (PR #90802)
Matt Arsenault via llvm-commits
- [llvm] [SeparateConstOffsetFromGEP] Support GEP reordering for different types (PR #90802)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Disallow negative s_load offsets in isLegalAddressingMode (PR #91327)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Don't optimize agpr phis if the operand doesn't have subreg use (PR #91267)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Don't optimize agpr phis if the operand doesn't have subreg use (PR #91267)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Don't optimize agpr phis if the operand doesn't have subreg use (PR #91267)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Don't optimize agpr phis if the operand doesn't have subreg use (PR #91267)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Omit umin on ctlz/cttz if operand is non-zero. (PR #79127)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Extend llvm.amdgcn.update.dpp intrinsic to support f64 (PR #91190)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Extend llvm.amdgcn.update.dpp intrinsic to support f64 (PR #91190)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Extend llvm.amdgcn.update.dpp intrinsic to support f64 (PR #91190)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LTO] Introduce AMDGPUCloneModuleLDS (PR #89683)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LTO] Introduce AMDGPUCloneModuleLDS (PR #89683)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LTO] Introduce AMDGPUCloneModuleLDS (PR #89683)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LTO] Introduce AMDGPUCloneModuleLDS (PR #89683)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Do not bitcast atomicrmw in IR (PR #90045)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Don't optimize agpr phis if the operand doesn't have subreg use (PR #91267)
Matt Arsenault via llvm-commits
- [llvm] [Analysis] Attribute Range should not prevent tail call optimization (PR #91122)
Matt Arsenault via llvm-commits
- [llvm] [Analysis] Attribute Range should not prevent tail call optimization (PR #91122)
Matt Arsenault via llvm-commits
- [llvm] [Analysis] Attribute Range should not prevent tail call optimization (PR #91122)
Matt Arsenault via llvm-commits
- [llvm] [Analysis] Attribute Range should not prevent tail call optimization (PR #91122)
Matt Arsenault via llvm-commits
- [llvm] [Analysis] Attribute Range should not prevent tail call optimization (PR #91122)
Matt Arsenault via llvm-commits
- [llvm] [GISel] Fold bitreverse(shl/srl(bitreverse(x),y)) -> srl/shl(x,y) (PR #91355)
Matt Arsenault via llvm-commits
- [llvm] [GISel] Fold bitreverse(shl/srl(bitreverse(x),y)) -> srl/shl(x,y) (PR #91355)
Matt Arsenault via llvm-commits
- [llvm] [GISel] Fold bitreverse(shl/srl(bitreverse(x),y)) -> srl/shl(x,y) (PR #91355)
Matt Arsenault via llvm-commits
- [llvm] [GISel] Fold bitreverse(shl/srl(bitreverse(x),y)) -> srl/shl(x,y) (PR #91355)
Matt Arsenault via llvm-commits
- [llvm] [SeparateConstOffsetFromGEP] Support GEP reordering for different types (PR #90802)
Matt Arsenault via llvm-commits
- [llvm] [SeparateConstOffsetFromGEP] Support GEP reordering for different types (PR #90802)
Matt Arsenault via llvm-commits
- [llvm] [SeparateConstOffsetFromGEP] Support GEP reordering for different types (PR #90802)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Don't bitcast float typed atomic store in IR (PR #90116)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Don't bitcast float typed atomic store in IR (PR #90116)
Matt Arsenault via llvm-commits
- [llvm] AtomicExpand: Preserve metadata when expanding partword RMW (PR #89769)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Don't optimize agpr phis if the operand doesn't have subreg use (PR #91267)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LTO] Introduce AMDGPUCloneModuleLDS (PR #89683)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LTO] Introduce AMDGPUCloneModuleLDS (PR #89683)
Matt Arsenault via llvm-commits
- [llvm] [Analysis] Attribute Range should not prevent tail call optimization (PR #91122)
Matt Arsenault via llvm-commits
- [llvm] [Analysis] Attribute Range should not prevent tail call optimization (PR #91122)
Matt Arsenault via llvm-commits
- [llvm] [Analysis] Attribute Range should not prevent tail call optimization (PR #91122)
Matt Arsenault via llvm-commits
- [llvm] [Analysis] Attribute Range should not prevent tail call optimization (PR #91122)
Matt Arsenault via llvm-commits
- [llvm] [DAGCombiner] Be more careful about looking through extends and trunc… (PR #91375)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix condition in VOP3_Real_Base. NFCI. (PR #91373)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Prevent FMINIMUM and FMAXIMUM beeing fully scalarized (PR #91378)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Prevent FMINIMUM and FMAXIMUM beeing fully scalarized (PR #91378)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Prevent FMINIMUM and FMAXIMUM beeing fully scalarized (PR #91378)
Matt Arsenault via llvm-commits
- [llvm] Add interface to check if a call has a deopt bundle (NFC) (PR #91348)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Don't optimize agpr phis if the operand doesn't have subreg use (PR #91267)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Don't optimize agpr phis if the operand doesn't have subreg use (PR #91267)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Prevent FMINIMUM and FMAXIMUM beeing fully scalarized (PR #91378)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Canonicalize reassoc contract fmuladd to fmul + fadd (PR #90434)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
Matt Arsenault via llvm-commits
- [clang] [llvm] [modules] Accept equivalent module caches from different symlink (PR #90925)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Don't bitcast float typed atomic store in IR (PR #90116)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Vectorize more 16 bit shuffles (PR #90648)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Vectorize more 16 bit shuffles (PR #90648)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Vectorize more 16 bit shuffles (PR #90648)
Matt Arsenault via llvm-commits
- [llvm] [GISel][CombinerHelper] Push freeze through non-poison-producing operands (PR #90618)
Matt Arsenault via llvm-commits
- [llvm] [GISel][CombinerHelper] Push freeze through non-poison-producing operands (PR #90618)
Matt Arsenault via llvm-commits
- [llvm] [GISel][CombinerHelper] Push freeze through non-poison-producing operands (PR #90618)
Matt Arsenault via llvm-commits
- [llvm] [GISel][CombinerHelper] Push freeze through non-poison-producing operands (PR #90618)
Matt Arsenault via llvm-commits
- [llvm] [GISel][CombinerHelper] Push freeze through non-poison-producing operands (PR #90618)
Matt Arsenault via llvm-commits
- [llvm] [GISel][CombinerHelper] Push freeze through non-poison-producing operands (PR #90618)
Matt Arsenault via llvm-commits
- [llvm] [GISel][CombinerHelper] Push freeze through non-poison-producing operands (PR #90618)
Matt Arsenault via llvm-commits
- [llvm] [GISel][CombinerHelper] Push freeze through non-poison-producing operands (PR #90618)
Matt Arsenault via llvm-commits
- [llvm] [GISel][CombinerHelper] Push freeze through non-poison-producing operands (PR #90618)
Matt Arsenault via llvm-commits
- [llvm] [GISel][CombinerHelper] Push freeze through non-poison-producing operands (PR #90618)
Matt Arsenault via llvm-commits
- [llvm] [GISel][CombinerHelper] Push freeze through non-poison-producing operands (PR #90618)
Matt Arsenault via llvm-commits
- [llvm] [GlobalIsel] combine ext of trunc with flags (PR #87115)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen] Emit a more efficient magic number multiplication for exact udivs (PR #87161)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen] Emit a more efficient magic number multiplication for exact udivs (PR #87161)
Matt Arsenault via llvm-commits
- [llvm] [GlobalIsel][AArch64] legalize ptr add (PR #89218)
Matt Arsenault via llvm-commits
- [llvm] [GlobalIsel][AArch64] legalize ptr add (PR #89218)
Matt Arsenault via llvm-commits
- [llvm] [GlobalIsel][AArch64] legalize ptr add (PR #89218)
Matt Arsenault via llvm-commits
- [llvm] CodeGen: Add -denormal-fp-math-bf16 flag (PR #90425)
Matt Arsenault via llvm-commits
- [llvm] Merge sourcelocation in CSEMIRBuilder::getDominatingInstrForID. (PR #90922)
Matt Arsenault via llvm-commits
- [llvm] Merge sourcelocation in CSEMIRBuilder::getDominatingInstrForID. (PR #90922)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Add amdgpu-as MMRA for fences (PR #78572)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Add amdgpu-as MMRA for fences (PR #78572)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold fcmp ogt (x - y), 0 into fcmp ogt x, y #85245 (PR #85506)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold fcmp ogt (x - y), 0 into fcmp ogt x, y #85245 (PR #85506)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold fcmp ogt (x - y), 0 into fcmp ogt x, y #85245 (PR #85506)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold fcmp ogt (x - y), 0 into fcmp ogt x, y #85245 (PR #85506)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold fcmp ogt (x - y), 0 into fcmp ogt x, y #85245 (PR #85506)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold fcmp ogt (x - y), 0 into fcmp ogt x, y #85245 (PR #85506)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold copysign of selects from sign comparison to sign operand (PR #85627)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold copysign of selects from sign comparison to sign operand (PR #85627)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold copysign of selects from sign comparison to sign operand (PR #85627)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold copysign of selects from sign comparison to sign operand (PR #85627)
Matt Arsenault via llvm-commits
- [llvm] Add interface to check if a call has a deopt bundle (NFC) (PR #91348)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold copysign of selects from sign comparison to sign operand (PR #85627)
Matt Arsenault via llvm-commits
- [llvm] [LegalizeDAG] Optimize CodeGen for `ISD::CTLZ_ZERO_UNDEF` (PR #83039)
Matt Arsenault via llvm-commits
- [llvm] [LegalizeDAG] Optimize CodeGen for `ISD::CTLZ_ZERO_UNDEF` (PR #83039)
Matt Arsenault via llvm-commits
- [llvm] [GISel] Fold bitreverse(shl/srl(bitreverse(x),y)) -> srl/shl(x,y) (PR #91355)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][RFC] Combine asm and disasm tests. (PR #90214)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][RFC] Combine asm and disasm tests. (PR #90214)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][RFC] Combine asm and disasm tests. (PR #90214)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][RFC] Combine asm and disasm tests. (PR #90214)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][RFC] Combine asm and disasm tests. (PR #90214)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Canonicalize reassoc contract fmuladd to fmul + fadd (PR #90434)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Canonicalize reassoc contract fmuladd to fmul + fadd (PR #90434)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Use LSH for lowering ctlz_zero_undef.i8/i16 (PR #88512)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Use LSH for lowering ctlz_zero_undef.i8/i16 (PR #88512)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Use LSH for lowering ctlz_zero_undef.i8/i16 (PR #88512)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Extend llvm.amdgcn.update.dpp intrinsic to support f64 (PR #91190)
Matt Arsenault via llvm-commits
- [llvm] Attributor: Do not assume function context in AANoCapture (PR #91462)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Extend llvm.amdgcn.update.dpp intrinsic to support f64 (PR #91190)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen] Allow mixed scalar type constraints for inline asm (PR #65465)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen] Allow mixed scalar type constraints for inline asm (PR #65465)
Matt Arsenault via llvm-commits
- [llvm] [CodeGen] Emit a more efficient magic number multiplication for exact udivs (PR #87161)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Canonicalize reassoc contract fmuladd to fmul + fadd (PR #90434)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Use LSH for lowering ctlz_zero_undef.i8/i16 (PR #88512)
Matt Arsenault via llvm-commits
- [llvm] SystemZ: Handle gr128 to fp128 copies in copyPhysReg (PR #90861)
Matt Arsenault via llvm-commits
- [llvm] [TII][NFC] Add renamable bit to copyPhysReg (PR #91179)
Matt Arsenault via llvm-commits
- [llvm] [TII][NFC] Add renamable bit to copyPhysReg (PR #91179)
Matt Arsenault via llvm-commits
- [llvm] b5afda8 - AMDGPU: Add some more ctlz_zero_undef tests
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Use LSH for lowering ctlz_zero_undef.i8/i16 (PR #88512)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Disallow negative s_load offsets in isLegalAddressingMode (PR #91327)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Disallow negative s_load offsets in isLegalAddressingMode (PR #91327)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Disallow negative s_load offsets in isLegalAddressingMode (PR #91327)
Matt Arsenault via llvm-commits
- [llvm] [SelectionDAG] Fold (icmp eq/ne (shift X, C), 0) -> (icmp eq/ne X, 0) (PR #88801)
Matt Arsenault via llvm-commits
- [llvm] [Attributor][FIX] Replace AANoFPClass MBEC propagation (PR #91030)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Prefer vector i8s in PHI Nodes (PR #91016)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Prefer vector i8s in PHI Nodes (PR #91016)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Prefer vector i8s in PHI Nodes (PR #91016)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Improve select equiv fold for plain condition (PR #83405)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Improve select equiv fold for plain condition (PR #83405)
Matt Arsenault via llvm-commits
- [llvm] [WIP] Extend data layout to add sentinel pointer value for address space. (PR #83109)
Matt Arsenault via llvm-commits
- [llvm] [WIP] Extend data layout to add sentinel pointer value for address space. (PR #83109)
Matt Arsenault via llvm-commits
- [llvm] [WIP] Extend data layout to add sentinel pointer value for address space. (PR #83109)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Move LDS utilities from amdgpu-lower-module-lds pass to AMDGPUMemoryUtils (PR #88002)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Move LDS utilities from amdgpu-lower-module-lds pass to AMDGPUMemoryUtils (PR #88002)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Move LDS utilities from amdgpu-lower-module-lds pass to AMDGPUMemoryUtils (PR #88002)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Optimize `sinh` and `cosh` divisions (PR #81433)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Optimize `sinh` and `cosh` divisions (PR #81433)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Optimize `sinh` and `cosh` divisions (PR #81433)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Optimize `sinh` and `cosh` divisions (PR #81433)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Optimize `sinh` and `cosh` divisions (PR #81433)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Optimize `sinh` and `cosh` divisions (PR #81433)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Optimize `sinh` and `cosh` divisions (PR #81433)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)
Matt Arsenault via llvm-commits
- [clang] [llvm] [WIP] Expand variadic functions in IR (PR #89007)
Matt Arsenault via llvm-commits
- [clang] [llvm] [WIP] Expand variadic functions in IR (PR #89007)
Matt Arsenault via llvm-commits
- [clang] [llvm] [WIP] Expand variadic functions in IR (PR #89007)
Matt Arsenault via llvm-commits
- [llvm] RFC: [AMDGPU] Check subtarget features for consistency (PR #86957)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_sched_group_barrier to support rules. (PR #85304)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_sched_group_barrier to support rules. (PR #85304)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_sched_group_barrier to support rules. (PR #85304)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_sched_group_barrier to support rules. (PR #85304)
Matt Arsenault via llvm-commits
- [llvm] [SeparateConstOffsetFromGEP] Support GEP reordering for different types (PR #90802)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Create AMDGPUMnemonicAlias tablegen class (PR #89288)
Matt Arsenault via llvm-commits
- [llvm] DAG: Skip 0 sign handling in minimum/maximum lowering for _ieee case (PR #91326)
Matt Arsenault via llvm-commits
- [llvm] DAG: Skip 0 sign handling in minimum/maximum lowering for _ieee case (PR #91326)
Matt Arsenault via llvm-commits
- [llvm] RFC: [AMDGPU] Check subtarget features for consistency (PR #86957)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] GISelShouldIgnore .td uses (PR #90005)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
Matt Arsenault via llvm-commits
- [clang] [llvm] [clang][SPIR-V] Add support for AMDGCN flavoured SPIRV (PR #89796)
Matt Arsenault via llvm-commits
- [clang] [llvm] [clang][SPIR-V] Add support for AMDGCN flavoured SPIRV (PR #89796)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
Matt Arsenault via llvm-commits
- [llvm] [GISel] Fold bitreverse(shl/srl(bitreverse(x),y)) -> srl/shl(x,y) (PR #91355)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Fold add(mul(add(A, CA), CM), CB) -> add(mul(A, CM), CM*CA+CB) (PR #90860)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Fold add(mul(add(A, CA), CM), CB) -> add(mul(A, CM), CM*CA+CB) (PR #90860)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Fold add(mul(add(A, CA), CM), CB) -> add(mul(A, CM), CM*CA+CB) (PR #90860)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Fold add(mul(add(A, CA), CM), CB) -> add(mul(A, CM), CM*CA+CB) (PR #90860)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add VOP3_PACKED to V_PK_{MIN|MAX}IMUM_F16 profile (PR #91512)
Matt Arsenault via llvm-commits
- [clang] [llvm] [clang][SPIR-V] Add support for AMDGCN flavoured SPIRV (PR #89796)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Use mangling-agnostic form of IRBuilder::CreateIntrinsic. NFC. (PR #87638)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function/macro to free up a bit slot (PR #82787)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Fold add(mul(add(A, CA), CM), CB) -> add(mul(A, CM), CM*CA+CB) (PR #90860)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Enable "amdgpu-sw-lower-lds" pass in pipeline. (PR #89206)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Enable "amdgpu-sw-lower-lds" pass in pipeline. (PR #89206)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Enable "amdgpu-sw-lower-lds" pass in pipeline. (PR #89206)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Enable "amdgpu-sw-lower-lds" pass in pipeline. (PR #89206)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Remove Store when its Ptr is removable (PR #79565)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Remove Store when its Ptr is removable (PR #79565)
Matt Arsenault via llvm-commits
- [llvm] [ArgPromotion] Handle pointer arguments of recursive calls (PR #78735)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Remove Store when its Ptr is removable (PR #79565)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add support for preloading implicit kernel arguments (PR #83817)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add support for preloading implicit kernel arguments (PR #83817)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add support for preloading implicit kernel arguments (PR #83817)
Matt Arsenault via llvm-commits
- [llvm] [AArch64][GlobalISel] Push ADD/SUB through Extend Instructions (PR #90964)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Remove duplicate -mtriple options in tests (PR #91576)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Add description for new atomicrmw metadata (PR #85052)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Add amdgpu.no.remote.memory when upgrading old atomic intrinsics (PR #89655)
Matt Arsenault via llvm-commits
- [llvm] RFC: [AMDGPU] Check subtarget features for consistency (PR #86957)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] HasOneUse builtin predicate on PatFrags (PR #91578)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] HasOneUse builtin predicate on PatFrags (PR #91578)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] HasOneUse builtin predicate on PatFrags (PR #91578)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] HasOneUse builtin predicate on PatFrags (PR #91578)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Build lane intrinsics in a mangling-agnostic way. NFC. (PR #91583)
Matt Arsenault via llvm-commits
- [llvm] DAG: Skip 0 sign handling in minimum/maximum lowering for _ieee case (PR #91326)
Matt Arsenault via llvm-commits
- [llvm] DAG: Skip 0 sign handling in minimum/maximum lowering for _ieee case (PR #91326)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Matt Arsenault via llvm-commits
- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Matt Arsenault via llvm-commits
- [llvm] MCExpr-ify amd_kernel_code_t (PR #91587)
Matt Arsenault via llvm-commits
- [llvm] MCExpr-ify amd_kernel_code_t (PR #91587)
Matt Arsenault via llvm-commits
- [llvm] MCExpr-ify amd_kernel_code_t (PR #91587)
Matt Arsenault via llvm-commits
- [llvm] AtomicExpand: Preserve metadata when expanding partword RMW (PR #89769)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
Matt Arsenault via llvm-commits
- [llvm] AtomicExpand: Preserve metadata when expanding partword RMW (PR #89769)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce ordering parameter to atomic intrinsics and introduce new llvm.amdgcn.image.atomic.load intrinsic. (PR #73613)
Matt Arsenault via llvm-commits
- [llvm] MCExpr-ify SIProgramInfo (PR #88257)
Matt Arsenault via llvm-commits
- [llvm] [GISel][CombinerHelper] Combine and(trunc(x), trunc(y)) -> trunc(and(x, y)) (PR #89023)
Matt Arsenault via llvm-commits
- [llvm] [GISel][CombinerHelper] Combine and(trunc(x), trunc(y)) -> trunc(and(x, y)) (PR #89023)
Matt Arsenault via llvm-commits
- [llvm] [GISel][CombinerHelper] Combine and(trunc(x), trunc(y)) -> trunc(and(x, y)) (PR #89023)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold fcmp ogt (x - y), 0 into fcmp ogt x, y #85245 (PR #85506)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Create AMDGPUMnemonicAlias tablegen class (PR #89288)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Remove unnecessary predicates from aliases. NFC. (PR #91602)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: fix isSafeToSink expecting exactly one predecessor (PR #89224)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] HasOneUse builtin predicate on PatFrags (PR #91578)
Matt Arsenault via llvm-commits
- [clang] [llvm] [ASAN] Add "sanitized_padded_global" llvm ir attribute to identify sanitizer instrumented globals (PR #68865)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Fold fcmp ogt (x - y), 0 into fcmp ogt x, y #85245 (PR #85506)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][LTO] Introduce AMDGPUCloneModuleLDS (PR #89683)
Matt Arsenault via llvm-commits
- [llvm] [x86] Add tan intrinsic part 4 (PR #90503)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function/macro to free up a bit slot (PR #82787)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Vectorize more 16 bit shuffles (PR #90648)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Vectorize more 16 bit shuffles (PR #90648)
Matt Arsenault via llvm-commits
- [llvm] MCExpr-ify amd_kernel_code_t (PR #91587)
Matt Arsenault via llvm-commits
- [llvm] MCExpr-ify amd_kernel_code_t (PR #91587)
Matt Arsenault via llvm-commits
- [llvm] MCExpr-ify amd_kernel_code_t (PR #91587)
Matt Arsenault via llvm-commits
- [llvm] MCExpr-ify amd_kernel_code_t (PR #91587)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix kernarg preloading crash with some types and alignments (PR #91625)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix kernarg preloading crash with some types and alignments (PR #91625)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix kernarg preloading crash with some types and alignments (PR #91625)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU-specific module splitting (PR #89245)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU-specific module splitting (PR #89245)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU-specific module splitting (PR #89245)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU-specific module splitting (PR #89245)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU-specific module splitting (PR #89245)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU-specific module splitting (PR #89245)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU-specific module splitting (PR #89245)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add AMDGPU-specific module splitting (PR #89245)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add IR LiveReg type-based optimization (PR #66838)
Matt Arsenault via llvm-commits
- [llvm] [InstCombine] Remove Store when its Ptr is removable (PR #79565)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #89165)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #89165)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #89165)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #89165)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #89165)
Matt Arsenault via llvm-commits
- [llvm] CodeGen: Add -denormal-fp-math-bf16 flag (PR #90425)
Matt Arsenault via llvm-commits
- [llvm] [llvm][CodeGen] Add a new software pipeliner 'Window Scheduler' (PR #84443)
Matt Arsenault via llvm-commits
- [llvm] [llvm][CodeGen] Add a new software pipeliner 'Window Scheduler' (PR #84443)
Matt Arsenault via llvm-commits
- [llvm] [llvm][CodeGen] Add a new software pipeliner 'Window Scheduler' (PR #84443)
Matt Arsenault via llvm-commits
- [llvm] [llvm][CodeGen] Add a new software pipeliner 'Window Scheduler' (PR #84443)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Make fneg/fabs/copysign legal for bf16 (PR #91676)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Make fneg/fabs/copysign legal for bf16 (PR #91676)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Make fneg/fabs/copysign legal for bf16 (PR #91676)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix an issue that wrong index is used in calculation of byte provider when the op is extract_vector_elt (PR #91697)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix an issue that wrong index is used in calculation of byte provider when the op is extract_vector_elt (PR #91697)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Make fneg/fabs/copysign legal for bf16 (PR #91676)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix broken MIR generated by gfx11 simulated trap lowering (PR #91652)
Matt Arsenault via llvm-commits
- [llvm] [LoopUnroll] Consider convergence control tokens when unrolling (PR #91715)
Matt Arsenault via llvm-commits
- [llvm] [llvm][CodeGen] Add a new software pipeliner 'Window Scheduler' (PR #84443)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Vectorize more 16 bit shuffles (PR #90648)
Matt Arsenault via llvm-commits
- [llvm] [InstCombineCompares] Replace the sqrt in if-condition (PR #91707)
Matt Arsenault via llvm-commits
- [llvm] [InstCombineCompares] Replace the sqrt in if-condition (PR #91707)
Matt Arsenault via llvm-commits
- [llvm] [InstCombineCompares] Replace the sqrt in if-condition (PR #91707)
Matt Arsenault via llvm-commits
- [llvm] [InstCombineCompares] Replace the sqrt in if-condition (PR #91707)
Matt Arsenault via llvm-commits
- [llvm] [InstCombineCompares] Replace the sqrt in if-condition (PR #91707)
Matt Arsenault via llvm-commits
- [llvm] [InstCombineCompares] Replace the sqrt in if-condition (PR #91707)
Matt Arsenault via llvm-commits
- [llvm] [InstCombineCompares] Replace the sqrt in if-condition (PR #91707)
Matt Arsenault via llvm-commits
- [llvm] [InstCombineCompares] Replace the sqrt in if-condition (PR #91707)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix unittest linking error with `LLVM_LINK_LLVM_DYLIB` (PR #91727)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
Matt Arsenault via llvm-commits
- [llvm] InstCombine: Preserve inbounds in PointerReplacer (PR #91735)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Remove SIProgramInfo related MCExpr unittest (PR #91758)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Remove SIProgramInfo related MCExpr unittest (PR #91758)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Make fneg/fabs/copysign legal for bf16 (PR #91676)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Combine build_vector patterns for i16 and f16. NFCI. (PR #91806)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Combine build_vector patterns for i16 and f16. NFCI. (PR #91806)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Combine build_vector patterns for i16 and f16. NFCI. (PR #91806)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Combine build_vector patterns for i16 and f16. NFCI. (PR #91806)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Exclude certain opcodes from being marked as single use (PR #91802)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Exclude certain opcodes from being marked as single use (PR #91802)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Exclude certain opcodes from being marked as single use (PR #91802)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Initialize MachineFunctionInfo for unittest (PR #91820)
Matt Arsenault via llvm-commits
- [llvm] [DAG] Use copysign in frem power-2 fold. (PR #91751)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix broken MIR generated by gfx11 simulated trap lowering (PR #91652)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix broken MIR generated by gfx11 simulated trap lowering (PR #91652)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Fix broken MIR generated by gfx11 simulated trap lowering (PR #91652)
Matt Arsenault via llvm-commits
- [llvm] [WIP] Consider datalayout sentinel pointer value for isKnownNonZero check (PR #91769)
Matt Arsenault via llvm-commits
- [llvm] [WIP] Consider datalayout sentinel pointer value for isKnownNonZero check (PR #91769)
Matt Arsenault via llvm-commits
- [llvm] [WIP] Consider datalayout sentinel pointer value for isKnownNonZero check (PR #91769)
Matt Arsenault via llvm-commits
- [llvm] [WIP] Consider datalayout sentinel pointer value for isKnownNonZero check (PR #91769)
Matt Arsenault via llvm-commits
- [llvm] [WIP] Consider datalayout sentinel pointer value for isKnownNonZero check (PR #91769)
Matt Arsenault via llvm-commits
- [llvm] [WIP] Consider datalayout sentinel pointer value for isKnownNonZero check (PR #91769)
Matt Arsenault via llvm-commits
- [llvm] [WIP] Consider datalayout sentinel pointer value for isKnownNonZero check (PR #91769)
Matt Arsenault via llvm-commits
- [llvm] [WIP] Consider datalayout sentinel pointer value for isKnownNonZero check (PR #91769)
Matt Arsenault via llvm-commits
- [llvm] [WIP] Consider datalayout sentinel pointer value for isKnownNonZero check (PR #91769)
Matt Arsenault via llvm-commits
- [llvm] [WIP] Consider datalayout sentinel pointer value for isKnownNonZero check (PR #91769)
Matt Arsenault via llvm-commits
- [llvm] [WIP] Consider datalayout sentinel pointer value for isKnownNonZero check (PR #91769)
Matt Arsenault via llvm-commits
- [llvm] [WIP] Consider datalayout sentinel pointer value for isKnownNonZero check (PR #91769)
Matt Arsenault via llvm-commits
- [llvm] [WIP] Consider datalayout sentinel pointer value for isKnownNonZero check (PR #91769)
Matt Arsenault via llvm-commits
- [clang] [clang-tools-extra] [flang] [lld] [llvm] [mlir] [polly] [test]: fix filecheck annotation typos (PR #91854)
Matt Arsenault via llvm-commits
- [llvm] [SampleProfileLoader] Fix integer overflow in generateMDProfMetadata (PR #90217)
Matthias Braun via llvm-commits
- [llvm] [SampleProfileLoader] Fix integer overflow in generateMDProfMetadata (PR #90217)
Matthias Braun via llvm-commits
- [llvm] new-prs-labeler.yml: Include conversion passes of TOSA/emitc (PR #91921)
Matthias Gehre via llvm-commits
- [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)
Mattias Jansson via llvm-commits
- [llvm] [llvm/Support] Make `llvm::sys::RWMutex` Lockable (PR #90667)
Med Ismail Bennani via llvm-commits
- [llvm] [dsymutil] Add -q/--quiet flag to suppress warnings (PR #91658)
Med Ismail Bennani via llvm-commits
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Mehdi Amini via llvm-commits
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Mel Chen via llvm-commits
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Mel Chen via llvm-commits
- [llvm] [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable (PR #67812)
Mel Chen via llvm-commits
- [llvm] [LV][EVL] Support in-loop reduction using tail folding with EVL. (PR #90184)
Mel Chen via llvm-commits
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Mel Chen via llvm-commits
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Mel Chen via llvm-commits
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Mel Chen via llvm-commits
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Mel Chen via llvm-commits
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Mel Chen via llvm-commits
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Mel Chen via llvm-commits
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Mel Chen via llvm-commits
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Mel Chen via llvm-commits
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Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
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Michael Maitland via llvm-commits
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Mikhail Gudim via llvm-commits
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Mikhail Gudim via llvm-commits
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Mikhail Gudim via llvm-commits
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Mikhail Gudim via llvm-commits
- [llvm] a345736 - [Orc] Fix `-Wsign-compare` warnings in unittest
Min Hsu via llvm-commits
- [llvm] 8466480 - [ProfData] Remove unused variable in unittest
Min Hsu via llvm-commits
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Min-Yih Hsu via llvm-commits
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Min-Yih Hsu via llvm-commits
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Min-Yih Hsu via llvm-commits
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Min-Yih Hsu via llvm-commits
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Min-Yih Hsu via llvm-commits
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Min-Yih Hsu via llvm-commits
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Min-Yih Hsu via llvm-commits
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Min-Yih Hsu via llvm-commits
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Min-Yih Hsu via llvm-commits
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Min-Yih Hsu via llvm-commits
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Min-Yih Hsu via llvm-commits
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Min-Yih Hsu via llvm-commits
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Min-Yih Hsu via llvm-commits
- [llvm] [RISCV][CostModel] Add cost model for experimental.cttz.elts (PR #91778)
Min-Yih Hsu via llvm-commits
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Min-Yih Hsu via llvm-commits
- [llvm] [VP][RISCV] Add vp.reduce.fmaximum/fminimum and its RISC-V codegen (PR #91782)
Min-Yih Hsu via llvm-commits
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Min-Yih Hsu via llvm-commits
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Mingming Liu via llvm-commits
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Mingming Liu via llvm-commits
- [llvm] [ThinLTO][BitcodeWriter] Write import type in per-module combined summary (PR #87600)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO][BitcodeWriter] Write import type in per-module combined summary (PR #87600)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO][BitcodeWriter] Write import type in per-module combined summary (PR #87600)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO][BitcodeWriter] Write import type in per-module combined summary (PR #87600)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [Inline]Update value profile for non-call instructions (PR #83769)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [NFC]Extract the heuristic to find vtable for an indirect call into a helper function (PR #81024)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [InstrProf] Add vtables with type metadata into symtab (PR #81051)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO][BitcodeWriter] Write import type in per-module combined summary (PR #87600)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO][BitcodeWriter] Write import type in per-module combined summary (PR #87600)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO][BitcodeWriter] Write import type in per-module combined summary (PR #87600)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO][BitcodeWriter] Write import type in per-module combined summary (PR #87600)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO][BitcodeWriter] Write import type in per-module combined summary (PR #87600)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO][BitcodeWriter] Write import type in per-module combined summary (PR #87600)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO][BitcodeWriter] Write import type in per-module combined summary (PR #87600)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [InstrProf] Add vtables with type metadata into symtab (PR #81051)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [InstrProf] Add vtables with type metadata into symtab (PR #81051)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [InstrProf] Add vtables with type metadata into symtab (PR #81051)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [InstrProf] Add vtables with type metadata into symtab (PR #81051)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [InstrProf] Add vtables with type metadata into symtab (PR #81051)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [InstrProf] Add vtables with type metadata into symtab (PR #81051)
Mingming Liu via llvm-commits
- [llvm] [InstrProf]Merge vtable names from multiple sources in llvm-profdata (PR #90100)
Mingming Liu via llvm-commits
- [llvm] [InstrProf]Merge vtable names from multiple sources in llvm-profdata (PR #90100)
Mingming Liu via llvm-commits
- [llvm] [InstrProf]Merge vtable names from multiple sources in llvm-profdata (PR #90100)
Mingming Liu via llvm-commits
- [llvm] [InstrProf]Merge vtable names from multiple sources in llvm-profdata (PR #90100)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [InstrProf] Add vtables with type metadata into symtab (PR #81051)
Mingming Liu via llvm-commits
- [llvm] [InstrProf]Merge vtable names from multiple sources in llvm-profdata (PR #90100)
Mingming Liu via llvm-commits
- [llvm] [Inline][PGO] After inline, update InvokeInst profile counts in caller and cloned callee (PR #83809)
Mingming Liu via llvm-commits
- [llvm] [Inline][PGO] After inline, update InvokeInst profile counts in caller and cloned callee (PR #83809)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [InstrProf] Add vtables with type metadata into symtab (PR #81051)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [NFC][CallPromotionUtils]Extract a helper function versionCallSiteWithCond from versionCallSite (PR #81181)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [NFC][CallPromotionUtils]Extract a helper function versionCallSiteWithCond from versionCallSite (PR #81181)
Mingming Liu via llvm-commits
- [compiler-rt] [llvm] [NFC][CallPromotionUtils]Extract a helper function versionCallSiteWithCond from versionCallSite (PR #81181)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO] Generate import status in per-module combined summary (PR #88024)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO] Populate declaration import status except for distributed ThinLTO (PR #88024)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO] Populate declaration import status except for distributed ThinLTO (PR #88024)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO] Populate declaration import status except for distributed ThinLTO (PR #88024)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO] Populate declaration import status except for distributed ThinLTO (PR #88024)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO] Populate declaration import status except for distributed ThinLTO (PR #88024)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO] Populate declaration import status except for distributed ThinLTO (PR #88024)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO] Populate declaration import status except for distributed ThinLTO (PR #88024)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO] Populate declaration import status except for distributed ThinLTO (PR #88024)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO] Populate declaration import status except for distributed ThinLTO (PR #88024)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO] Populate declaration import status except for distributed ThinLTO (PR #88024)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO] Populate declaration import status except for distributed ThinLTO (PR #88024)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO] Populate declaration import status except for distributed ThinLTO (PR #88024)
Mingming Liu via llvm-commits
- [llvm] [ThinLTO] Populate declaration import status except for distributed ThinLTO under a default-off new option (PR #88024)
Mingming Liu via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (PR #89838)
Mircea Trofin via llvm-commits
- [compiler-rt] 8755d24 - [compiler-rt][ctx_profile] Fix signed-ness warnings in test
Mircea Trofin via llvm-commits
- [llvm] [llvm][ctx_profile] Add instrumentation lowering (PR #90821)
Mircea Trofin via llvm-commits
- [llvm] [llvm][ctx_profile] Add instrumentation lowering (PR #90821)
Mircea Trofin via llvm-commits
- [llvm] [llvm][ctx_profile] Add instrumentation lowering (PR #90821)
Mircea Trofin via llvm-commits
- [llvm] [llvm][ctx_profile] Add instrumentation lowering (PR #90821)
Mircea Trofin via llvm-commits
- [llvm] [llvm][ctx_profile] Add instrumentation lowering (PR #90821)
Mircea Trofin via llvm-commits
- [llvm] [llvm][ctx_profile] Add instrumentation lowering (PR #90821)
Mircea Trofin via llvm-commits
- [llvm] [llvm][ctx_profile] Add instrumentation lowering (PR #90821)
Mircea Trofin via llvm-commits
- [llvm] [llvm][ctx_profile] Add instrumentation lowering (PR #90821)
Mircea Trofin via llvm-commits
- [llvm] [llvm][ctx_profile] Add instrumentation lowering (PR #90821)
Mircea Trofin via llvm-commits
- [llvm] [llvm][ctx_profile] Add instrumentation lowering (PR #90821)
Mircea Trofin via llvm-commits
- [llvm] [llvm][ctx_profile] Add instrumentation lowering (PR #90821)
Mircea Trofin via llvm-commits
- [compiler-rt] [llvm] [ctx_profile] Pull `ContextNode` in a `.inc` file (PR #91669)
Mircea Trofin via llvm-commits
- [compiler-rt] [llvm] [ctx_profile] Pull `ContextNode` in a `.inc` file (PR #91669)
Mircea Trofin via llvm-commits
- [compiler-rt] [llvm] [ctx_profile] Pull `ContextNode` in a `.inc` file (PR #91669)
Mircea Trofin via llvm-commits
- [compiler-rt] [llvm] [ctx_profile] Pull `ContextNode` in a `.inc` file (PR #91669)
Mircea Trofin via llvm-commits
- [compiler-rt] [llvm] [ctx_profile] Pull `ContextNode` in a `.inc` file (PR #91669)
Mircea Trofin via llvm-commits
- [compiler-rt] [llvm] [ctx_profile] Pull `ContextNode` in a `.inc` file (PR #91669)
Mircea Trofin via llvm-commits
- [compiler-rt] [llvm] [ctx_profile] Pull `ContextNode` in a `.inc` file (PR #91669)
Mircea Trofin via llvm-commits
- [compiler-rt] [llvm] [ctx_profile] Pull `ContextNode` in a `.inc` file (PR #91669)
Mircea Trofin via llvm-commits
- [compiler-rt] [llvm] [ctx_profile] Pull `ContextNode` in a `.inc` file (PR #91669)
Mircea Trofin via llvm-commits
- [compiler-rt] [llvm] [ctx_profile] Pull `ContextNode` in a `.h` file (PR #91669)
Mircea Trofin via llvm-commits
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- [llvm] [InstCombine] Fold `(icmp pred (trunc nuw/nsw X), C)` -> `(icmp pred X, (zext/sext C))` (PR #87935)
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- [llvm] [InstCombine] Fold `(icmp pred (trunc nuw/nsw X), C)` -> `(icmp pred X, (zext/sext C))` (PR #87935)
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- [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [mlir] [openmp] [polly] fix(python): fix comparison to None (PR #91857)
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Patrick Quist via llvm-commits
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- [lld] [llvm] [RISCV][lld] Set the type of TLSDESC relocation's referenced local symbol to STT_NOTYPE (PR #85817)
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- [llvm] [RISCV] Use 'riscv-isa' module flag to set ELF flags and attributes. (PR #85155)
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- [clang] [llvm] [Driver] Add option to select compiler-rt arch suffix (PR #89775)
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- [clang] [llvm] [DebugInfo] Use DW_op_bit_piece for structured bindings of bitfields (PR #85665)
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- [llvm] [NFC][LLVM] Refactor rounding mode detection of constrained fp intrinsic IDs (PR #90854)
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- [llvm] c84c74e - [LLVM][CodeGen][SVE] Add tests for vector extracts from unpacked types.
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Paul Walker via llvm-commits
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Paul Walker via llvm-commits
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Paul Walker via llvm-commits
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Paul Walker via llvm-commits
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Petar Avramovic via llvm-commits
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Petar Avramovic via llvm-commits
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Petar Avramovic via llvm-commits
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- [clang] [llvm] [arm] Support reserving r4 and r5 alongside r9 (PR #89849)
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Peter Smith via llvm-commits
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- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
Peter Smith via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
Peter Smith via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
Peter Smith via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
Peter Smith via llvm-commits
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Peter Smith via llvm-commits
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Peter Smith via llvm-commits
- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
Peter Smith via llvm-commits
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- [llvm] [llvm-mca] Abort on parse error without -skip-unsupported-instructions (PR #90474)
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- [llvm] afc10fc - [llvm-mca] Move bad-input.s test to be target specific
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- [llvm] [llvm-mca] Abort on parse error without -skip-unsupported-instructions (PR #90474)
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- [llvm] 458d706 - [llvm-mca] Make bad-input.s even more CPU specific
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- [llvm] [RISCV] Move strength reduction of mul X, 3/5/9*2^N to combine (PR #89966)
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- [llvm] [RISCV] Move strength reduction of mul X, 3/5/9*2^N to combine (PR #89966)
Philip Reames via llvm-commits
- [llvm] [RISCV] Move strength reduction of mul X, 3/5/9*2^N to combine (PR #89966)
Philip Reames via llvm-commits
- [llvm] d0bafb5 - [RISCV] Add coverage for zext.w/h interaction with shift transforms
Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
- [llvm] [RISCV] Move RISCVInsertVSETVLI to after phi elimination (PR #91440)
Philip Reames via llvm-commits
- [llvm] [RISCV] Add isel special case for (and (shl X, c2), c1) -> (slli_uw (srli x, c4-c2), c4). (PR #91638)
Philip Reames via llvm-commits
- [llvm] [RISCV] Add isel special case for (and (shl X, c2), c1) -> (slli_uw (srli x, c4-c2), c4). (PR #91638)
Philip Reames via llvm-commits
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Philip Reames via llvm-commits
- [llvm] [RISCV] Inhibit DAG folding shl through zext.w pattern with zba (PR #91626)
Philip Reames via llvm-commits
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Philip Reames via llvm-commits
- [llvm] [RISCV] Strength reduce mul by 2^N - 2^M (PR #88983)
Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
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Philip Reames via llvm-commits
- [llvm] [RISCV] Move RISCVInsertVSETVLI to after phi elimination (PR #91440)
Philip Reames via llvm-commits
- [llvm] [RISCV] Move RISCVInsertVSETVLI to after phi elimination (PR #91440)
Philip Reames via llvm-commits
- [llvm] [RISCV] Move RISCVInsertVSETVLI to after phi elimination (PR #91440)
Philip Reames via llvm-commits
- [llvm] [RISCV] Move RISCVInsertVSETVLI to after phi elimination (PR #91440)
Philip Reames via llvm-commits
- [llvm] [X86] Add slow div64 tuning flag to Nehalem target (PR #91129)
Phoebe Wang via llvm-commits
- [llvm] [X86][AMX] Fix a bug after #83628 (PR #91207)
Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
- [llvm] [X86][BF16] Do not combine FP_TRUNC + FP_EXTEND if they come from user (PR #91420)
Phoebe Wang via llvm-commits
- [llvm] [X86][BF16] Do not combine FP_TRUNC + FP_EXTEND if they come from user (PR #91420)
Phoebe Wang via llvm-commits
- [llvm] CodeGen: Add -denormal-fp-math-bf16 flag (PR #90425)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][Driver] Do not add `-evex512` for `-march=native` when the target doesn't support AVX512 (PR #91694)
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- [clang] [llvm] [X86][Driver] Do not add `-evex512` for `-march=native` when the target doesn't support AVX512 (PR #91694)
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- [clang] [llvm] [X86][Driver] Do not add `-evex512` for `-march=native` when the target doesn't support AVX512 (PR #91694)
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- [llvm] CodeGen: Add -denormal-fp-math-bf16 flag (PR #90425)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][Driver] Do not add `-evex512` for `-march=native` when the target doesn't support AVX512 (PR #91694)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][Driver] Do not add `-evex512` for `-march=native` when the target doesn't support AVX512 (PR #91694)
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- [llvm] [X86][CodeGen] Return true when MIR is changed after optimizeCompareInstr (PR #91723)
Phoebe Wang via llvm-commits
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Phoebe Wang via llvm-commits
- [llvm] Use 256 bit register when AVX2 or higher is available. (PR #91721)
Phoebe Wang via llvm-commits
- [llvm] Use 256 bit register when AVX2 or higher is available. (PR #91721)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][Driver] Do not add `-evex512` for `-march=native` when the target doesn't support AVX512 (PR #91694)
Phoebe Wang via llvm-commits
- [clang] [llvm] [X86][Driver] Do not add `-evex512` for `-march=native` when the target doesn't support AVX512 (PR #91694)
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- [clang] [llvm] [X86][Driver] Do not add `-evex512` for `-march=native` when the target doesn't support AVX512 (PR #91694)
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- [llvm] [TII][NFC] Add renamable bit to copyPhysReg (PR #91179)
Piyou Chen via llvm-commits
- [llvm] [TII][NFC] Add renamable bit to copyPhysReg (PR #91179)
Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
- [llvm] [TII][NFC] Add renamable bit to copyPhysReg (PR #91179)
Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
- [llvm] [RISCV] Convert implicit_def tuples to noreg in post-isel peephole (PR #91173)
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Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
- [llvm] [RISCV] Support postRA vsetvl insertion pass (PR #70549)
Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
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Piyou Chen via llvm-commits
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- [llvm] [TII][NFC] Add renamable bit to copyPhysReg (PR #91179)
Quentin Colombet via llvm-commits
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Quentin Colombet via llvm-commits
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Quentin Colombet via llvm-commits
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Quentin Colombet via llvm-commits
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Quentin Colombet via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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- [llvm] VectorCombine: fix logical error after m_Trunc match (PR #91201)
Ramkumar Ramachandra via llvm-commits
- [llvm] VectorCombine: fix logical error after m_Trunc match (PR #91201)
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
- [llvm] ISel/AArch64: custom lower vector ISD::[L]LRINT (PR #89035)
Ramkumar Ramachandra via llvm-commits
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Ramkumar Ramachandra via llvm-commits
- [llvm] LoopVectorize: run verifyFunction once (PR #91470)
Ramkumar Ramachandra via llvm-commits
- [llvm] LoopVectorize: run verifyFunction once (PR #91470)
Ramkumar Ramachandra via llvm-commits
- [llvm] ISel/AArch64: custom lower vector ISD::[L]LRINT (PR #89035)
Ramkumar Ramachandra via llvm-commits
- [llvm] ISel/AArch64: custom lower vector ISD::[L]LRINT (PR #89035)
Ramkumar Ramachandra via llvm-commits
- [llvm] ISel/AArch64: custom lower vector ISD::[L]LRINT (PR #89035)
Ramkumar Ramachandra via llvm-commits
- [llvm] [AArch64] Extend v2i64 fptosi.sat to v2f64 (PR #91714)
Ramkumar Ramachandra via llvm-commits
- [llvm] ISel/AArch64: custom lower vector ISD::[L]LRINT (PR #89035)
Ramkumar Ramachandra via llvm-commits
- [llvm] ISel/AArch64: custom lower vector ISD::[L]LRINT (PR #89035)
Ramkumar Ramachandra via llvm-commits
- [llvm] ISel/AArch64: custom lower vector ISD::[L]LRINT (PR #89035)
Ramkumar Ramachandra via llvm-commits
- [llvm] InstructionSimplify: simplify a function (NFC) (PR #91853)
Ramkumar Ramachandra via llvm-commits
- [llvm] InstructionSimplify: simplify a function (NFC) (PR #91853)
Ramkumar Ramachandra via llvm-commits
- [llvm] InstructionSimplify: simplify a function (NFC) (PR #91853)
Ramkumar Ramachandra via llvm-commits
- [llvm] [WIP] Consider datalayout sentinel pointer value for isKnownNonZero check (PR #91769)
Rana Pratap Reddy via llvm-commits
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Rana Pratap Reddy via llvm-commits
- [llvm] [X86][BF16] Do not combine FP_TRUNC + FP_EXTEND if they come from user (PR #91420)
Rasmus Munk Larsen via llvm-commits
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Rasmus Munk Larsen via llvm-commits
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- [llvm] aa0776d - Revert "[Pipelines] Do not run CoroSplit and CoroCleanup in LTO pre-link pipeline (#90310)" and related patches
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Reid Kleckner via llvm-commits
- [llvm] [XRay][X86] Fix stack alignment for custom event calls. (PR #89360)
Ricky Zhou via llvm-commits
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Ricky Zhou via llvm-commits
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Ricky Zhou via llvm-commits
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Ricky Zhou via llvm-commits
- [llvm] [SLP]Transform stores + reverse to strided stores with stride -1, if profitable. (PR #90464)
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Romaric Jodin via llvm-commits
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Romaric Jodin via llvm-commits
- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
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- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
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- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
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- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
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- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
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- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
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- [clang] [llvm] [DirectX] Set DXIL Version using shader model version in compilation target profile (PR #89823)
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- [clang] [llvm] [DirectX] Set DXIL Version using shader model version in compilation target profile (PR #89823)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] Revert "[DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version" (PR #91290)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] Revert "[DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version" (PR #91290)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] [DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #91407)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX backend] emits metadata for DXIL version. (PR #88350)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX backend] emits metadata for DXIL version. (PR #88350)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX backend] emits metadata for DXIL version. (PR #88350)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] [DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #91407)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] [DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #91407)
S. Bharadwaj Yadavalli via llvm-commits
- [clang] [llvm] [DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #91407)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Fix DXIL part header version encoding (PR #91506)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Fix DXIL part header version encoding (PR #91506)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [DirectX] Fix DXIL part header version encoding (PR #91506)
S. Bharadwaj Yadavalli via llvm-commits
- [llvm] [Support] Handle delete_pending case for Windows fs::status (PR #90655)
Saleem Abdulrasool via llvm-commits
- [llvm] [Support] Handle delete_pending case for Windows fs::status (PR #90655)
Saleem Abdulrasool via llvm-commits
- [llvm] [Support] Handle delete_pending case for Windows fs::status (PR #90655)
Saleem Abdulrasool via llvm-commits
- [llvm] [AMDGPU] don't mark control-flow intrinsics as convergent (PR #90026)
Sameer Sahasrabuddhe via llvm-commits
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Sameer Sahasrabuddhe via llvm-commits
- [llvm] [LLVM][AArch64]Use load/store with consecutive registers in SME2 or S… (PR #77665)
Sander de Smalen via llvm-commits
- [llvm] [LLVM][AArch64]Use load/store with consecutive registers in SME2 or S… (PR #77665)
Sander de Smalen via llvm-commits
- [llvm] [AArch64][SME] Remove unused ZA lazy-save (PR #81648)
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Sander de Smalen via llvm-commits
- [llvm] Revert "[AArch64] NFC: Add RUN lines for streaming-compatible code." (PR #91599)
Sander de Smalen via llvm-commits
- [llvm] [AMDGPU] Exclude certain opcodes from being marked as single use (PR #91802)
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- [clang] [compiler-rt] [XRay] Add support for instrumentation of DSOs on x86_64 (PR #90959)
Sebastian Kreutzer via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
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- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [flang] [llvm] Fixing the location attribute added to mapInfoOp (PR #90764)
Sergio Afonso via llvm-commits
- [flang] [llvm] Fixing the location attribute added to mapInfoOp (PR #90764)
Sergio Afonso via llvm-commits
- [flang] [llvm] Fixing the location attribute added to mapInfoOp (PR #90764)
Sergio Afonso via llvm-commits
- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
Sergio Afonso via llvm-commits
- [llvm] [NFC] Prefer `str.resize(len)` over `str.substr(0, len)` (PR #91067)
Shahid Iqbal via llvm-commits
- [llvm] [DebugInfo][IndVarSimplify] fix missing debug location updates (PR #91443)
Shan Huang via llvm-commits
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Shan Huang via llvm-commits
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Shan Huang via llvm-commits
- [llvm] [DebugInfo][IndVarSimplify] fix missing debug location updates (PR #91443)
Shan Huang via llvm-commits
- [llvm] [DebugInfo][IndVarSimplify] fix missing debug location updates (PR #91443)
Shan Huang via llvm-commits
- [llvm] [DebugInfo][IndVarSimplify] fix missing debug location updates (PR #91443)
Shan Huang via llvm-commits
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Shan Huang via llvm-commits
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Shan Huang via llvm-commits
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Shan Huang via llvm-commits
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- [llvm] [DebugInfo][JumpThreading] Fix missing debug location updates (PR #91581)
Shan Huang via llvm-commits
- [llvm] [DebugInfo][JumpThreading] Fix missing debug location updates (PR #91581)
Shan Huang via llvm-commits
- [llvm] [DebugInfo][JumpThreading] Fix missing debug location updates (PR #91581)
Shan Huang via llvm-commits
- [llvm] [DebugInfo][JumpThreading] Fix missing debug location updates (PR #91581)
Shan Huang via llvm-commits
- [llvm] [DebugInfo][JumpThreading] Fix missing debug location updates (PR #91581)
Shan Huang via llvm-commits
- [llvm] [DebugInfo][JumpThreading] Fix missing debug location updates (PR #91581)
Shan Huang via llvm-commits
- [llvm] [DebugInfo][JumpThreading] Fix missing debug location updates (PR #91581)
Shan Huang via llvm-commits
- [llvm] [DebugInfo][JumpThreading] Fix missing debug location updates (PR #91581)
Shan Huang via llvm-commits
- [llvm] [DebugInfo][JumpThreading] Fix missing debug location updates (PR #91581)
Shan Huang via llvm-commits
- [llvm] [DebugInfo][JumpThreading] Fix missing debug location updates (PR #91581)
Shan Huang via llvm-commits
- [llvm] [DebugInfo][JumpThreading] Fix missing debug location updates (PR #91581)
Shan Huang via llvm-commits
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Shan Huang via llvm-commits
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Shan Huang via llvm-commits
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Shan Huang via llvm-commits
- [llvm] [DebugInfo][LICM] Fix missing debug location updates (PR #91729)
Shan Huang via llvm-commits
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Shan Huang via llvm-commits
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Shan Huang via llvm-commits
- [llvm] [DebugInfo][LoopLoadElim] Fix missing debug location updates (PR #91839)
Shan Huang via llvm-commits
- [llvm] [DebugInfo][LoopLoadElim] Fix missing debug location updates (PR #91839)
Shan Huang via llvm-commits
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Shan Huang via llvm-commits
- [llvm] [RISCV][TTI] Improve SiFive7 reduction cost (PR #90951)
Shao-Ce SUN via llvm-commits
- [llvm] [RISCV][TTI] Improve SiFive7 reduction cost (PR #90951)
Shao-Ce SUN via llvm-commits
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Shao-Ce SUN via llvm-commits
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Shao-Ce SUN via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [X86][CodeGen] Return true when MIR is changed after optimizeCompareInstr (PR #91723)
Shengchen Kan via llvm-commits
- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
Shengchen Kan via llvm-commits
- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
Shengchen Kan via llvm-commits
- [llvm] [X86][CodeGen] Return true when MIR is changed after optimizeCompareInstr (PR #91723)
Shengchen Kan via llvm-commits
- [llvm] [DAGCombine] Add all users of the instruction recursively into worklist when an instruction is simplified (PR #91772)
Shengchen Kan via llvm-commits
- [llvm] [DAGCombine] Add all users of the instruction recursively into worklist when an instruction is simplified (PR #91772)
Shengchen Kan via llvm-commits
- [llvm] [DAGCombine] Add all users of the instruction recursively into worklist when an instruction is simplified (PR #91772)
Shengchen Kan via llvm-commits
- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
Shengchen Kan via llvm-commits
- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
Shengchen Kan via llvm-commits
- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [X86][CodeGen] Return true when MIR is changed after optimizeCompareInstr (PR #91723)
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [DAGCombine] Add all users of the instruction recursively into worklist when an instruction is simplified (PR #91772)
Shengchen Kan via llvm-commits
- [llvm] [X86][CodeGen] Return true when MIR is changed after optimizeCompareInstr (PR #91723)
Shengchen Kan via llvm-commits
- [llvm] [X86][CodeGen] Return true when MIR is changed after optimizeCompareInstr (PR #91723)
Shengchen Kan via llvm-commits
- [llvm] [X86][CodeGen] Return true when MIR is changed after optimizeCompareInstr (PR #91723)
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] 575177f - [X86] Add sub-feature nf (no flags update) for APX
Shengchen Kan via llvm-commits
- [llvm] [X86][CodeGen] Support flags copy lowering for CCMP/CTEST (PR #91849)
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
Shengchen Kan via llvm-commits
- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
Shengchen Kan via llvm-commits
- [llvm] e586556 - [X86][CodeGen] Add NDD entries for transform TEST+AND -> TEST
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
Shengchen Kan via llvm-commits
- [llvm] [X86][MC] Support Intel FRED and LKGS instructions. (PR #91909)
Shengchen Kan via llvm-commits
- [llvm] [X86][MC] Support Intel FRED and LKGS instructions. (PR #91909)
Shengchen Kan via llvm-commits
- [llvm] [X86][MC] Support Intel FRED and LKGS instructions. (PR #91909)
Shengchen Kan via llvm-commits
- [llvm] [X86][MC] Support Intel FRED and LKGS instructions. (PR #91909)
Shengchen Kan via llvm-commits
- [llvm] [X86][MC] Support Intel FRED and LKGS instructions. (PR #91909)
Shengchen Kan via llvm-commits
- [llvm] [X86][MC] Support Intel FRED and LKGS instructions. (PR #91909)
Shengchen Kan via llvm-commits
- [llvm] [RFC][LV] VPlan-based cost model (PR #67647)
Shih-Po Hung via llvm-commits
- [llvm] [RISCV][TTI] Improve SiFive7 reduction cost (PR #90951)
Shih-Po Hung via llvm-commits
- [llvm] [RISCV][TTI] Add checks for invalid cast operations (PR #88854)
Shih-Po Hung via llvm-commits
- [llvm] [RISCV][TTI] Add checks for invalid cast operations (PR #88854)
Shih-Po Hung via llvm-commits
- [llvm] [LV] Avoid querying the cost of invalid operations (PR #89161)
Shih-Po Hung via llvm-commits
- [llvm] [LV] Avoid querying the cost of invalid operations (PR #89161)
Shih-Po Hung via llvm-commits
- [llvm] [RISCV][TTI] Support fdiv/udiv/sdiv/srem/urem in getArithmeticInstrCost (PR #89170)
Shih-Po Hung via llvm-commits
- [llvm] [RISCV][TTI] Support fdiv/udiv/sdiv/srem/urem in getArithmeticInstrCost (PR #89170)
Shih-Po Hung via llvm-commits
- [llvm] [RISCV] Pass subvector type to isLegalInterleavedAccessType in getInterleavedMemoryOpCost. (PR #91825)
Shih-Po Hung via llvm-commits
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Shih-Po Hung via llvm-commits
- [llvm] [RISCV] Pass subvector type to isLegalInterleavedAccessType in getInterleavedMemoryOpCost. (PR #91825)
Shih-Po Hung via llvm-commits
- [llvm] [RISCV] Pass subvector type to isLegalInterleavedAccessType in getInterleavedMemoryOpCost. (PR #91825)
Shih-Po Hung via llvm-commits
- [llvm] d67c3a4 - Revert "[RISCV][TTI] Support fdiv/udiv/sdiv/srem/urem in getArithmeticInstrCost (#89170)"
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- [llvm] 22213d5 - Recommit [RISCV][TTI] Support fdiv/udiv/sdiv/srem/urem in getArithmeticInstrCost (#89170)
ShihPo Hung via llvm-commits
- [llvm] [AMDGPU] Always Inline preserved analyses (PR #91198)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Don't optimize agpr phis if there the operand doesn't have subreg use (PR #91267)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Don't optimize agpr phis if the operand doesn't have subreg use (PR #91267)
Shilei Tian via llvm-commits
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Shilei Tian via llvm-commits
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Shilei Tian via llvm-commits
- [llvm] [openmp] ballot sync (PR #91297)
Shilei Tian via llvm-commits
- [llvm] [openmp] [OpenMP][OMPX] Add ballot_sync (PR #91297)
Shilei Tian via llvm-commits
- [llvm] [openmp] [OpenMP][OMPX] Add ballot_sync (PR #91297)
Shilei Tian via llvm-commits
- [llvm] [openmp] [OpenMP][OMPX] Add ballot_sync (PR #91297)
Shilei Tian via llvm-commits
- [llvm] AMDGPU: Do not bitcast atomicrmw in IR (PR #90045)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Don't optimize agpr phis if the operand doesn't have subreg use (PR #91267)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Don't optimize agpr phis if the operand doesn't have subreg use (PR #91267)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Don't optimize agpr phis if the operand doesn't have subreg use (PR #91267)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Don't optimize agpr phis if the operand doesn't have subreg use (PR #91267)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Don't optimize agpr phis if the operand doesn't have subreg use (PR #91267)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Fix an issue that wrong index is used in calculation of byte provider when the op is extract_vector_elt (PR #91697)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Fix an issue that wrong index is used in calculation of byte provider when the op is extract_vector_elt (PR #91697)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Fix an issue that wrong index is used in calculation of byte provider when the op is extract_vector_elt (PR #91697)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Fix an issue that wrong index is used in calculation of byte provider when the op is extract_vector_elt (PR #91697)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Fix an issue that wrong index is used in calculation of byte provider when the op is extract_vector_elt (PR #91697)
Shilei Tian via llvm-commits
- [llvm] [AMDGPU] Fix an issue that wrong index is used in calculation of byte provider when the op is extract_vector_elt (PR #91697)
Shilei Tian via llvm-commits
- [llvm] Merge sourcelocation in CSEMIRBuilder::getDominatingInstrForID. (PR #90922)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Use DIExpression::foldConstantMath() at the result of an append() (PR #71719)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Use DIExpression::foldConstantMath() at the result of an appendOpsToArg() (PR #71721)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Use DIExpression::foldConstantMath() at the result of an appendOpsToArg() (PR #71721)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Merge sourcelocation in CSEMIRBuilder::getDominatingInstrForID. (PR #90922)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Use DIExpression::foldConstantMath() at the result of an appendOpsToArg() (PR #71721)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Merge sourcelocation in CSEMIRBuilder::getDominatingInstrForID. (PR #90922)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Merge sourcelocation in CSEMIRBuilder::getDominatingInstrForID. (PR #90922)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Merge sourcelocation in CSEMIRBuilder::getDominatingInstrForID. (PR #90922)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Merge sourcelocation in CSEMIRBuilder::getDominatingInstrForID. (PR #90922)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Merge sourcelocation in CSEMIRBuilder::getDominatingInstrForID. (PR #90922)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] [NFC] Move DIExpressionCursor to DebugInfoMetadata.h (PR #69768)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Add functions peekNextN(unsigned) and assignNewExpr(ArrayRef<uint64_t>) to DIExpressionCursor (PR #71717)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Introduce DIExpression::foldConstantMath() (PR #71718)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Use DIExpression::foldConstantMath() at the result of an append() (PR #71719)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Introduce DIExpression::foldConstantMath() (PR #71718)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Use DIExpression::foldConstantMath() at the result of an append() (PR #71719)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] Use DIExpression::foldConstantMath at the result of a Salvaged expression (PR #71721)
Shubham Sandeep Rastogi via llvm-commits
- [llvm] [X86] Add slow div64/lea3 tuning flags to Nehalem target (PR #91129)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Add slow div64/lea3 tuning flags to Nehalem target (PR #91129)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Add slow div64/lea3 tuning flags to Nehalem target (PR #91129)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Add slow div64 tuning flag to Nehalem target (PR #91129)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Fold BLEND(PERMUTE(X), PERMUTE(Y)) -> PERMUTE(BLEND(X, Y)) (PR #90219)
Simon Pilgrim via llvm-commits
- [llvm] [DAG] Fold bitreverse(shl/srl(bitreverse(x),y)) -> srl/shl(x,y) (PR #89897)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Fold BLEND(PERMUTE(X), PERMUTE(Y)) -> PERMUTE(BLEND(X, Y)) (PR #90219)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Add FastImm16 tuning flag to Intel Atom + AMD Bobcat/Ryzen Families (PR #90635)
Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
- [llvm] VectorCombine: fix logical error after m_Trunc match (PR #91201)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Add slow div64 tuning flag to Nehalem target (PR #91129)
Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
- [llvm] [CodeGen] Regen some old tests; NFC (PR #91250)
Simon Pilgrim via llvm-commits
- [llvm] [CodeGen] Regen some old tests; NFC (PR #91250)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Enable TuningSlowDivide64 on Barcelona/Bobcat/Bulldozer/Ryzen Families (PR #91277)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Add FastImm16 tuning flag to Intel Atom + AMD Bobcat/Ryzen Families (PR #90635)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Use GFNI for vXi8 shifts/rotates (PR #89115)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Enable TuningSlowDivide64 on Barcelona/Bobcat/Bulldozer/Ryzen Families (PR #91277)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Reduce znver3/4 LoopMicroOpBufferSize to practical loop unrolling values (PR #91340)
Simon Pilgrim via llvm-commits
- [llvm] [X86] Enable TuningSlowDivide64 on Barcelona/Bobcat/Bulldozer/Ryzen Families (PR #91277)
Simon Pilgrim via llvm-commits
- [llvm] 41dd07b - [AArch64] Add test coverage for bitreverse(logicalshift(bitreverse(x),y)) -> logicalshift(x,y) fold
Simon Pilgrim via llvm-commits
- [llvm] [GISel] Fold bitreverse(shl/srl(bitreverse(x),y)) -> srl/shl(x,y) (PR #91355)
Simon Pilgrim via llvm-commits
- [llvm] 63ceb9a - [X86] sext-subreg.ll - regenerate checks
Simon Pilgrim via llvm-commits
- [llvm] 7198b8a - [X86] x86-64-extend-shift.ll - regenerate checks
Simon Pilgrim via llvm-commits
- [llvm] [GISel] Fold bitreverse(shl/srl(bitreverse(x),y)) -> srl/shl(x,y) (PR #91355)
Simon Pilgrim via llvm-commits
- [llvm] [GISel] Fold bitreverse(shl/srl(bitreverse(x),y)) -> srl/shl(x,y) (PR #91355)
Simon Pilgrim via llvm-commits
- [llvm] [GISel] Fold bitreverse(shl/srl(bitreverse(x),y)) -> srl/shl(x,y) (PR #91355)
Simon Pilgrim via llvm-commits
- [llvm] VectorCombine: fix logical error after m_Trunc match (PR #91201)
Simon Pilgrim via llvm-commits
- [llvm] dd4bf22 - [X86] combineBlendOfPermutes - don't introduce lane-crossing permutes without AVX2 support.
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- [llvm] [GISel] Fold bitreverse(shl/srl(bitreverse(x),y)) -> srl/shl(x,y) (PR #91355)
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Teresa Johnson via llvm-commits
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Yingwei Zheng via llvm-commits
- [llvm] [Reassociate] Drop weight reduction to fix issue 91417 (PR #91469)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV] Improve use of BSETI/BCLRI in constant materialization. (PR #91546)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV] Improve use of BSETI/BCLRI in constant materialization. (PR #91546)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV] Improve use of BSETI/BCLRI in constant materialization. (PR #91546)
Yingwei Zheng via llvm-commits
- [llvm] [InstSimplify] Do not simplify freeze in `simplifyWithOpReplaced` (PR #91215)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV] Inhibit DAG folding shl through zext.w pattern with zba (PR #91626)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV] Add isel special case for (and (shl X, c2), c1) -> (slli_uw (srli x, c4-c2), c4). (PR #91638)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV] Add isel special case for (and (shl X, c2), c1) -> (slli_uw (srli x, c4-c2), c4). (PR #91638)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV] Add isel special case for (and (shl X, c2), c1) -> (slli_uw (srli x, c4-c2), c4). (PR #91638)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV] Add isel special case for (and (shl X, c2), c1) -> (slli_uw (srli x, c4-c2), c4). (PR #91638)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombineCompares] Replace the sqrt in if-condition (PR #91707)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Drop nuw flag when CtlzOp is a sub nuw (PR #91776)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
Yingwei Zheng via llvm-commits
- [llvm] [IR][PatternMatch] Make `m_Checked{Int,Fp}` accept `Constant *` output instead of `APInt *` (PR #91377)
Yingwei Zheng via llvm-commits
- [llvm] [IR][PatternMatch] Make `m_Checked{Int,Fp}` accept `Constant *` output instead of `APInt *` (PR #91377)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Propagate disjoint flags during shl-binop transform (PR #91333)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Propagate disjoint flags during shl-binop transform (PR #91333)
Yingwei Zheng via llvm-commits
- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
Yingwei Zheng via llvm-commits
- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
Yingwei Zheng via llvm-commits
- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
Yingwei Zheng via llvm-commits
- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
Yingwei Zheng via llvm-commits
- [llvm] [MemCpyOpt] Merge memset and skip unrelated clobber in one scan (PR #90350)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Propagate exact flags in shift-combine transforms (PR #88340)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Improve coverage of `foldSelectValueEquivalence` (PR #88298)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Improve coverage of `foldSelectValueEquivalence` (PR #88298)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Improve coverage of `foldSelectValueEquivalence` (PR #88298)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Improve coverage of `foldSelectValueEquivalence` (PR #88298)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Propagate disjoint flags during shl-binop transform (PR #91333)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Improve coverage of `foldSelectValueEquivalence` (PR #88298)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)
Yingwei Zheng via llvm-commits
- [llvm] [RISCV] Use RISCVISD::SHL_ADD in transformAddShlImm [NFC] (PR #89832)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold `(icmp pred (trunc nuw/nsw X), C)` -> `(icmp pred X, (zext/sext C))` (PR #87935)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold `(icmp pred (trunc nuw/nsw X), C)` -> `(icmp pred X, (zext/sext C))` (PR #87935)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold `(icmp pred (trunc nuw/nsw X), C)` -> `(icmp pred X, (zext/sext C))` (PR #87935)
Yingwei Zheng via llvm-commits
- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
Yingwei Zheng via llvm-commits
- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Fold `(op x, ({z,s}ext (icmp eq x, C)))` to select (PR #89020)
Yingwei Zheng via llvm-commits
- [llvm] [ValueTracking] Extend LHS/RHS with matching operand to work without constants. (PR #85557)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Drop nuw flag when CtlzOp is a sub nuw (PR #91776)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Drop nuw flag when CtlzOp is a sub nuw (PR #91776)
Yingwei Zheng via llvm-commits
- [llvm] [InstCombine] Drop nuw flag when CtlzOp is a sub nuw (PR #91776)
Yingwei Zheng via llvm-commits
- [llvm] [Reassociate] Drop weight reduction to fix issue 91417 (PR #91469)
Yingwei Zheng via llvm-commits
- [clang] [llvm] [clang][dataflow] Make `SolverTest` a type-parameterized test. (PR #91455)
Yitzhak Mandelbaum via llvm-commits
- [llvm] [llvm][NVPTX] Remove outdated comments (NFC) (PR #91409)
Youngsuk Kim via llvm-commits
- [llvm] [llvm][NVPTX] Remove outdated comments (NFC) (PR #91409)
Youngsuk Kim via llvm-commits
- [lldb] [llvm] [lldb] Refactor string manipulation in Debugger.cpp (#91209) (PR #91880)
Youngsuk Kim via llvm-commits
- [lldb] [llvm] [lldb] Refactor string manipulation in Debugger.cpp (#91209) (PR #91880)
Youngsuk Kim via llvm-commits
- [lld] [llvm] MIPS: Use pcrel|sdata4 for eh_frame (PR #91291)
YunQiang Su via llvm-commits
- [lld] [llvm] MIPS: Use pcrel|sdata4 for eh_frame (PR #91291)
YunQiang Su via llvm-commits
- [lld] [llvm] MIPS: Use pcrel|sdata4 for eh_frame (PR #91291)
YunQiang Su via llvm-commits
- [lld] [llvm] MIPS: Use pcrel|sdata4 for eh_frame (PR #91291)
YunQiang Su via llvm-commits
- [lld] [llvm] MIPS: Use pcrel|sdata4 for eh_frame (PR #91291)
YunQiang Su via llvm-commits
- [lld] [llvm] MIPS: Use pcrel|sdata4 for eh_frame (PR #91291)
YunQiang Su via llvm-commits
- [lld] [llvm] MIPS: Use pcrel|sdata4 for eh_frame (PR #91291)
YunQiang Su via llvm-commits
- [llvm] MIPS: Support '%w' token in inline asm template for MSA (PR #91920)
YunQiang Su via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)
Yuta Mukai via llvm-commits
- [llvm] [NFC] CoroElide: Refactor `Lowerer` into `CoroIdElider` (PR #91539)
Yuxuan Chen via llvm-commits
- [llvm] [NFC] CoroElide: Refactor `Lowerer` into `CoroIdElider` (PR #91539)
Yuxuan Chen via llvm-commits
- [llvm] [NFC] CoroElide: Refactor `Lowerer` into `CoroIdElider` (PR #91539)
Yuxuan Chen via llvm-commits
- [llvm] [NFC] CoroElide: Refactor `Lowerer` into `CoroIdElider` (PR #91539)
Yuxuan Chen via llvm-commits
- [llvm] [NFC] CoroElide: Refactor `Lowerer` into `CoroIdElider` (PR #91539)
Yuxuan Chen via llvm-commits
- [llvm] [NFC] CoroElide: Refactor `Lowerer` into `CoroIdElider` (PR #91539)
Yuxuan Chen via llvm-commits
- [llvm] [NFC] CoroElide: Refactor `Lowerer` into `CoroIdElider` (PR #91539)
Yuxuan Chen via llvm-commits
- [clang] [llvm] [C++23] [CLANG] Adding C++23 constexpr math functions: fmin and frexp. (PR #88978)
Zahira Ammarguellat via llvm-commits
- [clang] [llvm] [C++23] [CLANG] Adding C++23 constexpr math functions: fmin, fmax and frexp. (PR #88978)
Zahira Ammarguellat via llvm-commits
- [clang] [llvm] [C++23] [CLANG] Adding C++23 constexpr math functions: fmin, fmax and frexp. (PR #88978)
Zahira Ammarguellat via llvm-commits
- [llvm] [AArch64][SVE] Handle consecutive Predicates in CC_AArch64_Custom_Block (PR #90122)
Zhaoshi Zheng via llvm-commits
- [llvm] [AArch64][SVE] Handle consecutive Predicates in CC_AArch64_Custom_Block (PR #90122)
Zhaoshi Zheng via llvm-commits
- [llvm] [AArch64][SVE] Handle consecutive Predicates in CC_AArch64_Custom_Block (PR #90122)
Zhaoshi Zheng via llvm-commits
- [llvm] [AArch64][SVE] Handle consecutive Predicates in CC_AArch64_Custom_Block (PR #90122)
Zhaoshi Zheng via llvm-commits
- [llvm] Riscv branch peephole opt (PR #90451)
Zhijin Zeng via llvm-commits
- [clang] [llvm] [InstallAPI] Support mutually exclusive parse options (PR #90686)
Zixu Wang via llvm-commits
- [llvm] [llvm][MachO] Fix integer truncation in rebase/bind parsing (PR #89337)
Zixu Wang via llvm-commits
- [llvm] [llvm][MachO] Fix integer truncation in rebase/bind parsing (PR #89337)
Zixu Wang via llvm-commits
- [llvm] [llvm][MachO] Fix integer truncation in rebase/bind parsing (PR #89337)
Zixu Wang via llvm-commits
- [llvm] [llvm][MachO] Fix integer truncation in rebase/bind parsing (PR #89337)
Zixu Wang via llvm-commits
- [flang] [llvm] [flang] Add ETIME runtime and lowering intrinsics implementation (PR #90578)
jiajie zhang via llvm-commits
- [flang] [llvm] [flang] Add ETIME runtime and lowering intrinsics implementation (PR #90578)
jiajie zhang via llvm-commits
- [flang] [llvm] [flang] Add ETIME runtime and lowering intrinsics implementation (PR #90578)
jiajie zhang via llvm-commits
- [flang] [llvm] [flang] Add ETIME runtime and lowering intrinsics implementation (PR #90578)
jiajie zhang via llvm-commits
- [llvm] d654278 - Reapply "AMDGPU: Implement llvm.set.rounding (#88587)" series (#91113)
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- [llvm] [LoongArch] Optimize *W Instructions at MI level (PR #90463)
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- [llvm] [LoongArch] Optimize *W Instructions at MI level (PR #90463)
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- [llvm] ef8d814 - Revert "Remove redundant move in return statement" (#91169)
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- [llvm] [InstCombine] Fold `trunc nuw/nsw (x xor y) to i1` to `x != y` (PR #90408)
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- [llvm] [ValueTracking] Recognize `LShr(UINT_MAX, Y) + 1` as a power-of-two (PR #91171)
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- [llvm] [ValueTracking] Recognize `LShr(UINT_MAX, Y) + 1` as a power-of-two (PR #91171)
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- [llvm] [InstCombine] Fold `trunc nuw/nsw (x xor y) to i1` to `x != y` (PR #90408)
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- [clang] [llvm] [RISCV] Teach .option arch to support experimental extensions. (PR #89727)
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- [llvm] d3dad7a - [InstCombine] Fix miscompilation caused by #90436 (#91133)
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- [llvm] 8a65ee8 - [AMDGPU] don't mark control-flow intrinsics as convergent (#90026)
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- [llvm] [RISCV] Convert implicit_def tuples to noreg in post-isel peephole (PR #91173)
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- [llvm] e9bcd2b - [LoongArch] Optimize *W Instructions at MI level (#90463)
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- [llvm] [LoongArch] Optimize *W Instructions at MI level (PR #90463)
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- [llvm] [InstCombine] Fold `trunc nuw/nsw (x xor y) to i1` to `x != y` (PR #90408)
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- [llvm] [Reassociate] Adds test coverage for reassociation of scalar & vector boolean types (PR #89899)
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- [llvm] [SystemZ] Simplify f128 atomic load/store (PR #90977)
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- [llvm] [LoongArch] Optimize codegen for ISD::ROTL (PR #91174)
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- [llvm] [LoongArch] Optimize codegen for ISD::ROTL (PR #91174)
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- [llvm] [X86][AVX] Fix handling of out-of-bounds shift amounts in AVX2 vector logical shift nodes #83840 (PR #86922)
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- [clang] [clang-tools-extra] [compiler-rt] [flang] [lldb] [llvm] [mlir] [openmp] [pstl] Finally formalise our defacto line-ending policy (PR #86318)
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- [llvm] [TII][NFC] Add renamable bit to copyPhysReg (PR #91179)
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- [llvm] [TII][NFC] Add renamable bit to copyPhysReg (PR #91179)
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- [llvm] [FunctionAttrs] Fix incorrect nonnull inference for non-inbounds GEP (PR #91180)
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- [llvm] 522b4bf - [DAG] Fold bitreverse(shl/srl(bitreverse(x),y)) -> srl/shl(x,y) (#89897)
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- [llvm] 0a0cac6 - [SystemZ] Simplify f128 atomic load/store (#90977)
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- [llvm] 8e7618a - [X86] Fold BLEND(PERMUTE(X),PERMUTE(Y)) -> PERMUTE(BLEND(X,Y)) (#90219)
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- [clang] [llvm] [RISCV] Teach .option arch to support experimental extensions. (PR #89727)
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- [llvm] [VPlan] Add new VPInstruction ocpode for header mask. (PR #89603)
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- [llvm] [VPlan] Add new VPInstruction ocpode for header mask. (PR #89603)
via llvm-commits
- [llvm] [VPlan] Add new VPInstruction ocpode for header mask. (PR #89603)
via llvm-commits
- [llvm] [VPlan] Add new VPInstruction ocpode for header mask. (PR #89603)
via llvm-commits
- [llvm] [VPlan] Add new VPInstruction ocpode for header mask. (PR #89603)
via llvm-commits
- [llvm] [VPlan] Add new VPInstruction ocpode for header mask. (PR #89603)
via llvm-commits
- [llvm] [VPlan] Add new VPInstruction ocpode for header mask. (PR #89603)
via llvm-commits
- [llvm] [VPlan] Add new VPInstruction ocpode for header mask. (PR #89603)
via llvm-commits
- [llvm] [VPlan] Add new VPInstruction ocpode for header mask. (PR #89603)
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- [llvm] [ValueTracking] Recognize `LShr(UINT_MAX, Y) + 1` as a power-of-two (PR #91171)
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- [llvm] [llvm-diff] Also diff alloca's allocated type and alignment (PR #84781)
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- [llvm] [obj2yaml] Add support for ELF .debug_info and .debug_abbrev (PR #91193)
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- [lld] [llvm] Revert "Reapply "Use an abbrev to reduce size of VALUE_GUID records in ThinLTO summaries" (#90610)" (PR #91194)
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- [lld] [lld-macho] Fix category merging category map non-determinism (PR #91159)
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- [lld] [lld-macho] Category Merger: add support for addrsig references (PR #90903)
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- [llvm] [AMDGPU] Always Inline preserved analyses (PR #91198)
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- [llvm] [LAA] Always use DepCands when grouping runtime checks. (PR #91196)
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- [llvm] [AMDGPU] Always Inline preserved analyses (PR #91198)
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- [lld] [lld-macho] Add support for category names in ConcatInputSection's (PR #90850)
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- [lld] [lld-macho] Fix category merging category map non-determinism (PR #91159)
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- [lld] [lld-macho] Fix category merging category map non-determinism (PR #91159)
via llvm-commits
- [llvm] [AMDGPU] Always Inline preserved analyses (PR #91198)
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- [libc] [llvm] [libc]Add proxy header hdr/float-macros.h (PR #88674)
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- [llvm] VectorCombine: add test for crash #88796 (PR #91200)
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- [libc] [llvm] [libc]Add proxy header hdr/float-macros.h (PR #88674)
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- [libc] [llvm] [libc]Add proxy header hdr/float-macros.h (PR #88674)
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- [libc] [llvm] [libc]Add proxy header hdr/float-macros.h (PR #88674)
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- [llvm] VectorCombine: fix logical error after m_Trunc match (PR #91201)
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- [llvm] [InstCombine] Canonicalize reassoc contract fmuladd to fmul + fadd (PR #90434)
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- [llvm] [AggressiveInstCombine] Fix strncmp inlining (PR #91204)
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- [llvm] d71771d - Revert "Reapply "Use an abbrev to reduce size of VALUE_GUID records in ThinLTO summaries" (#90610)" (#91194)
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- [llvm] [X86][AMX] Fix a bug after #83628 (PR #91207)
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- [llvm] 1b22eca - Revert "[AIX][CMake] Use top-level tools in llvm_ExternalProject_Add" (#91019)
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- [llvm] [openmp] [OpenMP] Add Environment Variable to disable Reuse of Blocks for High Loop Trip Counts (PR #89239)
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- [llvm] 1241e76 - [AggressiveInstCombine] Fix strncmp inlining (#91204)
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- [llvm] Remove redundant move in return statement (PR #91210)
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- [llvm] [AMDGPU] Always Inline preserved analyses (PR #91198)
via llvm-commits
- [llvm] [AMDGPU] Always Inline preserved analyses (PR #91198)
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- [llvm] [InstSimplify] Do not simplify a multi-use freeze in `simplifyWithOpReplaced` (PR #91215)
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- [llvm] [SelectionDAG] Fold (icmp eq/ne (shift X, C), 0) -> (icmp eq/ne X, 0) (PR #88801)
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- [llvm] [PatternMatching] Add generic API for matching constants using custom conditions (PR #85676)
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- [llvm] [InstCombine] Remove some of the complexity-based canonicalization (PR #91185)
via llvm-commits
- [llvm] [InstCombine] Remove some of the complexity-based canonicalization (PR #91185)
via llvm-commits
- [llvm] [InstCombine] Remove some of the complexity-based canonicalization (PR #91185)
via llvm-commits
- [llvm] [InstCombine] Remove some of the complexity-based canonicalization (PR #91185)
via llvm-commits
- [llvm] [InstCombine] Remove some of the complexity-based canonicalization (PR #91185)
via llvm-commits
- [llvm] [InstCombine] Remove some of the complexity-based canonicalization (PR #91185)
via llvm-commits
- [llvm] [InstCombine] Remove some of the complexity-based canonicalization (PR #91185)
via llvm-commits
- [llvm] [InstCombine] Remove some of the complexity-based canonicalization (PR #91185)
via llvm-commits
- [llvm] [InstCombine] Remove some of the complexity-based canonicalization (PR #91185)
via llvm-commits
- [llvm] [InstCombine] Remove some of the complexity-based canonicalization (PR #91185)
via llvm-commits
- [llvm] [InstCombine] Remove some of the complexity-based canonicalization (PR #91185)
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- [clang] [llvm] demangle function names in trace files (PR #87626)
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- [llvm] 9d9bd76 - [RISCV] Check dead flag on VL def op in RISCVCoalesceVSETVLI. NFC (#91168)
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- [llvm] [coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (PR #90265)
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- [llvm] [coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (PR #90265)
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- [llvm] [coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (PR #90265)
via llvm-commits
- [llvm] [coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (PR #90265)
via llvm-commits
- [llvm] [AMDGPU] Always Inline preserved analyses (PR #91198)
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- [clang] [compiler-rt] [libc] [libclc] [libcxxabi] [lld] [lldb] [llvm] [mlir] Add clarifying parenthesis around non-trivial conditions in ternary expressions. (PR #90391)
via llvm-commits
- [llvm] [SelectionDAG] Fold (icmp eq/ne (shift X, C), 0) -> (icmp eq/ne X, 0) (PR #88801)
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- [llvm] Reduce llvm-gsymutil memory usage (PR #91023)
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- [llvm] [InstCombine] Remove some of the complexity-based canonicalization (PR #91185)
via llvm-commits
- [lld] [lld-macho] Fix category merging category map non-determinism (PR #91159)
via llvm-commits
- [llvm] 52187b9 - [RISCV] Move RISCVDeadRegisterDefinitions to post vector regalloc (#90636)
via llvm-commits
- [llvm] [BOLT][DWARF] Refactor helper functions that update DW_AT_comp_dir/DW_AT_dwo_name (PR #91237)
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- [lld] 5fa24ac - [lld-macho] Category Merger: add support for addrsig references (#90903)
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- [lld] [lld-macho] Category Merger: add support for addrsig references (PR #90903)
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- [lld] 9fc0b18 - [lld-macho] Add support for category names in ConcatInputSection's (#90850)
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- [lld] [lld-macho] Add support for category names in ConcatInputSection's (PR #90850)
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- [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)
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- [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)
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- [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)
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- [llvm] goldsteinn/dag shift flags (PR #91239)
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- [llvm] [DAGCombiner] Set shift flags during visit. (PR #91239)
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- [llvm] [DAGCombiner] Set shift flags during visit. (PR #91239)
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- [llvm] [DAGCombiner] Set shift flags during visit. (PR #91239)
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- [llvm] [SelectionDAG] Fold (icmp eq/ne (shift X, C), 0) -> (icmp eq/ne X, 0) (PR #88801)
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- [llvm] [DAGCombiner] Set shift flags during visit. (PR #91239)
via llvm-commits
- [llvm] [InstCombine] Remove some of the complexity-based canonicalization (PR #91185)
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- [clang] [llvm] demangle function names in trace files (PR #87626)
via llvm-commits
- [llvm] [InstCombine] Fold `cttz(lshr(-1, x) + 1)` to `width - x` (PR #91244)
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- [llvm] [InstCombine] Fold `cttz(lshr(-1, x) + 1)` to `width - x` (PR #91244)
via llvm-commits
- [llvm] d0be944 - [X86] Add slow div64 tuning flag to Nehalem target (#91129)
via llvm-commits
- [llvm] [LoopUnroll] Remove redundant debug instructions after blocks have been merged (PR #91246)
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- [llvm] [LoopUnroll] Remove redundant debug instructions after blocks have been merged (PR #91246)
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- [llvm] [InstCombine] Fold `cttz(lshr(-1, x) + 1)` to `width - x` (PR #91244)
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- [llvm] d3e77f5 - Try to use non-volatile registers for `preserve_none` parameters (#88333)
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- [clang] [llvm] Try to use non-volatile registers for `preserve_none` parameters (PR #88333)
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- [clang] [llvm] Try to use non-volatile registers for `preserve_none` parameters (PR #88333)
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- [llvm] [GVNSink] Fix non-determinisms by using Depth-First ordering (PR #90995)
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- [llvm] [DAGCombiner] Set shift flags during visit. (PR #91239)
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- [llvm] [CodeGen] Regen some old tests; NFC (PR #91250)
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- [llvm] [DAGCombiner] Set shift flags during visit. (PR #91239)
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- [llvm] [CodeGen] Regen some old tests; NFC (PR #91250)
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- [llvm] [CodeGen] Regen some old tests; NFC (PR #91250)
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- [llvm] [PatternMatching] Add generic API for matching constants using custom conditions (PR #85676)
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- [llvm] [CVP][SCCP] Add support for `uitofp nneg` (PR #86154)
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- [llvm] [DomTree] Provide a way to query if DFSInfo is valid (PR #91251)
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- [llvm] [DomTree] Provide a way to query if DFSInfo is valid (PR #91251)
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- [llvm] NFC: Add a comment indicating UpdateAnalysisInformation invalidates DFS Numbering (PR #91252)
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- [llvm] NFC: Add a comment indicating UpdateAnalysisInformation invalidates DFS Numbering (PR #91252)
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- [llvm] [NFC][X86] Fix check directive typo in preserve_none dynamic regmask test (PR #91048)
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- [llvm] LoopVectorize: optimize VF for low TC, when tail-folding (PR #91253)
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- [compiler-rt] Revert "[scudo] Only init RingBuffer when needed." (PR #91256)
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- [libc] [llvm] [libc]Add proxy header hdr/float-macros.h (PR #88674)
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- [llvm] [DirectX] remove string function attribute DXIL not allowed (PR #90778)
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- [libc] [llvm] [libc]Add proxy header hdr/float-macros.h (PR #88674)
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- [libc] [llvm] [libc]Add proxy header hdr/float-macros.h (PR #88674)
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- [llvm] [DomTree] Provide a way to query if DFSInfo is valid (PR #91251)
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- [clang] [llvm] OpenMP offload 'simd' directive (PR #91261)
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- [clang] [llvm] OpenMP offload 'simd' directive (PR #91261)
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- [clang] [llvm] [WIP][OpenMP] Remove dependency on `libffi` from offloading runtime (PR #91264)
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- [llvm] [DomTree] Provide a way to query if DFSInfo is valid (PR #91251)
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- [llvm] [DomTree] Provide a way to query if DFSInfo is valid (PR #91251)
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- [llvm] fcf341d - [coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265)
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- [llvm] [AMDGPU] Don't optimize agpr phis if there the operand doesn't have subreg use (PR #91267)
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- [llvm] [InstCombine] Fold ((X << nuw Z) + nuw Y) >>u Z --> X + nuw (Y >>u Z) (PR #88193)
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- [llvm] [InstCombine] Fold ((X << nuw Z) + nuw Y) >>u Z --> X + nuw (Y >>u Z) (PR #88193)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #90295)
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- [llvm] [InstCombine] Fold ((X << nuw Z) + nuw Y) >>u Z --> X + nuw (Y >>u Z) (PR #88193)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #90295)
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- [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)
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- [llvm] afeedd9 - [DirectX][docs] Document DXContainer format (#90908)
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- [clang] [llvm] [Libomptarget] Statically link all plugin runtimes (PR #87009)
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- [clang] [llvm] [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #90809)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #90295)
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- [clang] [llvm] [Libomptarget] Statically link all plugin runtimes (PR #87009)
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- [llvm] [X86] Enable TuningSlowDivide64 on Barcelona/Bobcat/Bulldozer/Ryzen Families (PR #91277)
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- [llvm] [InstCombine] Fold ((X << nuw Z) + nuw Y) >>u Z --> X + nuw (Y >>u Z) (PR #88193)
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- [compiler-rt] Enable ASAN checks for wcscat/wcsncat on Windows, and wcscpy/wcsncpy on all platforms (PR #90909)
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- [lld] [lld-macho] Fix category merging category map non-determinism (PR #91159)
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- [llvm] 080978d - [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (#90809)
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- [clang] [llvm] [MC,clang,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
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- [clang] [llvm] [MC,clang,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
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- [llvm] [InstCombine] Fold ((X << nuw Z) + nuw Y) >>u Z --> X + nuw (Y >>u Z) (PR #88193)
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- [llvm] [InstCombine] Fold ((X << nuw Z) + nuw Y) >>u Z --> X + nuw (Y >>u Z) (PR #88193)
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- [llvm] [docs] Add a section on AI-generated content to the developer policy (PR #91014)
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- [llvm] [docs] Add a section on AI-generated content to the developer policy (PR #91014)
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- [llvm] 29d447a - [clang][modules] stdarg.h and stddef.h shouldn't directly declare anything (#90676)
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- [llvm] [Offload] Detect native ELF machine from preprocessor (PR #91282)
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- [llvm] 2287f8d - [NFC][X86] Fix check directive typo in preserve_none dynamic regmask test (#91048)
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- [llvm] [NFC][X86] Fix check directive typo in preserve_none dynamic regmask test (PR #91048)
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- [llvm] [Offload] Detect target triple from preprocessor instead of CMake (PR #91283)
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- [lld] 6e5ed35 - [lld-macho] Fix category merging category map non-determinism (#91159)
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- [lld] [lld-macho] Fix category merging category map non-determinism (PR #91159)
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- [compiler-rt] [Sanitizers] Fix fake_test_gc not working on devices (PR #91284)
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- [llvm] Reduce llvm-gsymutil memory usage (PR #91023)
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- [llvm] Reduce llvm-gsymutil memory usage (PR #91023)
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- [llvm] Reduce llvm-gsymutil memory usage (PR #91023)
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- [llvm] Reduce llvm-gsymutil memory usage (PR #91023)
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- [llvm] Reduce llvm-gsymutil memory usage (PR #91023)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [flang] [llvm] [flang][OpenMP] Decompose compound constructs, do recursive lowering (PR #90098)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #90295)
via llvm-commits
- [clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [llvm] de8cf69 - [LangRef] callbr result can be used in all successors (#91167)
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- [llvm] f34d30c - [FunctionAttrs] Fix incorrect nonnull inference for non-inbounds GEP (#91180)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [llvm] fd0ffb7 - [ValueTracking] Recognize `LShr(UINT_MAX, Y) + 1` as a power-of-two (#91171)
via llvm-commits
- [llvm] [LoongArch] Optimize codegen for ISD::ROTL (PR #91174)
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- [llvm] [LoongArch] Optimize codegen for ISD::{ROTL,ROTR} (PR #91174)
via llvm-commits
- [llvm] [LoongArch] Optimize codegen for ISD::{ROTL,ROTR} (PR #91174)
via llvm-commits
- [llvm] [ThinLTO][BitcodeWriter] Write import type in per-module combined summary (PR #87600)
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- [llvm] 0ab4458 - [InstCombine] Fold `cttz(lshr(-1, x) + 1)` to `width - x` (#91244)
via llvm-commits
- [clang] [llvm] Revert "[DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version" (PR #91290)
via llvm-commits
- [llvm] 178ff39 - Revert "[DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version" (#91290)
via llvm-commits
- [llvm] [LoopUnroll] Remove redundant debug instructions after blocks have been merged (PR #91246)
via llvm-commits
- [lld] [llvm] MIPS: Use pcrel|sdata4 for eh_frame (PR #91291)
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- [lld] [llvm] MIPS: Use pcrel|sdata4 for eh_frame (PR #91291)
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- [llvm] 37fcb32 - [RISCV] Add codegen support for Zvfbfmin (#87911)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
via llvm-commits
- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
via llvm-commits
- [clang] [llvm] [Libomptarget] Statically link all plugin runtimes (PR #87009)
via llvm-commits
- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
via llvm-commits
- [llvm] aac83fc - [Reassociate] Adds test coverage for reassociation of scalar & vector boolean types (#89899)
via llvm-commits
- [llvm] [LoongArch] Optimize codegen for ISD::{ROTL,ROTR} (PR #91174)
via llvm-commits
- [llvm] [LoongArch] Optimize codegen for ISD::{ROTL,ROTR} (PR #91174)
via llvm-commits
- [llvm] [LoongArch] Optimize codegen for ISD::{ROTL,ROTR} (PR #91174)
via llvm-commits
- [llvm] [openmp] [OpenMP][OMPX] Add ballot_sync (PR #91297)
via llvm-commits
- [llvm] [openmp] [OpenMP][OMPX] Add ballot_sync (PR #91297)
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- [llvm] 879245e - [NFC]Extract the heuristic to find vtable for an indirect call into a helper function (#81024)
via llvm-commits
- [llvm] [LoongArch] Optimize codegen for ISD::{ROTL,ROTR} (PR #91174)
via llvm-commits
- [llvm] [LoongArch] Optimize codegen for ISD::{ROTL,ROTR} (PR #91174)
via llvm-commits
- [llvm] [InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (PR #87474)
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- [llvm] b42f553 - [GlobalIsel] Combine extract vector element (#90339)
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- [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)
via llvm-commits
- [llvm] [Analysis, CodeGen, DebugInfo] Use StringRef::operator== instead of StringRef::equals (NFC) (PR #91304)
via llvm-commits
- [llvm] [LoongArch] Optimize codegen for ISD::{ROTL,ROTR} (PR #91174)
via llvm-commits
- [llvm] ad59967 - [LoongArch] Optimize codegen for ISD::{ROTL, ROTR} (#91174)
via llvm-commits
- [llvm] [LoongArch] Optimize codegen for ISD::{ROTL,ROTR} (PR #91174)
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- [clang] [llvm] [AArch64] Add intrinsics for multi-vector to ZA array vector accumulators (PR #88266)
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- [clang] [llvm] [AArch64] Add intrinsics for 16-bit non-widening FMLA/FMLS (PR #88553)
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- [llvm] 1de0535 - [llvm-mca] Abort on parse error without -skip-unsupported-instructions (#90474)
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- [llvm] 1530f31 - [RemoveDIs] Update some unittests to the new format (#90476)
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- [lldb] [llvm] [AArch64] move extension information into tablgen (PR #90987)
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- [llvm] 50da768 - [AVR][NFC] Improve format of target description files (#91296)
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- [llvm] d838e5b - [X86] Add FastImm16 tuning flag to Intel Atom + AMD Bobcat/Ryzen Families (#90635)
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- [llvm] 6ce0474 - [SDISel] Teach the type legalizer about ADDRSPACECAST (#90969)
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- [llvm] abd3149 - [X86] Use GFNI for vXi8 shifts/rotates (#89115)
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- [clang] [llvm] [BPF] Fix linking issues in static map initializers (PR #91310)
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- [clang] [llvm] [BPF] Fix linking issues in static map initializers (PR #91310)
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- [clang] [llvm] [BPF] Fix linking issues in static map initializers (PR #91310)
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- [clang] [llvm] [AArch64] Fix feature flags dependecies (PR #90612)
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- [clang] [llvm] [AArch64] Fix feature flags dependecies (PR #90612)
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- [llvm] 235cea7 - [NFC][LLVM] Refactor rounding mode detection of constrained fp intrinsic IDs (#90854)
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- [llvm] 651bdb9 - [ARM] Armv8-R does not require fp64 or neon. (#88287)
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- [clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)
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- [llvm] [LoopUnroll] Remove redundant debug instructions after blocks have been merged (PR #91246)
via llvm-commits
- [clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)
via llvm-commits
- [llvm] [RISCV] Remove hasSideEffects=1 for vsetvli pseudos (PR #91319)
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- [llvm] dcc7ef3 - [AMDGPU][MC] Disable sendmsg SYSMSG_OP_HOST_TRAP_ACK on gfx9+ (#90203)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [llvm] [AMDGPU] Extend llvm.amdgcn.update.dpp intrinsic to support f64 (PR #91190)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Select G_ICMP instruction through TableGen (PR #89932)
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- [llvm] [AArch64][GlobalISel] Select G_ICMP Zero Instruction (PR #90054)
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- [llvm] [LAA] Always use DepCands when grouping runtime checks. (PR #91196)
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- [llvm] [AMDGPU] Add tests for vector rebroadcast. (PR #91322)
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- [llvm] DAG: Skip 0 sign handling in minimum/maximum lowering for _ieee case (PR #91326)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [llvm] [AArch64] Remove EXT instr before UZP when extracting elements from vector (PR #91328)
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- [llvm] [AMDGPU] Disallow negative s_load offsets in isLegalAddressingMode (PR #91327)
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- [llvm] [AArch64] Remove EXT instr before UZP when extracting elements from vector (PR #91328)
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- [llvm] [AArch64] Remove EXT instr before UZP when extracting elements from vector (PR #91328)
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- [llvm] [AArch64] Remove EXT instr before UZP when extracting elements from vector (PR #91328)
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- [llvm] [AArch64] Remove EXT instr before UZP when extracting elements from vector (PR #91328)
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- [llvm] [LLVM][CodeGen][SVE] Clean up lowering of VECTOR_SPLICE operations. (PR #91330)
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- [llvm] [InstCombine] Propogate disjoint flags during shl-binop transform (PR #91333)
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- [llvm] [InstCombine] Propogate disjoint flags during shl-binop transform (PR #91333)
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- [llvm] [NewPM] Add pass options for `InternalizePass` to preserve GVs. (PR #91334)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
via llvm-commits
- [clang] [llvm] [AArch64] Fix feature flags dependecies (PR #90612)
via llvm-commits
- [llvm] [InstCombine] Propogate disjoint flags during shl-binop transform (PR #91333)
via llvm-commits
- [llvm] [InstCombine] Propogate disjoint flags during shl-binop transform (PR #91333)
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- [clang] [llvm] [AArch64] Fix feature flags dependecies (PR #90612)
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- [clang] [llvm] [AArch64] Fix feature flags dependecies (PR #90612)
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- [clang] [llvm] [AArch64] Fix feature flags dependecies (PR #90612)
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- [llvm] [X86] Reduce znver3/4 LoopMicroOpBufferSize to practical loop unrolling values (PR #91340)
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- [llvm] [InstCombine] Propogate disjoint flags during shl-binop transform (PR #91333)
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- [llvm] [InstCombine] Propogate disjoint flags during shl-binop transform (PR #91333)
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- [llvm] [InstCombine] Propogate disjoint flags during shl-binop transform (PR #91333)
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- [llvm] [RISCV] Add imply rule for zcd/zcf. (PR #91342)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [llvm] [LLVM][AArch64]Use load/store with consecutive registers in SME2 or S… (PR #77665)
via llvm-commits
- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
via llvm-commits
- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
via llvm-commits
- [llvm] [LLVM][AArch64]Use load/store with consecutive registers in SME2 or S… (PR #77665)
via llvm-commits
- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
via llvm-commits
- [llvm] [DAGCombiner] Set shift flags during visit. (PR #91239)
via llvm-commits
- [llvm] [CodeGen] Regen some old tests; NFC (PR #91250)
via llvm-commits
- [llvm] [CodeGen] Regen some old tests; NFC (PR #91250)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
via llvm-commits
- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
via llvm-commits
- [libcxx] [llvm] [libc++][CI] Reenables clang-tidy. (PR #90077)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
via llvm-commits
- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
via llvm-commits
- [llvm] Add interface to check if a call has a deopt bundle (NFC) (PR #91348)
via llvm-commits
- [llvm] Add interface to check if a call has a deopt bundle (NFC) (PR #91348)
via llvm-commits
- [llvm] [InstCombine] Propogate disjoint flags during shl-binop transform (PR #91333)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
via llvm-commits
- [llvm] [SampleProfileLoader] Fix integer overflow in generateMDProfMetadata (PR #90217)
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- [llvm] [SampleProfileLoader] Fix integer overflow in generateMDProfMetadata (PR #90217)
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- [llvm] [SampleProfileLoader] Fix integer overflow in generateMDProfMetadata (PR #90217)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [llvm] [GISel] Fold bitreverse(shl/srl(bitreverse(x),y)) -> srl/shl(x,y) (PR #91355)
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- [llvm] [GISel] Fold bitreverse(shl/srl(bitreverse(x),y)) -> srl/shl(x,y) (PR #91355)
via llvm-commits
- [llvm] 8bcb073 - [Clang] -fseparate-named-sections option (#91028)
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- [llvm] 7927bcd - AMDGPU: Do not bitcast atomicrmw in IR (#90045)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
via llvm-commits
- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [llvm] [DirectX backend] emits metadata for DXIL version. (PR #88350)
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- [clang] [llvm] [AArch64] Add support for Qualcomm Oryon processor (PR #91022)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [llvm] 026a29e - [Analysis, CodeGen, DebugInfo] Use StringRef::operator== instead of StringRef::equals (NFC) (#91304)
via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
via llvm-commits
- [llvm] [ADT] Add back ability to compare StringSet (PR #91374)
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- [llvm] [AMDGPU] Fix condition in VOP3_Real_Base. NFCI. (PR #91373)
via llvm-commits
- [llvm] Reapply "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265) (PR #91372)
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- [llvm] [DAGCombiner] Be more careful about looking through extends and trunc… (PR #91375)
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- [llvm] [DAGCombiner] Be more careful about looking through extends and trunc… (PR #91375)
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- [llvm] [GVN] Freeze value if `undef` when forwarding local memset to loads (PR #91376)
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- [llvm] [IR][PatternMatch] Make `m_Checked{Int,Fp}` accept `Constant *` output instead of `APInt *` (PR #91377)
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- [llvm] 1a2a1fb - [WebAssembly] Implement prototype f32.load_f16 instruction. (#90906)
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- [llvm] [IR][PatternMatch] Make `m_Checked{Int,Fp}` accept `Constant *` output instead of `APInt *` (PR #91377)
via llvm-commits
- [llvm] [InstCombine] Remove some of the complexity-based canonicalization (PR #91185)
via llvm-commits
- [llvm] [PatternMatching] Add generic API for matching constants using custom conditions (PR #85676)
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- [llvm] [IR][PatternMatch] Make `m_Checked{Int,Fp}` accept `Constant *` output instead of `APInt *` (PR #91377)
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- [llvm] [AMDGPU] Prevent FMINIMUM and FMAXIMUM beeing fully scalarized (PR #91378)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
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- [llvm] 1e36c96 - [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (#88193)
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- [llvm] 2a4f1f4 - Document FP relative offsets (#91031)
via llvm-commits
- [llvm] c9ab1d8 - Mark test cases as unsupported on z/OS (#90990)
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- [clang] [llvm] Mark test cases as unsupported on z/OS (PR #90990)
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- [llvm] [yaml2obj][GOFF] Fix writing GOFF header (PR #91383)
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- [llvm] 82bb253 - AMDGPU: Don't bitcast float typed atomic store in IR (#90116)
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- [llvm] Add reverse of ((X << nuw Z) sub nuw Y) >>u exact Z --> X sub nuw (Y >>u exact Z) (PR #91386)
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- [llvm] Add reverse of ((X << nuw Z) sub nuw Y) >>u exact Z --> X sub nuw (Y >>u exact Z) (PR #91386)
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- [llvm] [CVP][SCCP] Add support for `uitofp nneg` (PR #86154)
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- [llvm] [IR] Remove check for bitcast of called function in CallBase::has/getFnAttrOnCalledFunction (PR #91392)
via llvm-commits
- [llvm] 5e9dd88 - [DirectX] remove string function attribute DXIL not allowed (#90778)
via llvm-commits
- [llvm] 9a28814 - [PowerPC] Spill non-volatile registers required for traceback table (#71115)
via llvm-commits
- [llvm] [IR] Check callee param attributes as well in CallBase::getParamAttr() (PR #91394)
via llvm-commits
- [llvm] 0b50d09 - [AMDGPU] Don't optimize agpr phis if the operand doesn't have subreg use (#91267)
via llvm-commits
- [llvm] a70ad96 - [AMDGPU] Fix condition in VOP3_Real_Base. NFCI. (#91373)
via llvm-commits
- [llvm] [ConstantRange] Implement union/intersect with exact union/intersect (NFC) (PR #91397)
via llvm-commits
- [llvm] 2ad6917 - [modules] Accept equivalent module caches from different symlink (#90925)
via llvm-commits
- [clang] [llvm] [arm] Support reserving r4 and r5 alongside r9 (PR #89849)
via llvm-commits
- [llvm] [RISCV] Don't crash if parseNormalizedArchString encounters a multi-letter extension with an unknown prefix. (PR #91398)
via llvm-commits
- [llvm] [RISCV] Don't crash if parseNormalizedArchString encounters a multi-letter extension with an unknown prefix. (PR #91398)
via llvm-commits
- [llvm] [BOLT] Add a test for BOLT-reserved space in a binary (PR #91399)
via llvm-commits
- [llvm] [LV]Set tailfolding styles before computing feasible max VF. (PR #91403)
via llvm-commits
- [llvm] 2a3903f - [AMDGPU] Prevent FMINIMUM and FMAXIMUM beeing fully scalarized (#91378)
via llvm-commits
- [compiler-rt] ccf765c - [compiler-rt][ctx_profile] Add the instrumented contextual profiling APIs (#89838)
via llvm-commits
- [clang] [llvm] [DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #91407)
via llvm-commits
- [clang] [llvm] [DXIL] Set DXIL Version in DXIL target triple based on shader model version (PR #91407)
via llvm-commits
- [llvm] [mlir] Poly canonicalization (PR #91410)
via llvm-commits
- [llvm] c0d9efd - [llvm][NVPTX] Remove outdated comments (NFC) (#91409)
via llvm-commits
- [clang] [llvm] [arm] Support reserving r4 and r5 alongside r9 (PR #89849)
via llvm-commits
- [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)
via llvm-commits
- [llvm] [CodeGen] Emit a more efficient magic number multiplication for exact udivs (PR #87161)
via llvm-commits
- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
via llvm-commits
- [llvm] [InstCombine] Thwart complexity-based canonicalization in shl-add test (NFC) (PR #91413)
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- [llvm] [InstCombine] Thwart complexity-based canonicalization in shl-add test (NFC) (PR #91413)
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- [llvm] [InstCombine] Thwart complexity-based canonicalization in shl-add test (NFC) (PR #91413)
via llvm-commits
- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
via llvm-commits
- [llvm] [InstCombine] Thwart complexity-based canonicalization in shl-add test (NFC) (PR #91413)
via llvm-commits
- [llvm] [InstCombine] Thwart complexity-based canonicalization in shl-add test (NFC) (PR #91413)
via llvm-commits
- [llvm] [InstCombine] Thwart complexity-based canonicalization in shl-add test (NFC) (PR #91413)
via llvm-commits
- [llvm] Add reverse of ((X << nuw Z) sub nuw Y) >>u exact Z --> X sub nuw (Y >>u exact Z) (PR #91386)
via llvm-commits
- [llvm] [InstCombine] Thwart complexity-based canonicalization in shl-add test (NFC) (PR #91413)
via llvm-commits
- [llvm] [InstCombine] Thwart complexity-based canonicalization in shl-add test (NFC) (PR #91413)
via llvm-commits
- [llvm] [InstCombine] Thwart complexity-based canonicalization in shl-add test (NFC) (PR #91413)
via llvm-commits
- [llvm] [InstCombine] Thwart complexity-based canonicalization in shl-add test (NFC) (PR #91413)
via llvm-commits
- [llvm] [InstCombine] Remove some of the complexity-based canonicalization (PR #91185)
via llvm-commits
- [llvm] [IR][PatternMatch] Make `m_Checked{Int,Fp}` accept `Constant *` output instead of `APInt *` (PR #91377)
via llvm-commits
- [llvm] [InstCombine] Canonicalize reassoc contract fmuladd to fmul + fadd (PR #90434)
via llvm-commits
- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #90295)
via llvm-commits
- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #90295)
via llvm-commits
- [llvm] [RISCV] Detect duplicate extensions in parseNormalizedArchString. (PR #91416)
via llvm-commits
- [llvm] 584253c - [C API] Add getters and build function for CallBr (#91154)
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- [llvm] 2dade00 - [Analysis] Attribute Range should not prevent tail call optimization (#91122)
via llvm-commits
- [llvm] d085b42 - [InstSimplify] Do not simplify freeze in `simplifyWithOpReplaced` (#91215)
via llvm-commits
- [llvm] [InstSimplify] Do not simplify freeze in `simplifyWithOpReplaced` (PR #91215)
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- [llvm] [X86][BF16] Do not combine FP_TRUNC + FP_EXTEND if they come from user (PR #91420)
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- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #90295)
via llvm-commits
- [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubrouti… (PR #91422)
via llvm-commits
- [llvm] [InstCombine] Add reverse of ((X << nuw Z) sub nuw Y) >>u exact Z --> X sub nuw (Y >>u exact Z) (PR #91386)
via llvm-commits
- [llvm] [InstCombine] Add reverse of ((X << nuw Z) sub nuw Y) >>u exact Z --> X sub nuw (Y >>u exact Z) (PR #91386)
via llvm-commits
- [clang] [llvm] [DebugInfo][BPF] Add 'btf:type_tag' annotation in DWARF (PR #91423)
via llvm-commits
- [llvm] [InstCombine] Add reverse of ((X << nuw Z) sub nuw Y) >>u exact Z --> X sub nuw (Y >>u exact Z) (PR #91386)
via llvm-commits
- [llvm] [InstCombine] Add reverse of ((X << nuw Z) sub nuw Y) >>u exact Z --> X sub nuw (Y >>u exact Z) (PR #91386)
via llvm-commits
- [llvm] 31b45a9 - [clang][hlsl] Add tan intrinsic part 1 (#90276)
via llvm-commits
- [llvm] [InstCombine] Add reverse of ((X << nuw Z) sub nuw Y) >>u exact Z --> X sub nuw (Y >>u exact Z) (PR #91386)
via llvm-commits
- [llvm] [InstCombine] Add reverse of ((X << nuw Z) sub nuw Y) >>u exact Z --> X sub nuw (Y >>u exact Z) (PR #91386)
via llvm-commits
- [clang] [llvm] [BPF] Generate BTF info using 'btf:type_tag' annotation (PR #91424)
via llvm-commits
- [clang] [llvm] [DebugInfo][BPF] Add 'btf:type_tag' annotation in DWARF (PR #91423)
via llvm-commits
- [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubrouti… (PR #91422)
via llvm-commits
- [clang] [llvm] [DebugInfo][BPF] Add 'btf:type_tag' annotation in DWARF (PR #91423)
via llvm-commits
- [clang] [llvm] [BPF] Generate BTF info using 'btf:type_tag' annotation (PR #91424)
via llvm-commits
- [clang] [llvm] [BPF] Generate BTF info using 'btf:type_tag' annotation (PR #91424)
via llvm-commits
- [clang] [llvm] [BPF] Generate BTF info using 'btf:type_tag' annotation (PR #91424)
via llvm-commits
- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
via llvm-commits
- [llvm] [InstCombine] Fix comment from #88193 (PR #91427)
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- [llvm] [InstCombine] Fix comment from #88193 (NFC) (PR #91427)
via llvm-commits
- [llvm] [InstCombine] Fix comment from #88193 (NFC) (PR #91427)
via llvm-commits
- [llvm] [InstCombine] Fold ((X << nuw Z) binop nuw Y) >>u Z --> X binop nuw (Y >>u Z) (PR #88193)
via llvm-commits
- [llvm] [Offload] Fix dataDelete op for TARGET_ALLOC_HOST memory type (PR #91134)
via llvm-commits
- [llvm] f4d2f7a - [RISCV] Codegen support for XCVbi extension (#89719)
via llvm-commits
- [llvm] [InstCombine] Fix comment from #88193 (NFC) (PR #91427)
via llvm-commits
- [llvm] 48b6f4a - [RISCV] Rewrite spill-fpr-scalar.ll test to not use vsetvli. NFC (#91428)
via llvm-commits
- [llvm] 812c302 - [GlobalIsel][AArch64] legalize ptr add (#89218)
via llvm-commits
- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #90295)
via llvm-commits
- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #90295)
via llvm-commits
- [llvm] [InstCombine] lshr (mul (X, 2^N + 1)), N -> add (X, lshr(X, N)) (PR #90295)
via llvm-commits
- [llvm] 2c20995 - [RISCV] Detect duplicate extensions in parseNormalizedArchString. (#91416)
via llvm-commits
- [llvm] 85ef6b7 - [DXIL] Add tan intrinsic part 2 (#90277)
via llvm-commits
- [llvm] ef84452 - [DAGCombiner] Be more careful about looking through extends and truncates in mergeTruncStores. (#91375)
via llvm-commits
- [llvm] 0d93b01 - [RISCV] Don't crash if parseNormalizedArchString encounters a multi-letter extension with an unknown prefix. (#91398)
via llvm-commits
- [llvm] 8296f06 - [RISCV] Add invariants that registers always have definitions. NFC (#90587)
via llvm-commits
- [llvm] 3e82442 - [SPIRV] Add tan intrinsic part 3 (#90278)
via llvm-commits
- [llvm] [InstCombine] Fold fcmp ogt (x - y), 0 into fcmp ogt x, y #85245 (PR #85506)
via llvm-commits
- [llvm] [X86][AVX] Prefer per-element vector shifts for known splats #39424 (PR #87913)
via llvm-commits
- [clang] [llvm] [DebugInfo][BPF] Add 'btf:type_tag' annotation in DWARF (PR #91423)
via llvm-commits
- [llvm] [X86] Fold BLEND(PERMUTE(X), PERMUTE(Y)) -> PERMUTE(BLEND(X, Y)) (PR #90219)
via llvm-commits
- [clang] [llvm] [BPF] Generate BTF info using 'btf:type_tag' annotation (PR #91424)
via llvm-commits
- [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)
via llvm-commits
- [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)
via llvm-commits
- [llvm] bbd6a2d - [RISCV] Convert implicit_def tuples to noreg in post-isel peephole (#91173)
via llvm-commits
- [llvm] [RISCV] Move RISCVInsertVSETVLI to after phi elimination (PR #91440)
via llvm-commits
- [llvm] [llvm] Use StringRef::operator== instead of StringRef::equals (NFC) (PR #91441)
via llvm-commits
- [llvm] [llvm] Use StringRef::operator== instead of StringRef::equals (NFC) (PR #91441)
via llvm-commits
- [llvm] [DebugInfo][IndVarSimplify] fix missing debug location updates (PR #91443)
via llvm-commits
- [llvm] [DebugInfo][IndVarSimplify] fix missing debug location updates (PR #91443)
via llvm-commits
- [llvm] [InstCombine] Canonicalize reassoc contract fmuladd to fmul + fadd (PR #90434)
via llvm-commits
- [llvm] bafbe39 - [NVPTX] Add support for atomic add for bf16 type (#89586)
via llvm-commits
- [llvm] [RemoveDIs] Fix remapping of DbgLabelRecords. (PR #91447)
via llvm-commits
- [llvm] 9ef28cf - VectorCombine: add test for crash #88796 (#91200)
via llvm-commits
- [llvm] 57b9c15 - VectorCombine: fix logical error after m_Trunc match (#91201)
via llvm-commits
- [llvm] [Attributor][FIX] Replace AANoFPClass MBEC propagation (PR #91030)
via llvm-commits
- [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)
via llvm-commits
- [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)
via llvm-commits
- [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)
via llvm-commits
- [llvm] [InstCombine] Canonicalize reassoc contract fmuladd to fmul + fadd (PR #90434)
via llvm-commits
- [llvm] [InstCombine] Canonicalize reassoc contract fmuladd to fmul + fadd (PR #90434)
via llvm-commits
- [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)
via llvm-commits
- [llvm] [X86] Reduce znver3/4 LoopMicroOpBufferSize to practical loop unrolling values (PR #91340)
via llvm-commits
- [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)
via llvm-commits
- [llvm] [IR] Remove check for bitcast of called function in CallBase::has/getFnAttrOnCalledFunction (PR #91392)
via llvm-commits
- [llvm] [IR] Check callee param attributes as well in CallBase::getParamAttr() (PR #91394)
via llvm-commits
- [lld] 8f21294 - MIPS: Use pcrel|sdata4 for eh_frame (#91291)
via llvm-commits
- [llvm] [LoopUnroll] Remove redundant debug instructions after blocks have been merged (PR #91246)
via llvm-commits
- [llvm] df311a2 - Add interface to check if a call has a deopt bundle (NFC) (#91348)
via llvm-commits
- [llvm] [InstCombine] Canonicalize reassoc contract fmuladd to fmul + fadd (PR #90434)
via llvm-commits
- [llvm] [InstCombine] Canonicalize reassoc contract fmuladd to fmul + fadd (PR #90434)
via llvm-commits
- [llvm] [InstCombine] Canonicalize reassoc contract fmuladd to fmul + fadd (PR #90434)
via llvm-commits
- [llvm] [SCEVAA] Allowing to subtract two inttoptrs with different pointer bases (PR #91453)
via llvm-commits
- [llvm] [SCEVAA] Allowing to subtract two inttoptrs with different pointer bases (PR #91453)
via llvm-commits
- [llvm] [SCEVAA] Allowing to subtract two inttoptrs with different pointer bases (PR #91453)
via llvm-commits
- [clang] [llvm] [clang][dataflow] Make `SolverTest` a type-parameterized test. (PR #91455)
via llvm-commits
- [clang] [llvm] [clang][dataflow] Make `SolverTest` a type-parameterized test. (PR #91455)
via llvm-commits
- [clang] [llvm] [clang][dataflow] Make `SolverTest` a type-parameterized test. (PR #91455)
via llvm-commits
- [llvm] 927913f - [RemoveDIs] Fix remapping of DbgLabelRecords. (#91447)
via llvm-commits
- [llvm] [InstCombine] Thwart complexity-based canonicalization in shl-add test (NFC) (PR #91413)
via llvm-commits
- [llvm] [RemoveDIs] Change remapDbgVariableRecord to remapDbgRecord (PR #91456)
via llvm-commits
- [llvm] 1922011 - [PowerPC][AIX] Refactor existing logic to handle non-zero offsets for aix-small-local-dynamic-tls (#89182)
via llvm-commits
- [llvm] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
via llvm-commits
- [llvm] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
via llvm-commits
- [llvm] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
via llvm-commits
- [llvm] [RemoveDIs] Change remapDbgVariableRecord to remapDbgRecord (PR #91456)
via llvm-commits
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- [llvm] Add unit test for CloneModule and #dbg_label (PR #91463)
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- [llvm] Add unit test for CloneModule and #dbg_label (PR #91463)
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- [llvm] Add unit test for CloneModule and #dbg_label (PR #91463)
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- [llvm] Add unit test for CloneModule and #dbg_label (PR #91463)
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- [llvm] [InstCombine] Propagate disjoint flags during shl-binop transform (PR #91333)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [llvm] 737e0bc - [GlobalIsel] combine ext of trunc with flags (#87115)
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- [llvm] [AArch64] Remove EXT instr before UZP when extracting elements from vector (PR #91328)
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- [llvm] [Reassociate] Drop weight reduction to fix issue 91417 (PR #91469)
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- [llvm] [AArch64] Remove EXT instr before UZP when extracting elements from vector (PR #91328)
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- [llvm] [Reassociate] Drop weight reduction to fix issue 91417 (PR #91469)
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- [llvm] LoopVectorize: run verifyFunction once (PR #91470)
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- [clang] [llvm] [AArch64] Fix feature flags dependecies (PR #90612)
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- [llvm] 686a206 - [SampleProfileLoader] Fix integer overflow in generateMDProfMetadata (#90217)
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- [llvm] 665af09 - [DirectX backend] emits metadata for DXIL version. (#88350)
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- [llvm] d6d613a - [clang][dataflow] Make `SolverTest` a type-parameterized test. (#91455)
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- [clang] [llvm] [clang][dataflow] Make `SolverTest` a type-parameterized test. (PR #91455)
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- [llvm] [NFC][BOLT] Remove dead code (SPTAllocatorsId) (PR #91477)
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- [llvm] [AttributorLight] Without liveness checks, look at all functions (PR #91004)
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- [llvm] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
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- [compiler-rt] [Sanitizers] Fix fake_test_gc not working on devices (PR #91284)
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- [llvm] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
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- [llvm] [AMDGPU][RFC] Combine asm and disasm tests. (PR #90214)
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- [llvm] [WIP][GlobalOpt] Don't replace aliasee with alias that has weak linkage (PR #91483)
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- [llvm] LoopVectorize: don't verify metadata (PR #91484)
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- [llvm] [BOLT][DWARF] Updated DW_AT_comp_dir/DW_AT_dwo_name for DWO TUs. (PR #91486)
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- [llvm] [AArch64] Remove EXT instr before UZP when extracting elements from vector (PR #91328)
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- [compiler-rt] Disable flaky test: dfsan/release_shadow_space.c (PR #91493)
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- [llvm] 29b7eb8 - [llvm][stackmaps] Include pristine registers for liveness computation. (#90529)
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- [compiler-rt] Disable flaky test: dfsan/release_shadow_space.c (PR #91493)
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- [llvm] a617190 - [RemoveDIs] Change remapDbgVariableRecord to remapDbgRecord (#91456)
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- [llvm] [IR][PatternMatch] Make `m_Checked{Int,Fp}` accept `Constant *` output instead of `APInt *` (PR #91377)
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- [clang] [libclc] [llvm] [openmp] [Clang] `__attribute__((assume))` refactor (PR #84934)
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- [llvm] 6d89014 - [DXIL] Set DXIL Version in DXIL target triple based on shader model version (#91407)
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- [llvm] efad149 - [Support] Add end/error to decode[US]LEB128AndInc
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- [llvm] b59461a - [ADT] Add back ability to compare StringSet (#91374)
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- [llvm] [Docs] [NFC] Use opaque ptr in the example (PR #91502)
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- [llvm] 4298fc5 - [RISCV] Move strength reduction of mul X, 3/5/9*2^N to combine (#89966)
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- [llvm] [AArch64] Improve code generation for experimental.cttz.elts (PR #91505)
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- [llvm] [AArch64] Improve code generation for experimental.cttz.elts (PR #91505)
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- [llvm] a620697 - [IR] Check callee param attributes as well in CallBase::getParamAttr() (#91394)
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- [llvm] 5768383 - [IR] Remove check for bitcast of called function in CallBase::has/getFnAttrOnCalledFunction (#91392)
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- [llvm] 08011cf - [Docs][NFC] Use opaque ptr in the example (#91502)
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- [llvm] [Docs] [NFC] Use opaque ptr in the example (PR #91502)
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- [llvm] [DirectX] Fix DXIL part header version encoding (PR #91506)
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- [llvm] [DirectX] Fix DXIL part header version encoding (PR #91506)
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- [llvm] ISel/AArch64/SVE: custom lower vector ISD::[L]LRINT (PR #89035)
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- [llvm] [NFC][LLVM] Simplify SVE isel DAG patterns. (PR #91510)
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- [llvm] bb6df08 - [llvm] Use StringRef::operator== instead of StringRef::equals (NFC) (#91441)
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- [llvm] [AMDGPU] Add VOP3_PACKED to V_PK_{MIN|MAX}IMUM_F16 profile (PR #91512)
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- [llvm] NFC: Add a comment indicating UpdateAnalysisInformation invalidates DFS Numbering (PR #91252)
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- [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)
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- [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)
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- [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)
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- [llvm] [DebugInfo][BPF] Add 'annotations' field for DIBasicType & DISubroutineType (PR #91422)
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- [llvm] 42d9901 - NFC: Add a comment indicating UpdateAnalysisInformation invalidates DFS Numbering (#91252)
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- [llvm] NFC: Add a comment indicating UpdateAnalysisInformation invalidates DFS Numbering (PR #91252)
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- [clang] [llvm] [DebugInfo][BPF] Add 'btf:type_tag' annotation in DWARF (PR #91423)
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- [clang] [llvm] [DebugInfo][BPF] Add 'btf:type_tag' annotation in DWARF (PR #91423)
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- [clang] [llvm] [DebugInfo][BPF] Add 'btf:type_tag' annotation in DWARF (PR #91423)
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- [clang] [llvm] [BPF] Generate BTF info using 'btf:type_tag' annotation (PR #91424)
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- [clang] [llvm] [BPF] Generate BTF info using 'btf:type_tag' annotation (PR #91424)
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- [clang] [llvm] [BPF] Generate BTF info using 'btf:type_tag' annotation (PR #91424)
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- [clang] [llvm] [CUDA] Mark CUDA-12.4 as supported and introduce ptx 8.4. (PR #91516)
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- [clang] [llvm] [MC,llvm-readobj,yaml2obj] Support CREL relocation format (PR #91280)
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- [llvm] 2f956a3 - [CUDA] Mark CUDA-12.4 as supported and introduce ptx 8.4. (#91516)
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- [compiler-rt] 63c38ba - [Sanitizers] Fix fake_test_gc not working on devices (#91284)
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- [llvm] [LAA] Support backward dependences with non-constant distance. (PR #91525)
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- [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #89165)
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- [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #89165)
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- [llvm] 559accf - [AMDGPU] Add VOP3_PACKED to V_PK_{MIN|MAX}IMUM_F16 profile (#91512)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [llvm] [VPlan] First step towards VPlan cost modeling. (PR #67934)
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- [clang] [compiler-rt] PREVIEW: Introduce realtime sanitizer backend (PR #91529)
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- [libcxx] [llvm] [libc++] Move some macOS CI jobs to Github actions (PR #89083)
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- [llvm] [MemProf] Optionally update hints on existing hot/cold new calls (PR #91047)
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- [llvm] cec6665 - [MemProf] Optionally update hints on existing hot/cold new calls (#91047)
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- [clang] [llvm] [RISCV] Allow extra underscores in parseNormalizedArchString and parseArchString. (PR #91532)
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- [llvm] Add option to log debugging to stdout (PR #91533)
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- [clang] [llvm] [RISCV] Allow extra underscores in parseNormalizedArchString and parseArchString. (PR #91532)
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- [llvm] Add option to log debugging to stdout (PR #91533)
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- [compiler-rt] [llvm] [InstrProf] Add vtables with type metadata into symtab (PR #81051)
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- [llvm] [AMDGPU] GISelShouldIgnore .td uses (PR #90005)
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- [llvm] 965f3ca - [GISel] Fold bitreverse(shl/srl(bitreverse(x), y)) -> srl/shl(x,y) (#91355)
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- [llvm] [AMDGPU] GISelShouldIgnore .td uses (PR #90005)
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- [llvm] fcf945f - [DAG] Fold add(mul(add(A, CA), CM), CB) -> add(mul(A, CM), CM*CA+CB) (#90860)
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- [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)
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- [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)
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- [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)
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- [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)
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- [llvm] [RISCV] Don't use std::vector<std::string> for split extensions in RISCVISAInfo::parseArchString. NFC (PR #91538)
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- [lld] [lld-macho] Category merger: handle addends when getting symbol at offset (PR #91238)
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- [llvm] [NFC] CoroElide: Refactor `Lowerer` into `CoroIdElider` (PR #91539)
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- [llvm] [NFC] Apply absorption rule to boolean expression (PR #91540)
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- [llvm] [GVNSink] Fix non-determinisms by using Depth-First ordering (PR #90995)
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- [llvm] [GVNSink] Fix non-determinisms by using Depth-First ordering (PR #90995)
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- [llvm] 1610eaa - [memprof] Make Version2 officially available (#91541)
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- [llvm] [gardening][DebugInfo][NFC] Improve comment on HashingDISubprogram test (PR #91543)
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- [llvm] [GVNSink] Fix non-determinisms by using Depth-First ordering (PR #90995)
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- [llvm] [GVNSink] Fix non-determinisms by using Depth-First ordering (PR #90995)
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- [llvm] 64f4ceb - [Inline][PGO] After inline, update InvokeInst profile counts in caller and cloned callee (#83809)
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- [llvm] 99052c4 - [gardening][DebugInfo][NFC] Improve comment on HashingDISubprogram test (#91543)
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- [clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
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- [clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
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- [clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
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- [clang] [llvm] [WebAssembly] Implement prototype f32.store_f16 instruction. (PR #91545)
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- [clang] [llvm] [WebAssembly] Implement prototype f32.store_f16 instruction. (PR #91545)
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- [llvm] [RISCV] Improve use of BSETI in constant materialization. (PR #91546)
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- [llvm] 96568f3 - [llvm][ctx_profile] Add instrumentation lowering (#90821)
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- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
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- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
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- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
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- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
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- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
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- [llvm] [InstCombine] Fold `trunc nuw/nsw (x xor y) to i1` to `x != y` (PR #90408)
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- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
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- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
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- [llvm] 1aaab33 - [RISCV] Don't use std::vector<std::string> for split extensions in RISCVISAInfo::parseArchString. NFC (#91538)
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- [llvm] 409ff97 - [InstCombine] Fix comment from #88193 (NFC) (#91427)
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- [llvm] ba5170f - [InstCombine] Thwart complexity-based canonicalization in shl-add test (NFC) (#91413)
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- [llvm] [BOLT] Add test case for PIC fixed indirect jump (PR #91547)
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- [lld] [lld-macho] Add support for non-lazy categories to ObjC category merger (PR #91548)
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- [lld] [lld-macho] Add support for non-lazy categories to ObjC category merger (PR #91548)
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- [lld] [lld-macho] Add support for non-lazy categories to ObjC category merger (PR #91548)
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- [libc] [llvm] [libc] Update FMA inclusion for ARM targets. (PR #91535)
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- [libc] [llvm] [libc] Use __builtin_fma(f) by default if LIBC_TARGET_CPU_HAS_FMA is defined. (PR #91535)
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- [libc] [llvm] [libc] Use __builtin_fma(f) by default if LIBC_TARGET_CPU_HAS_FMA is defined. (PR #91535)
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- [libc] [llvm] [libc] Use __builtin_fma(f) by default if LIBC_TARGET_CPU_HAS_FMA is defined. (PR #91535)
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- [llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)
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- [llvm] ea126ae - [PowerPC] Tune AIX shared library TLS model at function level (#84132)
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- [llvm] b910beb - [llvm][MachO] Fix integer truncation in rebase/bind parsing (#89337)
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- [llvm] [LoopUnroll] Remove redundant debug instructions after blocks have been merged (PR #91246)
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- [llvm] [LoopUnroll] Remove redundant debug instructions after blocks have been merged (PR #91246)
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- [llvm] [LoopUnroll] Remove redundant debug instructions after blocks have been merged (PR #91246)
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- [llvm] [SCEVAA] Allowing to subtract two inttoptrs with different pointer bases (PR #91453)
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- [llvm] [SCEVAA] Allowing to subtract two inttoptrs with different pointer bases (PR #91453)
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- [llvm] [SCEVAA] Allowing to subtract two inttoptrs with different pointer bases (PR #91453)
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- [llvm] [GVNSink] Fix non-determinisms by using Depth-First ordering (PR #90995)
via llvm-commits
- [llvm] [RISCV] Sink vector select splat operands (PR #91554)
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- [llvm] [GVNSink] Fix non-determinisms by using Depth-First ordering (PR #90995)
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- [llvm] [GVNSink] Fix non-determinisms by using Depth-First ordering (PR #90995)
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- [llvm] 3a3aeb8 - [PPCMergeStringPool] Avoid replacing constant with instruction (#88846)
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- [clang] [llvm] [RISCV] Bump Zaamo and Zalrsc to version 1.0 (PR #91556)
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- [llvm] 5baf58b - [RISCV] Improve use of BSETI/BCLRI in constant materialization. (#91546)
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- [llvm] [NFC] Replace uses of ConstantExpr::getCompare. (PR #91558)
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- [llvm] [NFC] Replace uses of ConstantExpr::getCompare. (PR #91558)
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- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
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- [llvm] [AMDGPU] Move LDS utilities from amdgpu-lower-module-lds pass to AMDGPUMemoryUtils (PR #88002)
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- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
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- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
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- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
via llvm-commits
- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
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- [llvm] 5adcfd4 - [flang][CMake] Add missing dependency to generate Fortran module files (#91517)
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- [llvm] [LoopUnroll] Remove redundant debug instructions after blocks have been merged (PR #91246)
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- [llvm] [LoopUnroll] Remove redundant debug instructions after blocks have been merged (PR #91246)
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- [clang] [llvm] [AMDGPU][WIP] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
via llvm-commits
- [clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
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- [llvm] aacea0d - [utils] Add script to generate elaborated IR and assembly tests (#89026)
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- [llvm] [InstCombine] Fold fcmp ogt (x - y), 0 into fcmp ogt x, y #85245 (PR #85506)
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- [llvm] [InstCombine] Fold fcmp ogt (x - y), 0 into fcmp ogt x, y #85245 (PR #85506)
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- [llvm] [InstCombine] Fold fcmp ogt (x - y), 0 into fcmp ogt x, y #85245 (PR #85506)
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- [llvm] [AArch64][GlobalISel] Push ADD/SUB through Extend Instructions (PR #90964)
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- [llvm] [AArch64][GlobalISel] Select G_ICMP instruction through TableGen (PR #89932)
via llvm-commits
- [llvm] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
via llvm-commits
- [llvm] b52fa94 - [Analysis] Add cost model for experimental.cttz.elts intrinsic (#90720)
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- [llvm] [AArch64][GlobalISel] Select G_ICMP instruction through TableGen (PR #89932)
via llvm-commits
- [llvm] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
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- [llvm] [RISC-V] Limit vscale interleaving to addrspace 0. (PR #91573)
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- [llvm] [Offload] Add MPI Plugin (PR #90890)
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- [llvm] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
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- [llvm] [LV] Remove redudent removel operations, it will be removed by 'removeDeadRecipes' (PR #91575)
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- [llvm] [LV] Remove redudent removel operations, it will be removed by 'removeDeadRecipes' (PR #91575)
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- [llvm] [AMDGPU] Remove duplicate -mtriple options in tests (PR #91576)
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- [llvm] [TableGen] HasOneUse builtin predicate on PatFrags (PR #91578)
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- [llvm] [TableGen] HasOneUse builtin predicate on PatFrags (PR #91578)
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- [llvm] [TableGen] HasOneUse builtin predicate on PatFrags (PR #91578)
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- [llvm] 2cbfe4a - [AMDGPU] Remove duplicate -mtriple options in tests (#91576)
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- [llvm] 643c383 - [AArch64] Remove EXT instr before UZP when extracting elements from vector (#91328)
via llvm-commits
- [llvm] [AArch64] Remove EXT instr before UZP when extracting elements from vector (PR #91328)
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- [llvm] [AMDGPU] Always Inline preserved analyses (PR #91198)
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- [llvm] 1494d88 - [AMDGPU] Always Inline preserved analyses (#91198)
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- [llvm] [AMDGPU] Always Inline preserved analyses (PR #91198)
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- [llvm] [DebugInfo][JumpThreading] Fix missing debug location updates (PR #91581)
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- [llvm] [DebugInfo][JumpThreading] Fix missing debug location updates (PR #91581)
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- [llvm] 6eb9e21 - RFC: [AMDGPU] Check subtarget features for consistency (#86957)
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- [llvm] [InstCombine] Fold comparisons of remainder expressions with multiplied contants (PR #79383)
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- [llvm] [InstCombine] Fold comparisons of remainder expressions with multiplied contants (PR #79383)
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- [llvm] [AMDGPU] Build lane intrinsics in a mangling-agnostic way. NFC. (PR #91583)
via llvm-commits
- [clang] [llvm] [AArch64] Fix feature flags dependecies (PR #90612)
via llvm-commits
- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
via llvm-commits
- [llvm] [LAA] Support backward dependences with non-constant distance. (PR #91525)
via llvm-commits
- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
via llvm-commits
- [llvm] [X86] Enable TuningSlowDivide64 on Barcelona/Bobcat/Bulldozer/Ryzen Families (PR #91277)
via llvm-commits
- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [llvm] aa16de6 - [Linker] Propagate `nobuiltin` attributes when linking known libcalls (#89431)
via llvm-commits
- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
via llvm-commits
- [clang] [llvm] [AArch64] Fix feature flags dependecies (PR #90612)
via llvm-commits
- [clang] [llvm] [AArch64] Fix feature flags dependecies (PR #90612)
via llvm-commits
- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [llvm] b452b34 - [DebugInfo][IndVarSimplify] Fix missing debug location updates (#91443)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [llvm] d86b68a - MCExpr-ify SIProgramInfo (#88257)
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- [llvm] 8b400de - [X86] Enable TuningSlowDivide64 on Barcelona/Bobcat/Bulldozer/Ryzen Families (#91277)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [llvm] 6a8d30b - DAG: Skip 0 sign handling in minimum/maximum lowering for _ieee case (#91326)
via llvm-commits
- [llvm] e2d17a0 - [AMDGPU] Build lane intrinsics in a mangling-agnostic way. NFC. (#91583)
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- [llvm] MCExpr-ify amd_kernel_code_t (PR #91587)
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- [llvm] MCExpr-ify amd_kernel_code_t (PR #91587)
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- [llvm] ed3a60c - [RISCV][GlobalISel] Fix selectShiftMask when shift mask is created from G_AND (#89602)
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- [llvm] e88ba6d - [AArch64] Add intrinsics for multi-vector to ZA array vector accumulators (#88266)
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- [llvm] [WIP][GlobalOpt] Don't replace aliasee with alias that has weak linkage (PR #91483)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [lld] c416e43 - [lld-macho] Add support for non-lazy categories to ObjC category merger (#91548)
via llvm-commits
- [lld] [lld-macho] Add support for non-lazy categories to ObjC category merger (PR #91548)
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- [llvm] [InstCombine] Fold pointer adding in integer to arithmetic add (PR #91596)
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- [llvm] [InstCombine] Fold pointer adding in integer to arithmetic add (PR #91596)
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- [llvm] [LLVM][AArch64]Use load/store with consecutive registers in SME2 or S… (PR #77665)
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- [llvm] 139e0aa - Revert "[AArch64] Add intrinsics for multi-vector to ZA array vector accumulators" (#91597)
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- [clang] [llvm] Revert "[AArch64] Add intrinsics for multi-vector to ZA array vector accumulators" (PR #91597)
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- [llvm] AMDGPU: fix isSafeToSink expecting exactly one predecessor (PR #89224)
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- [llvm] [SPIR-V] Set non-kernel function linkage type via OpDecorate for all linkage types except for static functions (PR #91598)
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- [llvm] [GlobalOpt] Don't replace aliasee with alias that has weak linkage (PR #91483)
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- [llvm] [GlobalOpt] Don't replace aliasee with alias that has weak linkage (PR #91483)
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- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
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- [llvm] [GlobalOpt] Don't replace aliasee with alias that has weak linkage (PR #91483)
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- [llvm] [GlobalOpt] Don't replace aliasee with alias that has weak linkage (PR #91483)
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- [llvm] [GlobalOpt] Don't replace aliasee with alias that has weak linkage (PR #91483)
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- [llvm] Revert "[AArch64] NFC: Add RUN lines for streaming-compatible code." (PR #91599)
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- [llvm] [GlobalOpt] Don't replace aliasee with alias that has weak linkage (PR #91483)
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- [llvm] [GlobalOpt] Don't replace aliasee with alias that has weak linkage (PR #91483)
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- [llvm] [InstCombine] Fold pointer adding in integer to arithmetic add (PR #91596)
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- [llvm] [GlobalOpt] Don't replace aliasee with alias that has weak linkage (PR #91483)
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- [llvm] [GlobalOpt] Don't replace aliasee with alias that has weak linkage (PR #91483)
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- [compiler-rt] 846ffc7 - Disable flaky test: dfsan/release_shadow_space.c (#91493)
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- [llvm] [coverage] keep relative order of mcdc branch and decision mapping regions (PR #91600)
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- [llvm] [coverage] keep relative order of mcdc branch and decision mapping regions (PR #91600)
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- [llvm] [coverage] keep relative order of mcdc branch and decision mapping regions (PR #91600)
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- [llvm] [AMDGPU] Remove unnecessary predicates from aliases. NFC. (PR #91602)
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- [llvm] [Reg2Mem] Handle CallBr instructions (PR #90953)
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- [llvm] [coverage] keep relative order of mcdc branch and decision mapping regions (PR #91600)
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- [llvm] [TableGen] HasOneUse builtin predicate on PatFrags (PR #91578)
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- [llvm] [coverage] keep relative order of mcdc branch and decision mapping regions (PR #91600)
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- [llvm] aa9d467 - Revert "[AArch64] NFC: Add RUN lines for streaming-compatible code." (#91599)
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- [llvm] [coverage] keep relative order of mcdc branch and decision mapping regions (PR #91600)
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- [llvm] [coverage] keep relative order of mcdc branch and decision mapping regions (PR #91600)
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- [llvm] [coverage] keep relative order of mcdc branch and decision mapping regions (PR #91600)
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- [clang] [llvm] [AArch64] Add intrinsics for multi-vector to ZA array vector accumulators (PR #91606)
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- [clang] [llvm] [AArch64] Add intrinsics for multi-vector to ZA array vector accumulators (PR #91606)
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- [llvm] 87235fa - [NFC] CoroElide: Refactor `Lowerer` into `CoroIdElider` (#91539)
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- [llvm] [coverage] keep relative order of mcdc branch and decision mapping regions (PR #91600)
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- [llvm] [coverage] keep relative order of mcdc branch and decision mapping regions (PR #91600)
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- [llvm] [InstCombine] Fold pointer adding in integer to arithmetic add (PR #91596)
via llvm-commits
- [llvm] fe0b798 - [AMDGPU] Create AMDGPUMnemonicAlias tablegen class (#89288)
via llvm-commits
- [llvm] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
via llvm-commits
- [llvm] [VPlan] Simplify (X && Y) || (X && !Y) -> X. (PR #89386)
via llvm-commits
- [llvm] [SROA] Use stable sort for slices to avoid non-determinism (PR #91609)
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- [llvm] [SROA] Use stable sort for slices to avoid non-determinism (PR #91609)
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- [llvm] [SROA] Use stable sort for slices to avoid non-determinism (PR #91609)
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- [llvm] [MemCpyOpt] Merge memset and skip unrelated clobber in one scan (PR #90350)
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- [clang] [llvm] [ASAN] Add "sanitized_padded_global" llvm ir attribute to identify sanitizer instrumented globals (PR #68865)
via llvm-commits
- [llvm] [VectorCombine] Add intrinsics handling to shuffleToIdentity (PR #91000)
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- [llvm] [Offload] Fixes typo in aarch64 triple (PR #91622)
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- [llvm] [AMDGPU] Fix kernarg preloading crash with some types and alignments (PR #91625)
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- [libc] [llvm] [libc] Use __builtin_fma(f) by default if LIBC_TARGET_CPU_HAS_FMA is defined. (PR #91535)
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- [libc] [llvm] [libc] Use __builtin_fma(f) by default if LIBC_TARGET_CPU_HAS_FMA is defined. (PR #91535)
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- [libc] [llvm] [libc] Use __builtin_fma(f) by default if LIBC_TARGET_CPU_HAS_FMA is defined. (PR #91535)
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- [llvm] 317e6ff - [NFC] Move parameter into field (#91065)
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- [libc] [llvm] [libc] Use __builtin_fma(f) by default if LIBC_TARGET_CPU_HAS_FMA is defined. (PR #91535)
via llvm-commits
- [libc] [llvm] [libc] Use __builtin_fma(f) by default if LIBC_TARGET_CPU_HAS_FMA is defined. (PR #91535)
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- [llvm] [RISCV] Inhibit DAG folding shl through zext.w pattern with zba (PR #91626)
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- [llvm] [RISCV] Inhibit DAG folding shl through zext.w pattern with zba (PR #91626)
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- [llvm] 98c1ba4 - [InstrProf] Add vtables with type metadata into symtab (#81051)
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- [lld] [llvm] [llvm][lld] Pre-commit tests for RISCV TLSDESC symbols (PR #85816)
via llvm-commits
- [lld] [lld-macho] Add support for non-lazy categories to ObjC category merger (PR #91548)
via llvm-commits
- [llvm] 8fd838a - [RISC-V] Limit vscale interleaving to addrspace 0. (#91573)
via llvm-commits
- [llvm] [RISCV] Add isel special case for (and (shl X, c2), c1) -> (slli_uw (srli x, c4-c2), c4). (PR #91638)
via llvm-commits
- [llvm] [AArch64][SME] Fix frame lowering not using a base pointer for SME functions. (PR #91643)
via llvm-commits
- [llvm] [Offload] Remove support for old "BUILD_PLUGIN" options. (PR #91644)
via llvm-commits
- [llvm] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
via llvm-commits
- [llvm] [AMDGPU] Fix broken MIR generated by gfx11 simulated trap lowering (PR #91652)
via llvm-commits
- [llvm] [AMDGPU] Fix broken MIR generated by gfx11 simulated trap lowering (PR #91652)
via llvm-commits
- [llvm] 639a740 - [AArch64] move extension information into tablgen (#90987)
via llvm-commits
- [llvm] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
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- [llvm] [GVNSink] Fix non-determinisms by using Depth-First ordering (PR #90995)
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- [llvm] [polly] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
via llvm-commits
- [llvm] [GVNSink] Fix non-determinisms by using a deterministic ordering (PR #90995)
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- [llvm] [GVNSink] Fix non-determinisms by using a deterministic ordering (PR #90995)
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- [llvm] [mlir] Add constant propagation for polynomial ops (PR #91655)
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- [llvm] [mlir] Add constant propagation for polynomial ops (PR #91655)
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- [llvm] [BOLT] Remove original relocs when moving JTs in relocation mode (PR #91656)
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- [llvm] [mlir] Add constant propagation for polynomial ops (PR #91655)
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- [llvm] [polly] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
via llvm-commits
- [llvm] [dsymutil] Add -q/--quiet flag to suppress warnings (PR #91658)
via llvm-commits
- [llvm] [BOLT][NFC] Rename DispExpr to JTBaseDispExpr in analyzeIndirectBranch (PR #91659)
via llvm-commits
- [llvm] [BOLT][NFC] Rename DispExpr to JTBaseDispExpr in analyzeIndirectBranch (PR #91659)
via llvm-commits
- [llvm] dfff57e - [RISCV] Add isel special case for (and (shl X, c2), c1) -> (slli_uw (srli x, c3-c2), c3). (#91638)
via llvm-commits
- [llvm] [BOLT][NFC] Add isRIPRel and isIndexed helpers (PR #91661)
via llvm-commits
- [compiler-rt] [llvm] [ctx_profile] Pull `ContextNode` in a `.inc` file (PR #91669)
via llvm-commits
- [llvm] 8a3277a - [WebAssembly] Implement prototype f32.store_f16 instruction. (#91545)
via llvm-commits
- [llvm] [AMDGPU] Make fneg/fabs/copysign legal for bf16 (PR #91676)
via llvm-commits
- [llvm] 1e97d11 - [dsymutil] Add -q/--quiet flag to suppress warnings (#91658)
via llvm-commits
- [lld] [llvm] [RISCV][lld] Set the type of TLSDESC relocation's referenced local symbol to STT_NOTYPE (PR #85817)
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- [lld] [llvm] [RISCV][lld] Set the type of TLSDESC relocation's referenced local symbol to STT_NOTYPE (PR #85817)
via llvm-commits
- [compiler-rt] [llvm] [ctx_profile] Pull `ContextNode` in a `.inc` file (PR #91669)
via llvm-commits
- [compiler-rt] [libfuzzer] Prevent MSan false positive when printing log with -jobs (PR #91679)
via llvm-commits
- [lld] [lld-macho] Fix address sanitizer for category merging (PR #91680)
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- [lld] [lld-macho] Fix address sanitizer for category merging (PR #91680)
via llvm-commits
- [lld] [lld-macho] Add support for non-lazy categories to ObjC category merger (PR #91548)
via llvm-commits
- [lld] [lld-macho] Fix address sanitizer for category merging (PR #91680)
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- [compiler-rt] [libfuzzer] Prevent MSan false positive when printing log with -jobs (PR #91679)
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- [llvm] f893dcc - Replace uses of ConstantExpr::getCompare. (#91558)
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- [llvm] f865dbf - [SeparateConstOffsetFromGEP] Support GEP reordering for different types (#90802)
via llvm-commits
- [llvm] e4763ca - [ctx_profile] Pull `ContextNode` in a `.inc` file (#91669)
via llvm-commits
- [lld] [lld-macho] Fix address sanitizer for category merging (PR #91680)
via llvm-commits
- [llvm] [BOLT] Report adjusted program stats from perf2bolt in BAT mode (PR #91683)
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- [llvm] [BOLT] Report adjusted program stats from perf2bolt in BAT mode (PR #91683)
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- [llvm] [RISCV] Don't pre-split before the loop in parseNormalizedArchString. (PR #91684)
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- [lld] db78ee0 - [lld-macho] Fix address sanitizer for category merging (#91680)
via llvm-commits
- [lld] [lld-macho] Fix address sanitizer for category merging (PR #91680)
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- [llvm] AMDGPU: fix isSafeToSink expecting exactly one predecessor (PR #89224)
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- [llvm] AMDGPU: fix isSafeToSink expecting exactly one predecessor (PR #89224)
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- [llvm] [AMDGPU] Make fneg/fabs/copysign legal for bf16 (PR #91676)
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- [llvm] [LV] Remove redudent removel operations, it will be removed by 'removeDeadRecipes' (PR #91575)
via llvm-commits
- [llvm] d24eaef - [RISCV] Sink vector select splat operands (#91554)
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- [llvm] [InstCombine] Improve select equiv fold for plain condition (PR #83405)
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- [llvm] [InstCombine] Improve select equiv fold for plain condition (PR #83405)
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- [llvm] [InstCombine] Improve select equiv fold for plain condition (PR #83405)
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- [llvm] [BOLT] Preserve Offset annotation in SCTC (PR #91693)
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- [llvm] [nfc][memprof] Add missing license to `MemProfTest` (PR #91695)
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- [llvm] 181e2e8 - [nfc][memprof] Add missing license to `MemProfTest` (#91695)
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- [clang] [llvm] [X86][Driver] Do not add `-evex512` for `-march=native` when the target doesn't support AVX512 (PR #91694)
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- [llvm] [AMDGPU] Move LDS utilities from amdgpu-lower-module-lds pass to AMDGPUMemoryUtils (PR #88002)
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- [llvm] [AMDGPU] Fix an issue that wrong index is used in calculation of byte provider when the op is extract_vector_elt (PR #91697)
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- [llvm] [polly] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
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- [llvm] 2c5f470 - [AMDGPU] Move LDS utilities from amdgpu-lower-module-lds pass to AMDGPUMemoryUtils (#88002)
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- [llvm] [AMDGPU] Move LDS utilities from amdgpu-lower-module-lds pass to AMDGPUMemoryUtils (PR #88002)
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- [llvm] [polly] [ConstraintElimination] Use SCEV ranges information for Loop counter (PR #91457)
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- [llvm] 87f3407 - [X86][Driver] Do not add `-evex512` for `-march=native` when the target doesn't support AVX512 (#91694)
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- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
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- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
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- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
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- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
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- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
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- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
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- [llvm] 06ad863 - [NFC] Prefer `str.resize(len)` over `str.substr(0, len)` (#91067)
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- [llvm] [RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (PR #91701)
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- [compiler-rt] [compiler-rt][ASan] Add function moving annotations (PR #91702)
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- [compiler-rt] [compiler-rt][ASan] Add function moving annotations (PR #91702)
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- [clang] [lld] [llvm] [RISCV] Support .note.gnu.property for enable Zicfiss and Zicfilp extension (PR #77414)
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- [llvm] 0ebe48f - [RISCV] Move RISCVInsertVSETVLI after CSR/VXRM passes (#91701)
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- [compiler-rt] [compiler-rt][ASan] Add function moving annotations (PR #91702)
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- [clang] [lld] [llvm] [RISCV] Support .note.gnu.property for enable Zicfiss and Zicfilp extension (PR #77414)
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- [clang] [lld] [llvm] [RISCV] Support .note.gnu.property for enable Zicfiss and Zicfilp extension (PR #77414)
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- [clang] [llvm] [X86][Driver] Do not add `-evex512` for `-march=native` when the target doesn't support AVX512 (PR #91694)
via llvm-commits
- [compiler-rt] [compiler-rt][ASan] Add function moving annotations (PR #91702)
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- [llvm] 6aac30f - Update FEAT_PAuth_LR behaviour for AArch64 (#90614)
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- [compiler-rt] [compiler-rt][ASan] Add function moving annotations (PR #91702)
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- [compiler-rt] [compiler-rt][ASan] Add function moving annotations (PR #91702)
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- [llvm] [VPlan] Simplify (X && Y) || (X && !Y) -> X. (PR #89386)
via llvm-commits
- [llvm] [VPlan] Simplify (X && Y) || (X && !Y) -> X. (PR #89386)
via llvm-commits
- [compiler-rt] [compiler-rt][ASan] Add function moving annotations (PR #91702)
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- [compiler-rt] [compiler-rt][ASan] Add function moving annotations (PR #91702)
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- [llvm] [InstCombineCompares] Replace the sqrt in if-condition (PR #91707)
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- [llvm] [InstCombineCompares] Replace the sqrt in if-condition (PR #91707)
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- [llvm] [InstCombineCompares] Replace the sqrt in if-condition (PR #91707)
via llvm-commits
- [compiler-rt] [compiler-rt][ASan] Add function moving annotations (PR #91702)
via llvm-commits
- [llvm] [InstCombineCompares] Replace the sqrt in if-condition (PR #91707)
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- [llvm] 23b673e - [DAG][AArch64] Handle vscale addressing modes in reassociationCanBreakAddressingModePattern (#89908)
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- [llvm] [AArch64] Extend v2i64 fptosi.sat to v2f64 (PR #91714)
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- [llvm] [LoopUnroll] Consider convergence control tokens when unrolling (PR #91715)
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- [llvm] 6419496 - [flang][OMPIRBuilder] Keep debug location in sync with insert point. (#89953)
via llvm-commits
- [llvm] [InstCombineCompares] Replace the sqrt in if-condition (PR #91707)
via llvm-commits
- [llvm] [LV] Remove redudent removel operations, it will be removed by 'removeDeadRecipes' (PR #91575)
via llvm-commits
- [llvm] b277bf5 - [LLVM][CodeGen][SVE] Clean up lowering of VECTOR_SPLICE operations. (#91330)
via llvm-commits
- [llvm] Use 256 bit register when AVX2 or higher is available. (PR #91721)
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- [llvm] Use 256 bit register when AVX2 or higher is available. (PR #91721)
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- [llvm] Use 256 bit register when AVX2 or higher is available. (PR #91721)
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- [llvm] Use 256 bit register when AVX2 or higher is available. (PR #91721)
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- [llvm] 64d4ade - [AArch64] Add intrinsics for 16-bit non-widening FMLA/FMLS (#88553)
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- [llvm] [SPIR-V] Support saturation arithmetic intrinsics in SPIR-V Backend (PR #91722)
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- [llvm] 2e8d815 - [TTI] Support scalable offsets in getScalingFactorCost (#88113)
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- [llvm] [X86][CodeGen] Return true when MIR is changed after optimizeCompareInstr (PR #91723)
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- [llvm] 28767af - [LAA] Support backward dependences with non-constant distance. (#91525)
via llvm-commits
- [clang] [llvm] [RemoveDIs] Print IR with debug records by default (PR #91724)
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- [llvm] 2371a64 - [AArch64] Add intrinsics for non-widening FMOPA/FMOPS (#88105)
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- [llvm] f5e4927 - AMDGPU: fix isSafeToSink expecting exactly one predecessor (#89224)
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- [llvm] [RemoveDIs] Update migration doc to explain how to handle textual IR updates (PR #91725)
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- [llvm] 73681b8 - [NFC][LLVM] Simplify SVE isel DAG patterns. (#91510)
via llvm-commits
- [llvm] [AMDGPU] Fix unittest linking error with `LLVM_LINK_LLVM_DYLIB` (PR #91727)
via llvm-commits
- [llvm] [MC] Make ELFEntrySizeMap a DenseMap (PR #91728)
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- [llvm] [MC] Make ELFEntrySizeMap a DenseMap (PR #91728)
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- [llvm] [AMDGPU] Fix unittest linking error with `LLVM_LINK_LLVM_DYLIB` (PR #91727)
via llvm-commits
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via llvm-commits
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- [llvm] [coverage] Add option for keeping mappings order (PR #91600)
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- [llvm] [coverage] Add option for keeping mappings order (PR #91600)
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- [llvm] 3be8e2c - [InstCombine] Prefer to keep power-of-2 constants when combining ashr exact and slt/ult of a constant (#86111)
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- [llvm] Generate a new requirements.txt to fix CVEs (PR #90109)
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- [llvm] [InstCombine] Fold vector.reduce.op(vector.reverse(X)) -> vector.reduce.op(X) (PR #91743)
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- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
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- [llvm] 8fc9e3d - [DAG] Lower frem of power-2 using div/trunc/mul+sub (#91148)
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- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
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- [llvm] 331f22a - [AMDGPU] Remove unnecessary predicates from aliases. NFC. (#91602)
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- [llvm] [LSR] Recognize vscale-relative immediates (PR #88124)
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- [llvm] [DAG] Use copysign in frem power-2 fold. (PR #91751)
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- [llvm] [DAG] Use copysign in frem power-2 fold. (PR #91751)
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- [llvm] [InstCombine] Fold `switch(rol(x, C1)) case C2:` to `switch(x) case rol(C2, -C1):` (PR #86307)
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- [llvm] [SampleFDO] Improve stale profile matching by diff algorithm (PR #87375)
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- [llvm] [CMAKE][llvm-libraries] Add Precompiled Headers option to improve build times (PR #91755)
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- [llvm] 023cdfc - Update stale comments of the demangler, NFC (#91740)
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- [llvm] [CMAKE][llvm-libraries] Add Precompiled Headers option to improve build times (PR #91755)
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- [llvm] [InstCombine] Fold vector.reduce.op(vector.reverse(X)) -> vector.reduce.op(X) (PR #91743)
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- [llvm] Use 256 bit register when AVX2 or higher is available. (PR #91721)
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- [llvm] [VPlan] Simplify (X && Y) || (X && !Y) -> X. (PR #89386)
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- [clang] [llvm] [AST] Print the separator "," for template arguments in ConceptReference::print (PR #91750)
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- [llvm] [AMDGPU] Remove SIProgramInfo related MCExpr unittest (PR #91758)
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- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
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- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
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- [llvm] 099c152 - [AST] Print the separator ", " for template arguments in ConceptReference::print (#91750)
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- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
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- [llvm] Use 256 bit register when AVX2 or higher is available. (PR #91721)
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- [llvm] 062f6fe - [InstallAPI] Support mutually exclusive parse options (#90686)
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- [llvm] [WIP] Consider datalayout sentinel pointer value for isKnownNonZero check (PR #91769)
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- [llvm] [DAGCombine] Add all users of the instruction recursively into worklist when an instruction is simplified (PR #91772)
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- [llvm] [AMDGPU] Introduce "amdgpu-sw-lower-lds" pass to lower LDS accesses to use device global memory. (PR #87265)
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- [llvm] Revert "[Flang][OpenMP] Derived type member map fortran offload runtime tests" (PR #91784)
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- [llvm] [VPlan] Simplify (X && Y) || (X && !Y) -> X. (PR #89386)
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- [llvm] Revert "[Flang][OpenMP] Derived type member map fortran offload runtime tests" (PR #91784)
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- [compiler-rt] 77a59c3 - [ctx_profile] Fix signed-ness in CtxInstrProfilingTest.cpp
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- [llvm] d655054 - Revert "[DirectX] Fix DXIL part header version encoding" (#91791)
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- [llvm] Generate a new requirements.txt to fix CVEs (PR #90109)
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- [llvm] [InstCombine] Drop nuw flag when CtlzOp is a sub nuw (PR #91776)
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- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
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- [llvm] 88da875 - [AArch64] Combine getActiveLaneMask with vector_extract (#81139)
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- [llvm] [LV] Introduce the EVLIVSimplify Pass for EVL-vectorized loops (PR #91796)
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- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
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- [llvm] Generate a new requirements.txt to fix CVEs (PR #90109)
via llvm-commits
- [llvm] [InstCombine] Improve coverage of `foldSelectValueEquivalence` (PR #88298)
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- [llvm] 00e3620 - Generate a new requirements.txt to fix CVEs (#90109)
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- [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)
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- [llvm] [InstCombine] Fold `(icmp pred (trunc nuw/nsw X), C)` -> `(icmp pred X, (zext/sext C))` (PR #87935)
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- [llvm] [ValueTracking] Compute knownbits from `(icmp upred (add/sub nuw X, Y), C)` (PR #87180)
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- [llvm] [ValueTracking] Extend LHS/RHS with matching operand to work without constants. (PR #85557)
via llvm-commits
- [llvm] [DirectX] Replace bitfield version in ProgramHeader. (PR #91797)
via llvm-commits
- [llvm] 91feb13 - ISel/AArch64: custom lower vector ISD::[L]LRINT (#89035)
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- [llvm] [AMDGPU] Exclude certain opcodes from being marked as single use (PR #91802)
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- [llvm] [ValueTracking] Recognize `X op (X != 0)` as non-zero (PR #88579)
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- [llvm] [AMDGPU] Combine build_vector patterns for i16 and f16. NFCI. (PR #91806)
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- [clang] [llvm] [AArch64] Support preserve_none calling convention (PR #91046)
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- [llvm] [BOLT][NFC] Simplify BBHashMapTy (PR #91812)
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- [llvm] 5d18d57 - [AMDGPU] Make fneg/fabs/copysign legal for bf16 (#91676)
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- [compiler-rt] [libfuzzer] Prevent MSan false positive when printing log with -jobs (PR #91679)
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- [llvm] [BOLT][NFC] Simplify FuncHashesTy (PR #91815)
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- [llvm] cb037d0 - [AMDGPU] Combine build_vector patterns for i16 and f16. NFCI. (#91806)
via llvm-commits
- [llvm] [VPlan] Simplify (X && Y) || (X && !Y) -> X. (PR #89386)
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- [llvm] [AMDGPU] Initialize MachineFunctionInfo for unittest (PR #91820)
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- [llvm] 3dcd604 - [AMDGPU] Initialize MachineFunctionInfo for unittest (#91820)
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- [compiler-rt] d9ce33a - [libfuzzer] Prevent MSan false positive when printing log with -jobs (#91679)
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- [llvm] [BOLT][NFC] Make BAT methods const (PR #91823)
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- [llvm] f8063ff - [VP][RISCV] Add vp.reduce.fmaximum/fminimum and its RISC-V codegen (#91782)
via llvm-commits
- [llvm] [RISCV] Pass subvector type to isLegalInterleavedAccessType in getInterleavedMemoryOpCost. (PR #91825)
via llvm-commits
- [llvm] Introduce DIExpression::foldConstantMath() (PR #71718)
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- [llvm] [workflows] Add a job for requesting a release note on release branch PRs (PR #91826)
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- [llvm] [workflows] Add a job for requesting a release note on release branch PRs (PR #91826)
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- [llvm] [IR][PatternMatch] Make `m_Checked{Int,Fp}` accept `Constant *` output instead of `APInt *` (PR #91377)
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- [llvm] [BOLT] Allow pass-through blocks in YAMLProfileReader (PR #91828)
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- [flang] [llvm] [mlir] [Flang][OpenMP][MLIR] Fix common block mapping for regular and declare target link (PR #91829)
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- [flang] [llvm] [mlir] [Flang][OpenMP][MLIR] Fix common block mapping for regular and declare target link (PR #91829)
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- [flang] [llvm] [mlir] [Flang][OpenMP][MLIR] Fix common block mapping for regular and declare target link (PR #91829)
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- [compiler-rt] [ASan] Remove COMPILER_RT_ASAN_SHADOW_SCALE_DEFINITION. (PR #91832)
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- [compiler-rt] [ASan] Remove COMPILER_RT_ASAN_SHADOW_SCALE_DEFINITION. (PR #91832)
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- [compiler-rt] [ASan] Remove COMPILER_RT_ASAN_SHADOW_SCALE_DEFINITION. (PR #91832)
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- [compiler-rt] [ASan] Remove COMPILER_RT_ASAN_SHADOW_SCALE_DEFINITION. (PR #91832)
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- [compiler-rt] [ASan] Remove COMPILER_RT_ASAN_SHADOW_SCALE_DEFINITION. (PR #91832)
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- [llvm] workflows: Add a new job for packaging release sources (PR #91834)
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- [llvm] [DebugInfo][LoopLoadElim] Fix missing debug location updates (PR #91839)
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- [llvm] [PAC][IR][AArch64] Add "ptrauth(...)" Constant to represent signed pointers. (PR #85738)
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- [llvm] [InstCombine] Improve coverage of `foldSelectValueEquivalence` (PR #88298)
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- [llvm] [InstCombine] Improve coverage of `foldSelectValueEquivalence` (PR #88298)
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- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
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- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
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- [clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)
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- [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)
via llvm-commits
- [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)
via llvm-commits
- [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)
via llvm-commits
- [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)
via llvm-commits
- [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)
via llvm-commits
- [llvm] [InstCombine] Fold fcmp ogt (x - y), 0 into fcmp ogt x, y #85245 (PR #85506)
via llvm-commits
- [llvm] [InstCombine] Fold `(icmp eq/ne (or (select cond, 0/NZ, 0/NZ), X), 0)` (PR #88183)
via llvm-commits
- [llvm] [Codegen] Faster algorithm for MachineBlockPlacement (PR #91843)
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- [llvm] 52c5a81 - [AMDGPU] Fix unittest linking error with `LLVM_LINK_LLVM_DYLIB` (#91727)
via llvm-commits
- [llvm] Use 256 bit register when AVX2 or higher is available. (PR #91721)
via llvm-commits
- [llvm] [X86][CodeGen] Support flags copy lowering for CCMP/CTEST (PR #91849)
via llvm-commits
- [llvm] [VPlan] Simplify (X && Y) || (X && !Y) -> X. (PR #89386)
via llvm-commits
- [llvm] [VPlan] Simplify (X && Y) || (X && !Y) -> X. (PR #89386)
via llvm-commits
- [llvm] InstructionSimplify: simplify a function (NFC) (PR #91853)
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- [clang] [clang-tools-extra] [flang] [lld] [llvm] [mlir] [test]: fix filecheck annotation typos (PR #91854)
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- [clang] [clang-tools-extra] [flang] [lld] [llvm] [mlir] [test]: fix filecheck annotation typos (PR #91854)
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- [clang] [clang-tools-extra] [flang] [lld] [llvm] [mlir] [test]: fix filecheck annotation typos (PR #91854)
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- [clang] [clang-tools-extra] [flang] [lld] [llvm] [mlir] [test]: fix filecheck annotation typos (PR #91854)
via llvm-commits
- [clang] [clang-tools-extra] [flang] [lld] [llvm] [mlir] [test]: fix filecheck annotation typos (PR #91854)
via llvm-commits
- [llvm] [RISCV] Insert simple landing pad for taken address labels. (PR #91855)
via llvm-commits
- [llvm] [VPlan] Simplify (X && Y) || (X && !Y) -> X. (PR #89386)
via llvm-commits
- [llvm] [VPlan] Simplify (X && Y) || (X && !Y) -> X. (PR #89386)
via llvm-commits
- [clang] [clang-tools-extra] [flang] [lld] [llvm] [mlir] [test]: fix filecheck annotation typos (PR #91854)
via llvm-commits
- [clang] [clang-tools-extra] [flang] [lld] [llvm] [mlir] [test]: fix filecheck annotation typos (PR #91854)
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- [clang] [clang-tools-extra] [flang] [lld] [llvm] [mlir] [test]: fix filecheck annotation typos (PR #91854)
via llvm-commits
- [clang] [clang-tools-extra] [compiler-rt] [libcxx] [lld] [lldb] [llvm] [mlir] [polly] fix(python): fix invalid escape sequences (PR #91856)
via llvm-commits
- [clang] [clang-tools-extra] [compiler-rt] [libcxx] [lld] [lldb] [llvm] [mlir] [polly] fix(python): fix invalid escape sequences (PR #91856)
via llvm-commits
- [clang] [clang-tools-extra] [compiler-rt] [libcxx] [lld] [lldb] [llvm] [mlir] [polly] fix(python): fix invalid escape sequences (PR #91856)
via llvm-commits
- [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [mlir] [openmp] [polly] fix(python): fix comparison to None (PR #91857)
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- [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [mlir] [openmp] [polly] fix(python): fix comparison to None (PR #91857)
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- [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [mlir] [openmp] [polly] fix(python): fix comparison to None (PR #91857)
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- [llvm] 3773191 - [DebugInfo][JumpThreading] Fix missing debug location updates (#91581)
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- [clang] [lldb] [llvm] [openmp] [polly] fix(python): fix comparison to True/False (PR #91858)
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- [clang] [lldb] [llvm] [openmp] [polly] fix(python): fix comparison to True/False (PR #91858)
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- [clang] [clang-tools-extra] [flang] [lld] [llvm] [mlir] [test]: fix filecheck annotation typos (PR #91854)
via llvm-commits
- [llvm] cdd7821 - [DebugInfo][LICM] Fix missing debug location updates (#91729)
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- [llvm] [RISCV] Insert simple landing pad before indirect jumps for Zicfilp. (PR #91860)
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- [llvm] [RISCV] Insert simple landing pad before indirect jumps for Zicfilp. (PR #91860)
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- [llvm] [InstCombine] Fold `(icmp pred (trunc nuw/nsw X), C)` -> `(icmp pred X, (zext/sext C))` (PR #87935)
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- [llvm] [InstCombine] Fold `(icmp pred (trunc nuw/nsw X), C)` -> `(icmp pred X, (zext/sext C))` (PR #87935)
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- [llvm] [InstCombine] Fold `(icmp pred (trunc nuw/nsw X), C)` -> `(icmp pred X, (zext/sext C))` (PR #87935)
via llvm-commits
- [llvm] [InstCombine] Fold `(icmp pred (trunc nuw/nsw X), C)` -> `(icmp pred X, (zext/sext C))` (PR #87935)
via llvm-commits
- [llvm] [X86] Set up the framework for optimization of CCMP/CTEST (PR #84603)
via llvm-commits
- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
via llvm-commits
- [llvm] [InstCombine] Fold `(icmp pred (trunc nuw/nsw X), C)` -> `(icmp pred X, (zext/sext C))` (PR #87935)
via llvm-commits
- [llvm] [InstCombine] Fold `(icmp pred (trunc nuw/nsw X), C)` -> `(icmp pred X, (zext/sext C))` (PR #87935)
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- [llvm] [Support] Vendor rpmalloc in-tree and use it for the Windows 64-bit release (PR #91862)
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- [llvm] [workflows] Fix libclang-abi-tests to work with new version scheme (PR #91865)
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- [llvm] [BOLT] Fix race condition in a test (PR #91866)
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- [llvm] [WIP][SelectionDAG] Add support for the 3-way comparison intrinsics [US]CMP (PR #91871)
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- [llvm] [WIP][SelectionDAG] Add support for the 3-way comparison intrinsics [US]CMP (PR #91871)
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- [llvm] f42117c - [DirectX] Replace bitfield version in ProgramHeader. (#91797)
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- [llvm] [InstCombine] Fold `(op x, ({z,s}ext (icmp eq x, C)))` to select (PR #89020)
via llvm-commits
- [llvm] [ValueTracking] Extend LHS/RHS with matching operand to work without constants. (PR #85557)
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- [lldb] [llvm] [lldb] Refactor string manipulation in Debugger.cpp (#91209) (PR #91880)
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- [lldb] [llvm] [lldb] Refactor string manipulation in Debugger.cpp (#91209) (PR #91880)
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- [clang] [clang-tools-extra] [flang] [lld] [llvm] [mlir] [polly] [test]: fix filecheck annotation typos (PR #91854)
via llvm-commits
- [clang] [clang-tools-extra] [flang] [lld] [llvm] [mlir] [polly] [test]: fix filecheck annotation typos (PR #91854)
via llvm-commits
- [llvm] [TailDuplicator] Add maximum predecessors and successors to consider tail duplicating blocks (PR #78582)
via llvm-commits
- [clang] [clang-tools-extra] [flang] [lld] [llvm] [mlir] [polly] [test]: fix filecheck annotation typos (PR #91854)
via llvm-commits
- [clang] [clang-tools-extra] [flang] [lld] [llvm] [mlir] [polly] [test]: fix filecheck annotation typos (PR #91854)
via llvm-commits
- [clang] [clang-tools-extra] [flang] [lld] [llvm] [mlir] [polly] [test]: fix filecheck annotation typos (PR #91854)
via llvm-commits
- [llvm] Cope with MCOperand null Insts (PR #91794)
via llvm-commits
- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
via llvm-commits
- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
via llvm-commits
- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
via llvm-commits
- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
via llvm-commits
- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
via llvm-commits
- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
via llvm-commits
- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
via llvm-commits
- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
via llvm-commits
- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
via llvm-commits
- [llvm] b7ed097 - [VectorCombine] Add intrinsics handling to shuffleToIdentity (#91000)
via llvm-commits
- [llvm] [VPlan] Add non-poison propagating LogicalAnd VPInstruction opcode. (PR #91897)
via llvm-commits
- [llvm] [InstCombine] Add reverse of ((X << nuw Z) sub nuw Y) >>u exact Z --> X sub nuw (Y >>u exact Z) (PR #91386)
via llvm-commits
- [llvm] [InstCombine] Propagate disjoint flags during shl-binop transform (PR #91333)
via llvm-commits
- [llvm] [InstCombine] Propagate disjoint flags during shl-binop transform (PR #91333)
via llvm-commits
- [llvm] [InstCombine] Try optimizing with knownbits which determined from Cond (PR #91762)
via llvm-commits
- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
via llvm-commits
- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
via llvm-commits
- [llvm] [X86][CodeGen] Support lowering for CCMP/CTEST (PR #91747)
via llvm-commits
- [llvm] [GVNSink] Fix non-determinisms by using a deterministic ordering (PR #90995)
via llvm-commits
- [llvm] [WIP][SelectionDAG] Add support for the 3-way comparison intrinsics [US]CMP (PR #91871)
via llvm-commits
- [llvm] [WIP][SelectionDAG] Add support for the 3-way comparison intrinsics [US]CMP (PR #91871)
via llvm-commits
- [llvm] [WIP][SelectionDAG] Add support for the 3-way comparison intrinsics [US]CMP (PR #91871)
via llvm-commits
- [llvm] [InstCombine] Fold `(icmp pred (trunc nuw/nsw X), C)` -> `(icmp pred X, (zext/sext C))` (PR #87935)
via llvm-commits
- [llvm] [InstCombine] Fold `(icmp pred (trunc nuw/nsw X), C)` -> `(icmp pred X, (zext/sext C))` (PR #87935)
via llvm-commits
- [llvm] ed16e7a - [RISCV][TTI] Support fdiv/udiv/sdiv/srem/urem in getArithmeticInstrCost (#89170)
via llvm-commits
- [llvm] [AArch64] Clarify atomic load/store size condition (NFCI) (PR #91907)
via llvm-commits
- [llvm] [StringMap] Move free into StringMapImpl dtor (NFC) (PR #91908)
via llvm-commits
- [llvm] abe3c5a - [GVNSink] Fix non-determinisms by using a deterministic ordering (#90995)
via llvm-commits
- [llvm] [GVNSink] Fix non-determinisms by using a deterministic ordering (PR #90995)
via llvm-commits
- [llvm] [X86][MC] Support Intel FRED and LKGS instructions. (PR #91909)
via llvm-commits
- [llvm] [APFloat] Replace partsCount array with single variable (NFC) (PR #91910)
via llvm-commits
- [llvm] [LoopUnroll] Remove redundant debug instructions after blocks have been merged (PR #91246)
via llvm-commits
- [llvm] cb4fca9 - [AMDGPU] Extend llvm.amdgcn.update.dpp intrinsic to support f64 (#91190)
via llvm-commits
- [compiler-rt] [ASan] Remove COMPILER_RT_ASAN_SHADOW_SCALE_DEFINITION. (PR #91832)
via llvm-commits
- [llvm] [PowerPC] handle toc-data in load selection of fast-isel (PR #91916)
via llvm-commits
- [llvm] b5f4210 - [InstCombine] Drop nuw flag when CtlzOp is a sub nuw (#91776)
via llvm-commits
- [llvm] [InstCombine] Drop nuw flag when CtlzOp is a sub nuw (PR #91776)
via llvm-commits
- [llvm] [GlobalIsel] combine extract vector element (PR #91922)
via llvm-commits
- [llvm] [GlobalIsel] combine extract vector element (PR #91922)
via llvm-commits
- [llvm] [PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (PR #80784)
zhijian lin via llvm-commits
- [llvm] [PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (PR #80784)
zhijian lin via llvm-commits
- [llvm] [PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (PR #80784)
zhijian lin via llvm-commits
- [llvm] promote Pseduo Opcode from 32bit to 64bits after eliminating the `extsw` instruction in PPCMIPeepholes optimization (PR #85451)
zhijian lin via llvm-commits
- [llvm] promote Pseduo Opcode from 32bit to 64bits after eliminating the `extsw` instruction in PPCMIPeepholes optimization (PR #85451)
zhijian lin via llvm-commits
- [llvm] promote Pseduo Opcode from 32bit to 64bits after eliminating the `extsw` instruction in PPCMIPeepholes optimization (PR #85451)
zhijian lin via llvm-commits
- [llvm] Promote the Pseudo Opcode of instructions that deduce the sign extension for extsw from 32 bits to 64 bits when eliminating the extsw instruction in PPCMIPeepholes optimization. (PR #85451)
zhijian lin via llvm-commits
- [llvm] Promote the Pseudo Opcode of instructions that deduce the sign extension for extsw from 32 bits to 64 bits when eliminating the extsw instruction in PPCMIPeepholes optimization. (PR #85451)
zhijian lin via llvm-commits
- [llvm] Promote the Pseudo Opcode of instructions that deduce the sign extension for extsw from 32 bits to 64 bits when eliminating the extsw instruction in PPCMIPeepholes optimization. (PR #85451)
zhijian lin via llvm-commits
- [llvm] Promote the Pseudo Opcode of instructions that deduce the sign extension for extsw from 32 bits to 64 bits when eliminating the extsw instruction in PPCMIPeepholes optimization. (PR #85451)
zhijian lin via llvm-commits
Last message date:
Sun May 12 23:59:11 PDT 2024
Archived on: Sun May 12 23:59:17 PDT 2024
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