[llvm] [AMDGPU] Introduce ordering parameter to atomic intrinsics and introduce new llvm.amdgcn.image.atomic.load intrinsic. (PR #73613)

[Matt Arsenault via llvm-commits]

arsenm wrote:

> > Sorry for the late response.
> > > I'm wondering if we should encode the ordering with metadata or something better than an integer
> > 
> > 
> > Is visibility the only reason for this suggestion? @nhaehnle what do you think?
> 
> Partially. Previously I was thinking of introducing an IR change to allow arbitrary calls to carry this kind of information. i.e. either a control bit to add the atomicrmw operands, or to encode it as an operand bundle. Really deviating from how atomicrmw represents this is unfortunate

Are you planning on looking into alternative ways of encoding it attached to the call, or do you need this in the intrinsic? 

https://github.com/llvm/llvm-project/pull/73613