[llvm] [InstSimplify] Do not simplify a multi-use freeze in `simplifyWithOpReplaced` (PR #91215)
Yingwei Zheng via llvm-commits
llvm-commits at lists.llvm.org
Mon May 6 23:17:14 PDT 2024
https://github.com/dtcxzyw updated https://github.com/llvm/llvm-project/pull/91215
>From 9c09f5dc04fa63bd1211eb6067ad665581eeafe9 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: Tue, 7 May 2024 14:09:11 +0800
Subject: [PATCH 1/2] [InstSimplify] Add pre-commit tests for PR91178. NFC.
---
llvm/test/Transforms/InstCombine/icmp.ll | 13 +++++++++++
llvm/test/Transforms/InstCombine/select.ll | 26 ++++++++++++++++++++++
2 files changed, 39 insertions(+)
diff --git a/llvm/test/Transforms/InstCombine/icmp.ll b/llvm/test/Transforms/InstCombine/icmp.ll
index 31093c7ca1036c..e19be3aece6fb7 100644
--- a/llvm/test/Transforms/InstCombine/icmp.ll
+++ b/llvm/test/Transforms/InstCombine/icmp.ll
@@ -5183,3 +5183,16 @@ entry:
%cmp = icmp eq i8 %add2, %add1
ret i1 %cmp
}
+
+define i1 @icmp_freeze_sext(i16 %x, i16 %y) {
+; CHECK-LABEL: @icmp_freeze_sext(
+; CHECK-NEXT: [[CMP1:%.*]] = icmp uge i16 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[CMP1_FR:%.*]] = freeze i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[CMP1_FR]]
+;
+ %cmp1 = icmp uge i16 %x, %y
+ %ext = sext i1 %cmp1 to i16
+ %ext.fr = freeze i16 %ext
+ %cmp2 = icmp uge i16 %ext.fr, %y
+ ret i1 %cmp2
+}
diff --git a/llvm/test/Transforms/InstCombine/select.ll b/llvm/test/Transforms/InstCombine/select.ll
index 2efe2742ca4916..ecd4f412bed621 100644
--- a/llvm/test/Transforms/InstCombine/select.ll
+++ b/llvm/test/Transforms/InstCombine/select.ll
@@ -4580,3 +4580,29 @@ define i32 @sequence_select_with_same_cond_extra_use(i1 %c1, i1 %c2){
%s3 = select i1 %c1, i32 789, i32 %s2
ret i32 %s3
}
+
+define i8 @test_replace_freeze_multiuse(i1 %x, i8 %y) {
+; CHECK-LABEL: @test_replace_freeze_multiuse(
+; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[X:%.*]] to i8
+; CHECK-NEXT: [[SHL:%.*]] = shl nuw i8 [[EXT]], [[Y:%.*]]
+; CHECK-NEXT: [[SHL_FR:%.*]] = freeze i8 [[SHL]]
+; CHECK-NEXT: ret i8 [[SHL_FR]]
+;
+ %ext = zext i1 %x to i8
+ %shl = shl nuw i8 %ext, %y
+ %shl.fr = freeze i8 %shl
+ %sel = select i1 %x, i8 0, i8 %shl.fr
+ %add = add i8 %shl.fr, %sel
+ ret i8 %add
+}
+
+define i8 @test_replace_freeze_oneuse(i1 %x, i8 %y) {
+; CHECK-LABEL: @test_replace_freeze_oneuse(
+; CHECK-NEXT: ret i8 0
+;
+ %ext = zext i1 %x to i8
+ %shl = shl nuw i8 %ext, %y
+ %shl.fr = freeze i8 %shl
+ %sel = select i1 %x, i8 0, i8 %shl.fr
+ ret i8 %sel
+}
>From c1dd1a44ae70f603b042d903acd4c2cdec9b054d Mon Sep 17 00:00:00 2001
From: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: Tue, 7 May 2024 14:16:47 +0800
Subject: [PATCH 2/2] [InstSimplify] Don't simplify freeze in
`simplifyWithOpReplaced`
---
llvm/lib/Analysis/InstructionSimplify.cpp | 4 ++++
llvm/test/Transforms/InstCombine/icmp.ll | 4 +++-
llvm/test/Transforms/InstCombine/select.ll | 10 ++++++++--
llvm/test/Transforms/PGOProfile/chr.ll | 7 ++++---
4 files changed, 19 insertions(+), 6 deletions(-)
diff --git a/llvm/lib/Analysis/InstructionSimplify.cpp b/llvm/lib/Analysis/InstructionSimplify.cpp
index 4061dae83c10f3..37a7259a5cd021 100644
--- a/llvm/lib/Analysis/InstructionSimplify.cpp
+++ b/llvm/lib/Analysis/InstructionSimplify.cpp
@@ -4312,6 +4312,10 @@ static Value *simplifyWithOpReplaced(Value *V, Value *Op, Value *RepOp,
if (match(I, m_Intrinsic<Intrinsic::is_constant>()))
return nullptr;
+ // Don't simplify freeze.
+ if (isa<FreezeInst>(I))
+ return nullptr;
+
// Replace Op with RepOp in instruction operands.
SmallVector<Value *, 8> NewOps;
bool AnyReplaced = false;
diff --git a/llvm/test/Transforms/InstCombine/icmp.ll b/llvm/test/Transforms/InstCombine/icmp.ll
index e19be3aece6fb7..2d786c8f48833d 100644
--- a/llvm/test/Transforms/InstCombine/icmp.ll
+++ b/llvm/test/Transforms/InstCombine/icmp.ll
@@ -5188,7 +5188,9 @@ define i1 @icmp_freeze_sext(i16 %x, i16 %y) {
; CHECK-LABEL: @icmp_freeze_sext(
; CHECK-NEXT: [[CMP1:%.*]] = icmp uge i16 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[CMP1_FR:%.*]] = freeze i1 [[CMP1]]
-; CHECK-NEXT: ret i1 [[CMP1_FR]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i16 [[Y]], 0
+; CHECK-NEXT: [[CMP2:%.*]] = or i1 [[TMP1]], [[CMP1_FR]]
+; CHECK-NEXT: ret i1 [[CMP2]]
;
%cmp1 = icmp uge i16 %x, %y
%ext = sext i1 %cmp1 to i16
diff --git a/llvm/test/Transforms/InstCombine/select.ll b/llvm/test/Transforms/InstCombine/select.ll
index ecd4f412bed621..2ade6faa99be3f 100644
--- a/llvm/test/Transforms/InstCombine/select.ll
+++ b/llvm/test/Transforms/InstCombine/select.ll
@@ -4586,7 +4586,9 @@ define i8 @test_replace_freeze_multiuse(i1 %x, i8 %y) {
; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[X:%.*]] to i8
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i8 [[EXT]], [[Y:%.*]]
; CHECK-NEXT: [[SHL_FR:%.*]] = freeze i8 [[SHL]]
-; CHECK-NEXT: ret i8 [[SHL_FR]]
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X]], i8 0, i8 [[SHL_FR]]
+; CHECK-NEXT: [[ADD:%.*]] = add i8 [[SHL_FR]], [[SEL]]
+; CHECK-NEXT: ret i8 [[ADD]]
;
%ext = zext i1 %x to i8
%shl = shl nuw i8 %ext, %y
@@ -4598,7 +4600,11 @@ define i8 @test_replace_freeze_multiuse(i1 %x, i8 %y) {
define i8 @test_replace_freeze_oneuse(i1 %x, i8 %y) {
; CHECK-LABEL: @test_replace_freeze_oneuse(
-; CHECK-NEXT: ret i8 0
+; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[X:%.*]] to i8
+; CHECK-NEXT: [[SHL:%.*]] = shl nuw i8 [[EXT]], [[Y:%.*]]
+; CHECK-NEXT: [[SHL_FR:%.*]] = freeze i8 [[SHL]]
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X]], i8 0, i8 [[SHL_FR]]
+; CHECK-NEXT: ret i8 [[SEL]]
;
%ext = zext i1 %x to i8
%shl = shl nuw i8 %ext, %y
diff --git a/llvm/test/Transforms/PGOProfile/chr.ll b/llvm/test/Transforms/PGOProfile/chr.ll
index 0551a171091ca7..38e8f8536a19c0 100644
--- a/llvm/test/Transforms/PGOProfile/chr.ll
+++ b/llvm/test/Transforms/PGOProfile/chr.ll
@@ -1298,11 +1298,12 @@ define i32 @test_chr_14(ptr %i, ptr %j, i32 %sum0, i1 %pred, i32 %z) !prof !14 {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[Z_FR:%.*]] = freeze i32 [[Z:%.*]]
; CHECK-NEXT: [[I0:%.*]] = load i32, ptr [[I:%.*]], align 4
-; CHECK-NEXT: [[V1:%.*]] = icmp eq i32 [[Z_FR]], 1
-; CHECK-NEXT: br i1 [[V1]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
+; CHECK-NEXT: [[V1_NOT:%.*]] = icmp eq i32 [[Z_FR]], 1
+; CHECK-NEXT: br i1 [[V1_NOT]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
; CHECK: entry.split.nonchr:
+; CHECK-NEXT: [[PRED_FR:%.*]] = freeze i1 [[PRED:%.*]]
; CHECK-NEXT: [[V0:%.*]] = icmp eq i32 [[Z_FR]], 0
-; CHECK-NEXT: [[V3_NONCHR:%.*]] = and i1 [[V0]], [[PRED:%.*]]
+; CHECK-NEXT: [[V3_NONCHR:%.*]] = and i1 [[V0]], [[PRED_FR]]
; CHECK-NEXT: br i1 [[V3_NONCHR]], label [[BB0_NONCHR:%.*]], label [[BB1]], !prof [[PROF16]]
; CHECK: bb0.nonchr:
; CHECK-NEXT: call void @foo()
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