[llvm] [DAG] Lower frem of power-2 using div/trunc/mul+sub (PR #91148)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Mon May 6 01:10:23 PDT 2024


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@@ -17261,6 +17262,25 @@ SDValue DAGCombiner::visitFREM(SDNode *N) {
   if (SDValue NewSel = foldBinOpIntoSelect(N))
     return NewSel;
 
+  if (ConstantFPSDNode *C1 = isConstOrConstSplatFP(N1, true)) {
+    bool IsExact;
+    APSInt C1I(64, 0);
+    if (C1->getValueAPF().isInteger() && !C1->getValueAPF().isNegative() &&
+        C1->getValueAPF().convertToInteger(C1I, APFloat::rmTowardZero,
+                                           &IsExact) == APFloat::opOK &&
----------------
arsenm wrote:

This should really be a separate isKnownInteger predicate, and also handle the cast-from-int case (also the various rounding intrinsics). I've been meaning to move  https://github.com/llvm/llvm-project/blob/30367cb5982dfdab2655401f020711311e7d78b9/llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp#L578

I've been meaning to move this to ValueTracking, but we need the equivalent DAG version 


https://github.com/llvm/llvm-project/pull/91148


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