[llvm] [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (PR #91449)
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Wed May 8 02:10:48 PDT 2024
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git-clang-format --diff ef0291e5f4451abbafab0c839bf51a6382f735f3 225aaca1d703a027d868b4049c3572a659fb78c3 -- llvm/lib/Target/Mips/Mips.h llvm/lib/Target/Mips/MipsBranchExpansion.cpp llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp llvm/lib/Target/Mips/MipsInstrInfo.cpp llvm/lib/Target/Mips/MipsInstrInfo.h
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diff --git a/llvm/lib/Target/Mips/Mips.h b/llvm/lib/Target/Mips/Mips.h
index 673143c0a0..32df648f21 100644
--- a/llvm/lib/Target/Mips/Mips.h
+++ b/llvm/lib/Target/Mips/Mips.h
@@ -17,14 +17,16 @@
#include "MCTargetDesc/MipsMCTargetDesc.h"
#include "llvm/Target/TargetMachine.h"
-#define IsMFLOMFHI(instr) (instr == Mips::MFLO || instr == Mips::MFLO64 || \
- instr == Mips::MFHI || instr == Mips::MFHI64)
-#define IsDIVMULT(instr) (instr == Mips::SDIV || instr == Mips::PseudoSDIV || \
- instr == Mips::DSDIV || instr == Mips::PseudoDSDIV || \
- instr == Mips::UDIV || instr == Mips::PseudoUDIV || \
- instr == Mips::DUDIV || instr == Mips::PseudoDUDIV || \
- instr == Mips::MULT || instr == Mips::PseudoMULT || \
- instr == Mips::DMULT || instr == Mips::PseudoDMULT)
+#define IsMFLOMFHI(instr) \
+ (instr == Mips::MFLO || instr == Mips::MFLO64 || instr == Mips::MFHI || \
+ instr == Mips::MFHI64)
+#define IsDIVMULT(instr) \
+ (instr == Mips::SDIV || instr == Mips::PseudoSDIV || instr == Mips::DSDIV || \
+ instr == Mips::PseudoDSDIV || instr == Mips::UDIV || \
+ instr == Mips::PseudoUDIV || instr == Mips::DUDIV || \
+ instr == Mips::PseudoDUDIV || instr == Mips::MULT || \
+ instr == Mips::PseudoMULT || instr == Mips::DMULT || \
+ instr == Mips::PseudoDMULT)
namespace llvm {
class FunctionPass;
diff --git a/llvm/lib/Target/Mips/MipsBranchExpansion.cpp b/llvm/lib/Target/Mips/MipsBranchExpansion.cpp
index b632a9e4e1..a42fe39e40 100644
--- a/llvm/lib/Target/Mips/MipsBranchExpansion.cpp
+++ b/llvm/lib/Target/Mips/MipsBranchExpansion.cpp
@@ -769,23 +769,21 @@ bool MipsBranchExpansion::handleSlot(Pred Predicate, Safe SafeInSlot) {
if (std::next(Iit) == FI->end() ||
std::next(Iit)->getOpcode() != Mips::NOP) {
Changed = true;
- if (Predicate(*I) ||
- (!LastInstInFunction && !SafeInSlot(*IInSlot, *I))){
+ if (Predicate(*I) ||
+ (!LastInstInFunction && !SafeInSlot(*IInSlot, *I))) {
TII->insertNop(*(I->getParent()), std::next(I), I->getDebugLoc())
->bundleWithPred();
NumInsertedNops++;
}
- if (IsMFLOMFHI(I->getOpcode()) &&
- !LastInstInFunction &&
+ if (IsMFLOMFHI(I->getOpcode()) && !LastInstInFunction &&
IsDIVMULT(IInSlot->getOpcode())) {
TII->insertNop(*(I->getParent()), std::next(I), I->getDebugLoc())
->bundleWithPred();
NumInsertedNops++;
}
}
- }
- else if (IsMFLOMFHI(I->getOpcode())) {
- hasPendingMFLO = true;
+ } else if (IsMFLOMFHI(I->getOpcode())) {
+ hasPendingMFLO = true;
}
}
}
@@ -799,11 +797,10 @@ bool MipsBranchExpansion::handleMFLO() {
if (STI->hasMips32() || STI->hasMips5())
return false;
- return handleSlot(
- [this](auto &I) -> bool { return TII->IsMfloOrMfhi(I); },
- [this](auto &IInSlot, auto &I) -> bool {
- return TII->SafeAfterMflo(IInSlot);
- });
+ return handleSlot([this](auto &I) -> bool { return TII->IsMfloOrMfhi(I); },
+ [this](auto &IInSlot, auto &I) -> bool {
+ return TII->SafeAfterMflo(IInSlot);
+ });
}
bool MipsBranchExpansion::handleForbiddenSlot() {
@@ -925,8 +922,7 @@ bool MipsBranchExpansion::runOnMachineFunction(MachineFunction &MF) {
bool MfloChanged = handleMFLO();
bool Changed = longBranchChanged || forbiddenSlotChanged ||
- fpuDelaySlotChanged || loadDelaySlotChanged ||
- MfloChanged;
+ fpuDelaySlotChanged || loadDelaySlotChanged || MfloChanged;
// Then run them alternatively while there are changes.
while (forbiddenSlotChanged) {
@@ -934,8 +930,8 @@ bool MipsBranchExpansion::runOnMachineFunction(MachineFunction &MF) {
fpuDelaySlotChanged = handleFPUDelaySlot();
loadDelaySlotChanged = handleLoadDelaySlot();
MfloChanged = handleMFLO();
- if (!longBranchChanged && !fpuDelaySlotChanged &&
- !loadDelaySlotChanged && !MfloChanged)
+ if (!longBranchChanged && !fpuDelaySlotChanged && !loadDelaySlotChanged &&
+ !MfloChanged)
break;
forbiddenSlotChanged = handleForbiddenSlot();
}
diff --git a/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp b/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
index d7e938bc05..e0401ba8d7 100644
--- a/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
+++ b/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
@@ -745,8 +745,8 @@ bool MipsDelaySlotFiller::searchRange(MachineBasicBlock &MBB, IterTy Begin,
unsigned Opcode = (*Slot).getOpcode();
if ((CurrI->getOpcode() == Mips::MFLO ||
- CurrI->getOpcode() == Mips::MFLO64) &&
- (!STI.hasMips32() && !STI.hasMips5()))
+ CurrI->getOpcode() == Mips::MFLO64) &&
+ (!STI.hasMips32() && !STI.hasMips5()))
continue;
// This is complicated by the tail call optimization. For non-PIC code
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.cpp b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
index 9a23f72372..663be430a2 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
@@ -11,9 +11,9 @@
//===----------------------------------------------------------------------===//
#include "MipsInstrInfo.h"
-#include "Mips.h"
#include "MCTargetDesc/MipsBaseInfo.h"
#include "MCTargetDesc/MipsMCTargetDesc.h"
+#include "Mips.h"
#include "MipsSubtarget.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
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https://github.com/llvm/llvm-project/pull/91449
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