[llvm] [ModuloSchedule] Implement modulo variable expansion for pipelining (PR #65609)

[Yuta Mukai via llvm-commits]

ytmukai wrote:

Thanks for the review! I would be very grateful if you would use and improve this.

I understand pre-pipeliner unroll and issues about accumulations as I commented in an earlier discussion. (https://discourse.llvm.org/t/implementing-modulo-variable-expansion-for-machinepipeliner/71748/7?u=ytmukai)

As other improvements, we are aware of a problem of large unroll counts, which occur when the same addressing register is used by a load and a store. They are often located at the beginning and end of the DDG and cross all stages.

https://github.com/llvm/llvm-project/pull/65609